cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54585 |
1 |
|
|
T110 |
1697 |
|
T111 |
1627 |
|
T112 |
673 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46719 |
1 |
|
|
T110 |
1055 |
|
T111 |
787 |
|
T112 |
1420 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66035 |
1 |
|
|
T110 |
1883 |
|
T111 |
1947 |
|
T112 |
740 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42591 |
1 |
|
|
T110 |
1098 |
|
T111 |
891 |
|
T112 |
734 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T110 |
53 |
|
T111 |
35 |
|
T112 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T110 |
54 |
|
T111 |
36 |
|
T112 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T110 |
52 |
|
T111 |
35 |
|
T112 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T110 |
54 |
|
T111 |
34 |
|
T112 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T110 |
51 |
|
T111 |
35 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T110 |
53 |
|
T111 |
34 |
|
T112 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T110 |
50 |
|
T111 |
34 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T110 |
50 |
|
T111 |
33 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T110 |
49 |
|
T111 |
34 |
|
T112 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T110 |
47 |
|
T111 |
32 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T110 |
49 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T110 |
47 |
|
T111 |
31 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T110 |
49 |
|
T111 |
32 |
|
T112 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T110 |
46 |
|
T111 |
30 |
|
T112 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T110 |
47 |
|
T111 |
32 |
|
T112 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T110 |
46 |
|
T111 |
30 |
|
T112 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T110 |
47 |
|
T111 |
32 |
|
T112 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T110 |
46 |
|
T111 |
30 |
|
T112 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T110 |
46 |
|
T111 |
31 |
|
T112 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T110 |
46 |
|
T111 |
29 |
|
T112 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T110 |
44 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T110 |
43 |
|
T111 |
29 |
|
T112 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T110 |
44 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T110 |
43 |
|
T111 |
25 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T110 |
42 |
|
T111 |
30 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T110 |
41 |
|
T111 |
24 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T110 |
39 |
|
T111 |
29 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T110 |
41 |
|
T111 |
22 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
25 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T110 |
38 |
|
T111 |
29 |
|
T112 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
25 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T110 |
39 |
|
T111 |
21 |
|
T112 |
23 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63489 |
1 |
|
|
T110 |
2410 |
|
T111 |
1271 |
|
T112 |
1794 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48017 |
1 |
|
|
T110 |
774 |
|
T111 |
813 |
|
T112 |
683 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56534 |
1 |
|
|
T110 |
1739 |
|
T111 |
1293 |
|
T112 |
730 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41227 |
1 |
|
|
T110 |
1150 |
|
T111 |
1801 |
|
T112 |
446 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T110 |
46 |
|
T111 |
41 |
|
T112 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T110 |
45 |
|
T111 |
43 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T110 |
45 |
|
T111 |
38 |
|
T112 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T110 |
45 |
|
T111 |
42 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T110 |
44 |
|
T111 |
38 |
|
T112 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T110 |
44 |
|
T111 |
42 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T110 |
44 |
|
T111 |
37 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T110 |
43 |
|
T111 |
42 |
|
T112 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T110 |
44 |
|
T111 |
36 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T110 |
40 |
|
T111 |
41 |
|
T112 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T110 |
39 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T110 |
39 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T110 |
39 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T110 |
39 |
|
T111 |
38 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T110 |
38 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T110 |
38 |
|
T111 |
38 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T110 |
38 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T110 |
35 |
|
T111 |
38 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T110 |
33 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T110 |
35 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T110 |
32 |
|
T111 |
29 |
|
T112 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T110 |
35 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T110 |
32 |
|
T111 |
26 |
|
T112 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T110 |
35 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T110 |
30 |
|
T111 |
25 |
|
T112 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T110 |
35 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T110 |
30 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
22 |
|
T111 |
21 |
|
T112 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T110 |
33 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57272 |
1 |
|
|
T110 |
1337 |
|
T111 |
1144 |
|
T112 |
672 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51371 |
1 |
|
|
T110 |
1692 |
|
T111 |
886 |
|
T112 |
1462 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57403 |
1 |
|
|
T110 |
1577 |
|
T111 |
2081 |
|
T112 |
777 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42441 |
1 |
|
|
T110 |
1197 |
|
T111 |
1050 |
|
T112 |
641 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1752 |
1 |
|
|
T110 |
47 |
|
T111 |
45 |
|
T112 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T110 |
48 |
|
T111 |
42 |
|
T112 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T110 |
47 |
|
T111 |
44 |
|
T112 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T110 |
47 |
|
T111 |
42 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T110 |
46 |
|
T111 |
44 |
|
T112 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T110 |
45 |
|
T111 |
40 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T110 |
46 |
|
T111 |
43 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T110 |
45 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T110 |
44 |
|
T111 |
39 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T110 |
44 |
|
T111 |
38 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T110 |
43 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T110 |
42 |
|
T111 |
38 |
|
T112 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T110 |
26 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T110 |
44 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T110 |
41 |
|
T111 |
38 |
|
T112 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T110 |
44 |
|
T111 |
32 |
|
T112 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T110 |
41 |
|
T111 |
38 |
|
T112 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T110 |
43 |
|
T111 |
32 |
|
T112 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T110 |
41 |
|
T111 |
38 |
|
T112 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T110 |
40 |
|
T111 |
36 |
|
T112 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T110 |
40 |
|
T111 |
35 |
|
T112 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T110 |
40 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T110 |
39 |
|
T111 |
35 |
|
T112 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T110 |
38 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T110 |
27 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T110 |
39 |
|
T111 |
35 |
|
T112 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T110 |
38 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57356 |
1 |
|
|
T110 |
2302 |
|
T111 |
1471 |
|
T112 |
1564 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45128 |
1 |
|
|
T110 |
1000 |
|
T111 |
909 |
|
T112 |
594 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62876 |
1 |
|
|
T110 |
1411 |
|
T111 |
1294 |
|
T112 |
813 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45056 |
1 |
|
|
T110 |
1152 |
|
T111 |
1629 |
|
T112 |
596 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T110 |
48 |
|
T111 |
35 |
|
T112 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T110 |
48 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T110 |
48 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T110 |
45 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T110 |
46 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T110 |
43 |
|
T111 |
32 |
|
T112 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T110 |
45 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T110 |
43 |
|
T111 |
32 |
|
T112 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T110 |
45 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T110 |
42 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T110 |
45 |
|
T111 |
38 |
|
T112 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T110 |
42 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T110 |
43 |
|
T111 |
37 |
|
T112 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T110 |
40 |
|
T111 |
29 |
|
T112 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
26 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T110 |
42 |
|
T111 |
37 |
|
T112 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T110 |
40 |
|
T111 |
28 |
|
T112 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T110 |
41 |
|
T111 |
37 |
|
T112 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T110 |
38 |
|
T111 |
27 |
|
T112 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T110 |
40 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T110 |
37 |
|
T111 |
27 |
|
T112 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T110 |
38 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T110 |
37 |
|
T111 |
26 |
|
T112 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T110 |
38 |
|
T111 |
33 |
|
T112 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T110 |
37 |
|
T111 |
25 |
|
T112 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T110 |
38 |
|
T111 |
32 |
|
T112 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T110 |
37 |
|
T111 |
23 |
|
T112 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T110 |
38 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
26 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T110 |
34 |
|
T111 |
23 |
|
T112 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
25 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T110 |
37 |
|
T111 |
31 |
|
T112 |
21 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57017 |
1 |
|
|
T110 |
1442 |
|
T111 |
1547 |
|
T112 |
1195 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48644 |
1 |
|
|
T110 |
988 |
|
T111 |
990 |
|
T112 |
414 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56109 |
1 |
|
|
T110 |
1449 |
|
T111 |
1608 |
|
T112 |
1509 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46790 |
1 |
|
|
T110 |
1899 |
|
T111 |
1185 |
|
T112 |
508 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T110 |
45 |
|
T111 |
43 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T110 |
47 |
|
T111 |
40 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T110 |
43 |
|
T111 |
42 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T110 |
47 |
|
T111 |
38 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T110 |
47 |
|
T111 |
37 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T110 |
42 |
|
T111 |
39 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T110 |
42 |
|
T111 |
38 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T110 |
46 |
|
T111 |
33 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T110 |
40 |
|
T111 |
38 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
28 |
|
T111 |
18 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T110 |
45 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T110 |
39 |
|
T111 |
37 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T110 |
44 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T110 |
38 |
|
T111 |
37 |
|
T112 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T110 |
43 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T110 |
36 |
|
T111 |
37 |
|
T112 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T110 |
43 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T110 |
35 |
|
T111 |
37 |
|
T112 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T110 |
35 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T110 |
34 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
29 |
|
T111 |
14 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T110 |
31 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
27 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T110 |
41 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
70329 |
1 |
|
|
T110 |
2540 |
|
T111 |
1142 |
|
T112 |
677 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45991 |
1 |
|
|
T110 |
855 |
|
T111 |
1603 |
|
T112 |
538 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52410 |
1 |
|
|
T110 |
1194 |
|
T111 |
1595 |
|
T112 |
791 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40475 |
1 |
|
|
T110 |
1271 |
|
T111 |
860 |
|
T112 |
1422 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T110 |
50 |
|
T111 |
41 |
|
T112 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T110 |
57 |
|
T111 |
38 |
|
T112 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T110 |
49 |
|
T111 |
41 |
|
T112 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T110 |
57 |
|
T111 |
37 |
|
T112 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T110 |
48 |
|
T111 |
40 |
|
T112 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T110 |
56 |
|
T111 |
36 |
|
T112 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T110 |
46 |
|
T111 |
40 |
|
T112 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T110 |
56 |
|
T111 |
35 |
|
T112 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T110 |
44 |
|
T111 |
40 |
|
T112 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T110 |
56 |
|
T111 |
35 |
|
T112 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T110 |
41 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T110 |
56 |
|
T111 |
35 |
|
T112 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T110 |
40 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T110 |
56 |
|
T111 |
33 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T110 |
40 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
17 |
|
T111 |
23 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T110 |
56 |
|
T111 |
33 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T110 |
39 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T110 |
56 |
|
T111 |
31 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T110 |
35 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T110 |
55 |
|
T111 |
29 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T110 |
34 |
|
T111 |
36 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T110 |
55 |
|
T111 |
27 |
|
T112 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T110 |
33 |
|
T111 |
36 |
|
T112 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T110 |
54 |
|
T111 |
27 |
|
T112 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T110 |
32 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T110 |
50 |
|
T111 |
26 |
|
T112 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T110 |
30 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T110 |
50 |
|
T111 |
26 |
|
T112 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T110 |
30 |
|
T111 |
35 |
|
T112 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
16 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T110 |
50 |
|
T111 |
25 |
|
T112 |
26 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54317 |
1 |
|
|
T110 |
1619 |
|
T111 |
1003 |
|
T112 |
1006 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49110 |
1 |
|
|
T110 |
1596 |
|
T111 |
1401 |
|
T112 |
1548 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53465 |
1 |
|
|
T110 |
1834 |
|
T111 |
906 |
|
T112 |
527 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51471 |
1 |
|
|
T110 |
944 |
|
T111 |
1578 |
|
T112 |
499 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T110 |
40 |
|
T111 |
54 |
|
T112 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T110 |
45 |
|
T111 |
54 |
|
T112 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T110 |
38 |
|
T111 |
51 |
|
T112 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T110 |
45 |
|
T111 |
53 |
|
T112 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T110 |
38 |
|
T111 |
50 |
|
T112 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T110 |
45 |
|
T111 |
53 |
|
T112 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T110 |
38 |
|
T111 |
50 |
|
T112 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T110 |
45 |
|
T111 |
52 |
|
T112 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T110 |
36 |
|
T111 |
49 |
|
T112 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T110 |
44 |
|
T111 |
52 |
|
T112 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T110 |
35 |
|
T111 |
49 |
|
T112 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T110 |
44 |
|
T111 |
51 |
|
T112 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T110 |
35 |
|
T111 |
48 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T110 |
43 |
|
T111 |
50 |
|
T112 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T110 |
34 |
|
T111 |
47 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T110 |
40 |
|
T111 |
50 |
|
T112 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T110 |
34 |
|
T111 |
46 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T110 |
40 |
|
T111 |
48 |
|
T112 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T110 |
34 |
|
T111 |
45 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T110 |
39 |
|
T111 |
47 |
|
T112 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T110 |
33 |
|
T111 |
45 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T110 |
38 |
|
T111 |
46 |
|
T112 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T110 |
31 |
|
T111 |
44 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T110 |
37 |
|
T111 |
45 |
|
T112 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T110 |
31 |
|
T111 |
42 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T110 |
36 |
|
T111 |
44 |
|
T112 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T110 |
31 |
|
T111 |
40 |
|
T112 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T110 |
35 |
|
T111 |
40 |
|
T112 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T110 |
31 |
|
T111 |
39 |
|
T112 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T110 |
33 |
|
T111 |
38 |
|
T112 |
19 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62607 |
1 |
|
|
T110 |
1562 |
|
T111 |
1673 |
|
T112 |
750 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41847 |
1 |
|
|
T110 |
755 |
|
T111 |
995 |
|
T112 |
591 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57090 |
1 |
|
|
T110 |
2366 |
|
T111 |
1386 |
|
T112 |
1321 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48791 |
1 |
|
|
T110 |
1122 |
|
T111 |
1470 |
|
T112 |
768 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T110 |
44 |
|
T111 |
29 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
26 |
|
T111 |
15 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T110 |
49 |
|
T111 |
35 |
|
T112 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T110 |
44 |
|
T111 |
29 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
26 |
|
T111 |
15 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T110 |
49 |
|
T111 |
35 |
|
T112 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T110 |
43 |
|
T111 |
29 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
26 |
|
T111 |
15 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T110 |
48 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T110 |
43 |
|
T111 |
28 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
26 |
|
T111 |
15 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T110 |
42 |
|
T111 |
27 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T110 |
45 |
|
T111 |
35 |
|
T112 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T110 |
40 |
|
T111 |
25 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T110 |
44 |
|
T111 |
35 |
|
T112 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T110 |
39 |
|
T111 |
24 |
|
T112 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T110 |
44 |
|
T111 |
35 |
|
T112 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T110 |
39 |
|
T111 |
24 |
|
T112 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T110 |
44 |
|
T111 |
33 |
|
T112 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T110 |
39 |
|
T111 |
24 |
|
T112 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T110 |
44 |
|
T111 |
33 |
|
T112 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T110 |
37 |
|
T111 |
24 |
|
T112 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T110 |
44 |
|
T111 |
31 |
|
T112 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T110 |
34 |
|
T111 |
23 |
|
T112 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T110 |
44 |
|
T111 |
29 |
|
T112 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T110 |
32 |
|
T111 |
23 |
|
T112 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T110 |
44 |
|
T111 |
27 |
|
T112 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T110 |
31 |
|
T111 |
22 |
|
T112 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T110 |
42 |
|
T111 |
26 |
|
T112 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T110 |
30 |
|
T111 |
22 |
|
T112 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T110 |
42 |
|
T111 |
25 |
|
T112 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
30 |
|
T111 |
20 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
26 |
|
T111 |
14 |
|
T112 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T110 |
40 |
|
T111 |
24 |
|
T112 |
30 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57493 |
1 |
|
|
T110 |
1909 |
|
T111 |
1673 |
|
T112 |
2034 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48980 |
1 |
|
|
T110 |
1021 |
|
T111 |
847 |
|
T112 |
589 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58461 |
1 |
|
|
T110 |
2417 |
|
T111 |
2282 |
|
T112 |
792 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46613 |
1 |
|
|
T110 |
700 |
|
T111 |
544 |
|
T112 |
410 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T110 |
39 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
31 |
|
T111 |
21 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T110 |
36 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T110 |
38 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
31 |
|
T111 |
21 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T110 |
35 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T110 |
36 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
31 |
|
T111 |
21 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T110 |
35 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T110 |
36 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
31 |
|
T111 |
21 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T110 |
33 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T110 |
35 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T110 |
31 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T110 |
35 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T110 |
30 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T110 |
35 |
|
T111 |
33 |
|
T112 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T110 |
29 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T110 |
34 |
|
T111 |
33 |
|
T112 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T110 |
29 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T110 |
33 |
|
T111 |
33 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T110 |
28 |
|
T111 |
27 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T110 |
32 |
|
T111 |
31 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T110 |
28 |
|
T111 |
27 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T110 |
31 |
|
T111 |
28 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T110 |
28 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T110 |
30 |
|
T111 |
28 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T110 |
28 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T110 |
30 |
|
T111 |
27 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T110 |
27 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T110 |
29 |
|
T111 |
26 |
|
T112 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T110 |
25 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
28 |
|
T111 |
22 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T110 |
28 |
|
T111 |
26 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
31 |
|
T111 |
20 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T110 |
24 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55145 |
1 |
|
|
T110 |
2766 |
|
T111 |
1775 |
|
T112 |
694 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44616 |
1 |
|
|
T110 |
791 |
|
T111 |
699 |
|
T112 |
716 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55619 |
1 |
|
|
T110 |
1591 |
|
T111 |
1244 |
|
T112 |
621 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54229 |
1 |
|
|
T110 |
903 |
|
T111 |
1475 |
|
T112 |
1504 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T110 |
40 |
|
T111 |
44 |
|
T112 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T110 |
38 |
|
T111 |
45 |
|
T112 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T110 |
37 |
|
T111 |
42 |
|
T112 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T110 |
37 |
|
T111 |
43 |
|
T112 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T110 |
36 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T110 |
37 |
|
T111 |
43 |
|
T112 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T110 |
34 |
|
T111 |
39 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T110 |
37 |
|
T111 |
42 |
|
T112 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T110 |
33 |
|
T111 |
39 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
30 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T110 |
36 |
|
T111 |
41 |
|
T112 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T110 |
33 |
|
T111 |
39 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
30 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T110 |
34 |
|
T111 |
41 |
|
T112 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T110 |
33 |
|
T111 |
38 |
|
T112 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
30 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T110 |
34 |
|
T111 |
40 |
|
T112 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T110 |
31 |
|
T111 |
38 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
30 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T110 |
32 |
|
T111 |
40 |
|
T112 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T110 |
31 |
|
T111 |
37 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T110 |
32 |
|
T111 |
38 |
|
T112 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T110 |
30 |
|
T111 |
36 |
|
T112 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T110 |
30 |
|
T111 |
36 |
|
T112 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T110 |
30 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T110 |
28 |
|
T111 |
34 |
|
T112 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T110 |
30 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T110 |
27 |
|
T111 |
34 |
|
T112 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T110 |
29 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T110 |
27 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T110 |
28 |
|
T111 |
32 |
|
T112 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T110 |
27 |
|
T111 |
32 |
|
T112 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
28 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T110 |
27 |
|
T111 |
31 |
|
T112 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T110 |
27 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56365 |
1 |
|
|
T110 |
1608 |
|
T111 |
1321 |
|
T112 |
1552 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50282 |
1 |
|
|
T110 |
1894 |
|
T111 |
1783 |
|
T112 |
591 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58962 |
1 |
|
|
T110 |
1282 |
|
T111 |
1087 |
|
T112 |
850 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43491 |
1 |
|
|
T110 |
908 |
|
T111 |
917 |
|
T112 |
668 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T110 |
59 |
|
T111 |
48 |
|
T112 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
26 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T110 |
55 |
|
T111 |
48 |
|
T112 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T110 |
58 |
|
T111 |
47 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
26 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T110 |
53 |
|
T111 |
47 |
|
T112 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T110 |
58 |
|
T111 |
47 |
|
T112 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
26 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T110 |
53 |
|
T111 |
46 |
|
T112 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T110 |
56 |
|
T111 |
45 |
|
T112 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
26 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T110 |
51 |
|
T111 |
46 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T110 |
56 |
|
T111 |
43 |
|
T112 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T110 |
48 |
|
T111 |
46 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T110 |
56 |
|
T111 |
42 |
|
T112 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T110 |
48 |
|
T111 |
45 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T110 |
55 |
|
T111 |
42 |
|
T112 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T110 |
47 |
|
T111 |
44 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T110 |
55 |
|
T111 |
40 |
|
T112 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T110 |
47 |
|
T111 |
42 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T110 |
53 |
|
T111 |
40 |
|
T112 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T110 |
45 |
|
T111 |
40 |
|
T112 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T110 |
51 |
|
T111 |
40 |
|
T112 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T110 |
40 |
|
T111 |
40 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T110 |
50 |
|
T111 |
39 |
|
T112 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T110 |
40 |
|
T111 |
38 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T110 |
48 |
|
T111 |
39 |
|
T112 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T110 |
40 |
|
T111 |
37 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T110 |
46 |
|
T111 |
39 |
|
T112 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T110 |
39 |
|
T111 |
35 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T110 |
44 |
|
T111 |
38 |
|
T112 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T110 |
37 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T110 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T110 |
43 |
|
T111 |
37 |
|
T112 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
26 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T110 |
36 |
|
T111 |
33 |
|
T112 |
23 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59284 |
1 |
|
|
T110 |
1230 |
|
T111 |
1118 |
|
T112 |
1453 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41992 |
1 |
|
|
T110 |
1217 |
|
T111 |
1442 |
|
T112 |
744 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59389 |
1 |
|
|
T110 |
2049 |
|
T111 |
1386 |
|
T112 |
534 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49217 |
1 |
|
|
T110 |
1276 |
|
T111 |
1165 |
|
T112 |
831 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T110 |
52 |
|
T111 |
45 |
|
T112 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T110 |
57 |
|
T111 |
43 |
|
T112 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T110 |
51 |
|
T111 |
45 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T110 |
57 |
|
T111 |
42 |
|
T112 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T110 |
50 |
|
T111 |
43 |
|
T112 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T110 |
57 |
|
T111 |
41 |
|
T112 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T110 |
49 |
|
T111 |
40 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T110 |
57 |
|
T111 |
41 |
|
T112 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T110 |
48 |
|
T111 |
40 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T110 |
56 |
|
T111 |
41 |
|
T112 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T110 |
47 |
|
T111 |
36 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T110 |
56 |
|
T111 |
41 |
|
T112 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T110 |
47 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T110 |
56 |
|
T111 |
41 |
|
T112 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T110 |
47 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T110 |
54 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T110 |
46 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T110 |
53 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T110 |
46 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T110 |
51 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T110 |
45 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T110 |
51 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T110 |
44 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T110 |
49 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T110 |
41 |
|
T111 |
31 |
|
T112 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T110 |
47 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T110 |
39 |
|
T111 |
30 |
|
T112 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T110 |
47 |
|
T111 |
39 |
|
T112 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T110 |
38 |
|
T111 |
28 |
|
T112 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
18 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T110 |
46 |
|
T111 |
39 |
|
T112 |
30 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65065 |
1 |
|
|
T110 |
1859 |
|
T111 |
1579 |
|
T112 |
720 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47108 |
1 |
|
|
T110 |
1857 |
|
T111 |
708 |
|
T112 |
729 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55270 |
1 |
|
|
T110 |
1117 |
|
T111 |
2333 |
|
T112 |
444 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42530 |
1 |
|
|
T110 |
1076 |
|
T111 |
673 |
|
T112 |
1551 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T110 |
50 |
|
T111 |
37 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T110 |
48 |
|
T111 |
36 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T110 |
44 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T110 |
48 |
|
T111 |
34 |
|
T112 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T110 |
42 |
|
T111 |
32 |
|
T112 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T110 |
41 |
|
T111 |
32 |
|
T112 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T110 |
46 |
|
T111 |
32 |
|
T112 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T110 |
39 |
|
T111 |
32 |
|
T112 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T110 |
46 |
|
T111 |
32 |
|
T112 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T110 |
39 |
|
T111 |
31 |
|
T112 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T110 |
46 |
|
T111 |
31 |
|
T112 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T110 |
39 |
|
T111 |
31 |
|
T112 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T110 |
22 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T110 |
46 |
|
T111 |
30 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T110 |
39 |
|
T111 |
30 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T110 |
45 |
|
T111 |
30 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T110 |
39 |
|
T111 |
30 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T110 |
44 |
|
T111 |
29 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T110 |
39 |
|
T111 |
28 |
|
T112 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T110 |
43 |
|
T111 |
29 |
|
T112 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T110 |
38 |
|
T111 |
26 |
|
T112 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T110 |
42 |
|
T111 |
28 |
|
T112 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T110 |
36 |
|
T111 |
24 |
|
T112 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T110 |
40 |
|
T111 |
28 |
|
T112 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T110 |
33 |
|
T111 |
23 |
|
T112 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T110 |
39 |
|
T111 |
28 |
|
T112 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
26 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T110 |
33 |
|
T111 |
22 |
|
T112 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T110 |
21 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T110 |
37 |
|
T111 |
27 |
|
T112 |
26 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62871 |
1 |
|
|
T110 |
1928 |
|
T111 |
936 |
|
T112 |
970 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43122 |
1 |
|
|
T110 |
1329 |
|
T111 |
2024 |
|
T112 |
1332 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55903 |
1 |
|
|
T110 |
1288 |
|
T111 |
1134 |
|
T112 |
913 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48671 |
1 |
|
|
T110 |
1340 |
|
T111 |
967 |
|
T112 |
293 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T110 |
54 |
|
T111 |
58 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
12 |
|
T111 |
14 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T110 |
62 |
|
T111 |
56 |
|
T112 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T110 |
54 |
|
T111 |
57 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T110 |
12 |
|
T111 |
14 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T110 |
61 |
|
T111 |
56 |
|
T112 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T110 |
52 |
|
T111 |
56 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
12 |
|
T111 |
14 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T110 |
59 |
|
T111 |
54 |
|
T112 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T110 |
52 |
|
T111 |
55 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
12 |
|
T111 |
14 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T110 |
59 |
|
T111 |
51 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T110 |
51 |
|
T111 |
54 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
12 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T110 |
56 |
|
T111 |
51 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T110 |
50 |
|
T111 |
52 |
|
T112 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
12 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T110 |
56 |
|
T111 |
50 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T110 |
49 |
|
T111 |
48 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
12 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T110 |
56 |
|
T111 |
49 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T110 |
46 |
|
T111 |
47 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
12 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T110 |
55 |
|
T111 |
49 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T110 |
44 |
|
T111 |
47 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T110 |
55 |
|
T111 |
48 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T110 |
41 |
|
T111 |
45 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T110 |
55 |
|
T111 |
47 |
|
T112 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T110 |
40 |
|
T111 |
43 |
|
T112 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T110 |
54 |
|
T111 |
45 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T110 |
40 |
|
T111 |
42 |
|
T112 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T110 |
53 |
|
T111 |
43 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T110 |
38 |
|
T111 |
40 |
|
T112 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T110 |
53 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T110 |
37 |
|
T111 |
40 |
|
T112 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T110 |
51 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
20 |
|
T111 |
12 |
|
T112 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T110 |
37 |
|
T111 |
40 |
|
T112 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
11 |
|
T111 |
13 |
|
T112 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T110 |
51 |
|
T111 |
39 |
|
T112 |
14 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57943 |
1 |
|
|
T110 |
1340 |
|
T111 |
1847 |
|
T112 |
721 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50718 |
1 |
|
|
T110 |
1650 |
|
T111 |
876 |
|
T112 |
698 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52427 |
1 |
|
|
T110 |
1467 |
|
T111 |
1201 |
|
T112 |
1219 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47672 |
1 |
|
|
T110 |
1361 |
|
T111 |
1108 |
|
T112 |
712 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T110 |
55 |
|
T111 |
58 |
|
T112 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
21 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T110 |
56 |
|
T111 |
52 |
|
T112 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T110 |
52 |
|
T111 |
54 |
|
T112 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T110 |
21 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T110 |
55 |
|
T111 |
51 |
|
T112 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T110 |
52 |
|
T111 |
51 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
21 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T110 |
54 |
|
T111 |
51 |
|
T112 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T110 |
52 |
|
T111 |
50 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
21 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T110 |
54 |
|
T111 |
51 |
|
T112 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T110 |
48 |
|
T111 |
47 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T110 |
53 |
|
T111 |
51 |
|
T112 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T110 |
46 |
|
T111 |
46 |
|
T112 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T110 |
51 |
|
T111 |
48 |
|
T112 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T110 |
45 |
|
T111 |
45 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T110 |
51 |
|
T111 |
47 |
|
T112 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T110 |
45 |
|
T111 |
44 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T110 |
49 |
|
T111 |
47 |
|
T112 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T110 |
45 |
|
T111 |
43 |
|
T112 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T110 |
47 |
|
T111 |
44 |
|
T112 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T110 |
44 |
|
T111 |
43 |
|
T112 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T110 |
46 |
|
T111 |
43 |
|
T112 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T110 |
42 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T110 |
46 |
|
T111 |
41 |
|
T112 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T110 |
41 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T110 |
44 |
|
T111 |
41 |
|
T112 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T110 |
40 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T110 |
44 |
|
T111 |
39 |
|
T112 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T110 |
40 |
|
T111 |
37 |
|
T112 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T110 |
41 |
|
T111 |
38 |
|
T112 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T110 |
38 |
|
T111 |
36 |
|
T112 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T110 |
40 |
|
T111 |
37 |
|
T112 |
29 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58002 |
1 |
|
|
T110 |
2102 |
|
T111 |
1311 |
|
T112 |
802 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44983 |
1 |
|
|
T110 |
952 |
|
T111 |
869 |
|
T112 |
439 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59106 |
1 |
|
|
T110 |
2418 |
|
T111 |
1204 |
|
T112 |
1026 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47952 |
1 |
|
|
T110 |
699 |
|
T111 |
1801 |
|
T112 |
1274 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T110 |
33 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T110 |
32 |
|
T111 |
38 |
|
T112 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T110 |
33 |
|
T111 |
38 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T110 |
30 |
|
T111 |
38 |
|
T112 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T110 |
32 |
|
T111 |
38 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T110 |
28 |
|
T111 |
38 |
|
T112 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T110 |
32 |
|
T111 |
37 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T110 |
27 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T110 |
32 |
|
T111 |
35 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T110 |
27 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T110 |
31 |
|
T111 |
32 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T110 |
27 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T110 |
31 |
|
T111 |
32 |
|
T112 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T110 |
23 |
|
T111 |
38 |
|
T112 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T110 |
30 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
31 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T110 |
22 |
|
T111 |
38 |
|
T112 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T110 |
30 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T110 |
22 |
|
T111 |
38 |
|
T112 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T110 |
30 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T110 |
21 |
|
T111 |
36 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T110 |
28 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T110 |
21 |
|
T111 |
35 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T110 |
28 |
|
T111 |
28 |
|
T112 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T110 |
21 |
|
T111 |
35 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T110 |
27 |
|
T111 |
26 |
|
T112 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T110 |
21 |
|
T111 |
34 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T110 |
27 |
|
T111 |
26 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T110 |
21 |
|
T111 |
32 |
|
T112 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
29 |
|
T111 |
22 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T110 |
27 |
|
T111 |
26 |
|
T112 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
23 |
|
T112 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T110 |
21 |
|
T111 |
31 |
|
T112 |
18 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56889 |
1 |
|
|
T110 |
1547 |
|
T111 |
1168 |
|
T112 |
874 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48085 |
1 |
|
|
T110 |
903 |
|
T111 |
1656 |
|
T112 |
756 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59138 |
1 |
|
|
T110 |
2305 |
|
T111 |
1498 |
|
T112 |
1590 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44778 |
1 |
|
|
T110 |
1080 |
|
T111 |
838 |
|
T112 |
378 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T110 |
43 |
|
T111 |
41 |
|
T112 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
30 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T110 |
43 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T110 |
42 |
|
T111 |
40 |
|
T112 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
30 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T110 |
43 |
|
T111 |
37 |
|
T112 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T110 |
41 |
|
T111 |
40 |
|
T112 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
30 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T110 |
43 |
|
T111 |
36 |
|
T112 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T110 |
40 |
|
T111 |
39 |
|
T112 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
30 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T110 |
43 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T110 |
40 |
|
T111 |
36 |
|
T112 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T110 |
42 |
|
T111 |
35 |
|
T112 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T110 |
40 |
|
T111 |
36 |
|
T112 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T110 |
30 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T110 |
42 |
|
T111 |
33 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T110 |
39 |
|
T111 |
36 |
|
T112 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
30 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T110 |
41 |
|
T111 |
32 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T110 |
38 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
30 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T110 |
40 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T110 |
38 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T110 |
40 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T110 |
36 |
|
T111 |
34 |
|
T112 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T110 |
39 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T110 |
36 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T110 |
38 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T110 |
36 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T110 |
37 |
|
T111 |
27 |
|
T112 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T110 |
34 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T110 |
37 |
|
T111 |
26 |
|
T112 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T110 |
33 |
|
T111 |
32 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T110 |
36 |
|
T111 |
26 |
|
T112 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
29 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T110 |
30 |
|
T111 |
32 |
|
T112 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T110 |
29 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T110 |
36 |
|
T111 |
26 |
|
T112 |
16 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57376 |
1 |
|
|
T110 |
1458 |
|
T111 |
1097 |
|
T112 |
1947 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52076 |
1 |
|
|
T110 |
1217 |
|
T111 |
1738 |
|
T112 |
311 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57911 |
1 |
|
|
T110 |
1538 |
|
T111 |
1312 |
|
T112 |
894 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43537 |
1 |
|
|
T110 |
1699 |
|
T111 |
940 |
|
T112 |
534 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T110 |
51 |
|
T111 |
48 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
19 |
|
T111 |
23 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T110 |
54 |
|
T111 |
43 |
|
T112 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T110 |
47 |
|
T111 |
44 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T110 |
19 |
|
T111 |
23 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T110 |
53 |
|
T111 |
43 |
|
T112 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T110 |
47 |
|
T111 |
43 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
19 |
|
T111 |
23 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T110 |
52 |
|
T111 |
43 |
|
T112 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T110 |
47 |
|
T111 |
42 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T110 |
19 |
|
T111 |
23 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T110 |
50 |
|
T111 |
42 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T110 |
45 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T110 |
49 |
|
T111 |
43 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T110 |
45 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T110 |
49 |
|
T111 |
43 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T110 |
44 |
|
T111 |
41 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T110 |
49 |
|
T111 |
42 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T110 |
44 |
|
T111 |
38 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T110 |
47 |
|
T111 |
42 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T110 |
44 |
|
T111 |
38 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T110 |
47 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T110 |
44 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T110 |
46 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T110 |
43 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T110 |
44 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T110 |
42 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T110 |
42 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T110 |
42 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T110 |
41 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T110 |
41 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T110 |
39 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T110 |
21 |
|
T111 |
18 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T110 |
40 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
22 |
|
T112 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T110 |
39 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57836 |
1 |
|
|
T110 |
1326 |
|
T111 |
1409 |
|
T112 |
954 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45978 |
1 |
|
|
T110 |
1283 |
|
T111 |
678 |
|
T112 |
705 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58031 |
1 |
|
|
T110 |
1759 |
|
T111 |
2161 |
|
T112 |
516 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47012 |
1 |
|
|
T110 |
1409 |
|
T111 |
873 |
|
T112 |
1432 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T110 |
63 |
|
T111 |
40 |
|
T112 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
16 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T110 |
62 |
|
T111 |
36 |
|
T112 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T110 |
60 |
|
T111 |
39 |
|
T112 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
16 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T110 |
62 |
|
T111 |
36 |
|
T112 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T110 |
58 |
|
T111 |
39 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
16 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T110 |
62 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T110 |
58 |
|
T111 |
39 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
16 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T110 |
60 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T110 |
58 |
|
T111 |
39 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
16 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T110 |
59 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T110 |
56 |
|
T111 |
37 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
16 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T110 |
58 |
|
T111 |
34 |
|
T112 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T110 |
56 |
|
T111 |
37 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T110 |
16 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T110 |
58 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T110 |
56 |
|
T111 |
36 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T110 |
16 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T110 |
57 |
|
T111 |
33 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T110 |
53 |
|
T111 |
35 |
|
T112 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T110 |
56 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T110 |
52 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T110 |
56 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T110 |
51 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T110 |
55 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T110 |
51 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T110 |
51 |
|
T111 |
28 |
|
T112 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T110 |
51 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T110 |
50 |
|
T111 |
27 |
|
T112 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T110 |
49 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T110 |
48 |
|
T111 |
27 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T110 |
14 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T110 |
47 |
|
T111 |
30 |
|
T112 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
15 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T110 |
46 |
|
T111 |
27 |
|
T112 |
22 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58707 |
1 |
|
|
T110 |
1664 |
|
T111 |
1485 |
|
T112 |
944 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47767 |
1 |
|
|
T110 |
933 |
|
T111 |
943 |
|
T112 |
1174 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56553 |
1 |
|
|
T110 |
2299 |
|
T111 |
1248 |
|
T112 |
1047 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47168 |
1 |
|
|
T110 |
998 |
|
T111 |
1711 |
|
T112 |
435 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T110 |
45 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T110 |
43 |
|
T111 |
36 |
|
T112 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T110 |
44 |
|
T111 |
35 |
|
T112 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T110 |
42 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T110 |
43 |
|
T111 |
35 |
|
T112 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T110 |
41 |
|
T111 |
35 |
|
T112 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T110 |
42 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T110 |
39 |
|
T111 |
35 |
|
T112 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T110 |
40 |
|
T111 |
33 |
|
T112 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T110 |
39 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T110 |
40 |
|
T111 |
30 |
|
T112 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T110 |
39 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T110 |
40 |
|
T111 |
30 |
|
T112 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T110 |
38 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T110 |
39 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
30 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T110 |
37 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T110 |
39 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T110 |
37 |
|
T111 |
31 |
|
T112 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T110 |
38 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T110 |
37 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T110 |
37 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T110 |
35 |
|
T111 |
30 |
|
T112 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T110 |
36 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T110 |
34 |
|
T111 |
30 |
|
T112 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T110 |
35 |
|
T111 |
29 |
|
T112 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T110 |
31 |
|
T111 |
30 |
|
T112 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T110 |
33 |
|
T111 |
29 |
|
T112 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T110 |
31 |
|
T111 |
30 |
|
T112 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
27 |
|
T111 |
18 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T110 |
33 |
|
T111 |
28 |
|
T112 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
29 |
|
T111 |
18 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T110 |
30 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63029 |
1 |
|
|
T110 |
2135 |
|
T111 |
2445 |
|
T112 |
1607 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42665 |
1 |
|
|
T110 |
906 |
|
T111 |
490 |
|
T112 |
591 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61170 |
1 |
|
|
T110 |
1772 |
|
T111 |
1701 |
|
T112 |
835 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43858 |
1 |
|
|
T110 |
1036 |
|
T111 |
753 |
|
T112 |
579 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T110 |
45 |
|
T111 |
32 |
|
T112 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T110 |
47 |
|
T111 |
34 |
|
T112 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T110 |
45 |
|
T111 |
31 |
|
T112 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T110 |
45 |
|
T111 |
33 |
|
T112 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T110 |
44 |
|
T111 |
30 |
|
T112 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T110 |
45 |
|
T111 |
33 |
|
T112 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T110 |
44 |
|
T111 |
27 |
|
T112 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
25 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T110 |
45 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T110 |
44 |
|
T111 |
25 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T110 |
45 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T110 |
44 |
|
T111 |
23 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T110 |
45 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T110 |
42 |
|
T111 |
22 |
|
T112 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T110 |
44 |
|
T111 |
31 |
|
T112 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T110 |
42 |
|
T111 |
21 |
|
T112 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T110 |
43 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T110 |
42 |
|
T111 |
20 |
|
T112 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T110 |
43 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T110 |
40 |
|
T111 |
20 |
|
T112 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T110 |
41 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T110 |
39 |
|
T111 |
20 |
|
T112 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T110 |
40 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T110 |
38 |
|
T111 |
19 |
|
T112 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T110 |
39 |
|
T111 |
30 |
|
T112 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T110 |
38 |
|
T111 |
19 |
|
T112 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T110 |
36 |
|
T111 |
28 |
|
T112 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T110 |
38 |
|
T111 |
19 |
|
T112 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T110 |
35 |
|
T111 |
28 |
|
T112 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T110 |
27 |
|
T111 |
24 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T110 |
38 |
|
T111 |
19 |
|
T112 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
25 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T110 |
34 |
|
T111 |
28 |
|
T112 |
19 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61460 |
1 |
|
|
T110 |
1368 |
|
T111 |
1863 |
|
T112 |
775 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46517 |
1 |
|
|
T110 |
1216 |
|
T111 |
1047 |
|
T112 |
1680 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53603 |
1 |
|
|
T110 |
1366 |
|
T111 |
1246 |
|
T112 |
307 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46368 |
1 |
|
|
T110 |
1765 |
|
T111 |
973 |
|
T112 |
555 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T110 |
57 |
|
T111 |
50 |
|
T112 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
22 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1765 |
1 |
|
|
T110 |
60 |
|
T111 |
48 |
|
T112 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T110 |
57 |
|
T111 |
50 |
|
T112 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T110 |
22 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T110 |
58 |
|
T111 |
47 |
|
T112 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T110 |
56 |
|
T111 |
50 |
|
T112 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
22 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T110 |
56 |
|
T111 |
45 |
|
T112 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T110 |
55 |
|
T111 |
49 |
|
T112 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
22 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T110 |
54 |
|
T111 |
45 |
|
T112 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T110 |
54 |
|
T111 |
49 |
|
T112 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T110 |
53 |
|
T111 |
44 |
|
T112 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T110 |
52 |
|
T111 |
48 |
|
T112 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T110 |
52 |
|
T111 |
44 |
|
T112 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T110 |
49 |
|
T111 |
44 |
|
T112 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T110 |
51 |
|
T111 |
41 |
|
T112 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T110 |
48 |
|
T111 |
43 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T110 |
50 |
|
T111 |
41 |
|
T112 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T110 |
45 |
|
T111 |
43 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T110 |
49 |
|
T111 |
40 |
|
T112 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T110 |
44 |
|
T111 |
43 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T110 |
47 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T110 |
43 |
|
T111 |
43 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T110 |
46 |
|
T111 |
37 |
|
T112 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T110 |
43 |
|
T111 |
42 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T110 |
46 |
|
T111 |
37 |
|
T112 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T110 |
45 |
|
T111 |
35 |
|
T112 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T110 |
44 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
24 |
|
T111 |
15 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T110 |
41 |
|
T111 |
40 |
|
T112 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T110 |
21 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T110 |
42 |
|
T111 |
33 |
|
T112 |
22 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57648 |
1 |
|
|
T110 |
1912 |
|
T111 |
731 |
|
T112 |
735 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48948 |
1 |
|
|
T110 |
1144 |
|
T111 |
2021 |
|
T112 |
422 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54195 |
1 |
|
|
T110 |
1842 |
|
T111 |
1148 |
|
T112 |
1144 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50432 |
1 |
|
|
T110 |
989 |
|
T111 |
1056 |
|
T112 |
1413 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T110 |
55 |
|
T111 |
58 |
|
T112 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T110 |
51 |
|
T111 |
61 |
|
T112 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T110 |
55 |
|
T111 |
58 |
|
T112 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T110 |
50 |
|
T111 |
60 |
|
T112 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T110 |
55 |
|
T111 |
55 |
|
T112 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T110 |
50 |
|
T111 |
59 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T110 |
54 |
|
T111 |
53 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T110 |
48 |
|
T111 |
59 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T110 |
52 |
|
T111 |
53 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T110 |
46 |
|
T111 |
56 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T110 |
51 |
|
T111 |
53 |
|
T112 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T110 |
46 |
|
T111 |
55 |
|
T112 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T110 |
50 |
|
T111 |
52 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T110 |
45 |
|
T111 |
51 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T110 |
49 |
|
T111 |
50 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
23 |
|
T111 |
13 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T110 |
45 |
|
T111 |
49 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T110 |
48 |
|
T111 |
47 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T110 |
44 |
|
T111 |
49 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T110 |
48 |
|
T111 |
47 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T110 |
44 |
|
T111 |
48 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T110 |
47 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T110 |
39 |
|
T111 |
46 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T110 |
45 |
|
T111 |
44 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T110 |
37 |
|
T111 |
43 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T110 |
43 |
|
T111 |
44 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T110 |
34 |
|
T111 |
42 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T110 |
43 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T110 |
34 |
|
T111 |
39 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T110 |
42 |
|
T111 |
42 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
12 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T110 |
34 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55160 |
1 |
|
|
T110 |
875 |
|
T111 |
867 |
|
T112 |
1777 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43304 |
1 |
|
|
T110 |
1042 |
|
T111 |
1199 |
|
T112 |
381 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58830 |
1 |
|
|
T110 |
2446 |
|
T111 |
983 |
|
T112 |
1101 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52289 |
1 |
|
|
T110 |
1301 |
|
T111 |
1884 |
|
T112 |
498 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T110 |
65 |
|
T111 |
51 |
|
T112 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T110 |
59 |
|
T111 |
52 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T110 |
63 |
|
T111 |
50 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T110 |
59 |
|
T111 |
52 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T110 |
62 |
|
T111 |
50 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T110 |
59 |
|
T111 |
52 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T110 |
61 |
|
T111 |
50 |
|
T112 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T110 |
23 |
|
T111 |
20 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T110 |
59 |
|
T111 |
51 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T110 |
59 |
|
T111 |
48 |
|
T112 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T110 |
58 |
|
T111 |
51 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T110 |
59 |
|
T111 |
47 |
|
T112 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T110 |
57 |
|
T111 |
50 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T110 |
57 |
|
T111 |
46 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T110 |
55 |
|
T111 |
50 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T110 |
57 |
|
T111 |
44 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T110 |
53 |
|
T111 |
45 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T110 |
54 |
|
T111 |
44 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T110 |
53 |
|
T111 |
44 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T110 |
52 |
|
T111 |
43 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T110 |
52 |
|
T111 |
42 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T110 |
49 |
|
T111 |
42 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T110 |
51 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T110 |
46 |
|
T111 |
42 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T110 |
50 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T110 |
45 |
|
T111 |
41 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T110 |
50 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T110 |
44 |
|
T111 |
41 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T110 |
50 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
16 |
|
T111 |
20 |
|
T112 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T110 |
42 |
|
T111 |
41 |
|
T112 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T110 |
23 |
|
T111 |
19 |
|
T112 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T110 |
50 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50227 |
1 |
|
|
T110 |
2203 |
|
T111 |
1307 |
|
T112 |
841 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51845 |
1 |
|
|
T110 |
1200 |
|
T111 |
1623 |
|
T112 |
581 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56673 |
1 |
|
|
T110 |
1222 |
|
T111 |
1317 |
|
T112 |
793 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49435 |
1 |
|
|
T110 |
1057 |
|
T111 |
1078 |
|
T112 |
1366 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T110 |
62 |
|
T111 |
40 |
|
T112 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T110 |
62 |
|
T111 |
41 |
|
T112 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T110 |
61 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T110 |
60 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T110 |
61 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T110 |
59 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T110 |
61 |
|
T111 |
38 |
|
T112 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T110 |
58 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T110 |
61 |
|
T111 |
35 |
|
T112 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T110 |
58 |
|
T111 |
39 |
|
T112 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T110 |
61 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T110 |
57 |
|
T111 |
38 |
|
T112 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T110 |
61 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T110 |
55 |
|
T111 |
37 |
|
T112 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T110 |
59 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T110 |
19 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T110 |
55 |
|
T111 |
37 |
|
T112 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T110 |
59 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T110 |
51 |
|
T111 |
35 |
|
T112 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T110 |
57 |
|
T111 |
33 |
|
T112 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T110 |
50 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T110 |
52 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T110 |
48 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T110 |
51 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T110 |
45 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T110 |
50 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T110 |
43 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T110 |
49 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T110 |
41 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
19 |
|
T111 |
17 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T110 |
47 |
|
T111 |
30 |
|
T112 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
18 |
|
T111 |
16 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T110 |
40 |
|
T111 |
31 |
|
T112 |
21 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58423 |
1 |
|
|
T110 |
1492 |
|
T111 |
1206 |
|
T112 |
859 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45870 |
1 |
|
|
T110 |
1280 |
|
T111 |
748 |
|
T112 |
1302 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56152 |
1 |
|
|
T110 |
1234 |
|
T111 |
1592 |
|
T112 |
715 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49921 |
1 |
|
|
T110 |
1841 |
|
T111 |
1699 |
|
T112 |
729 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T110 |
52 |
|
T111 |
46 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T110 |
52 |
|
T111 |
42 |
|
T112 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T110 |
51 |
|
T111 |
43 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T110 |
50 |
|
T111 |
41 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T110 |
50 |
|
T111 |
43 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T110 |
48 |
|
T111 |
41 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T110 |
48 |
|
T111 |
43 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T110 |
47 |
|
T111 |
39 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T110 |
48 |
|
T111 |
40 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T110 |
46 |
|
T111 |
37 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T110 |
48 |
|
T111 |
37 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T110 |
43 |
|
T111 |
37 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T110 |
48 |
|
T111 |
36 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T110 |
43 |
|
T111 |
37 |
|
T112 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T110 |
48 |
|
T111 |
35 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
23 |
|
T111 |
21 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T110 |
42 |
|
T111 |
37 |
|
T112 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T110 |
48 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T110 |
42 |
|
T111 |
36 |
|
T112 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T110 |
48 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T110 |
41 |
|
T111 |
35 |
|
T112 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T110 |
47 |
|
T111 |
34 |
|
T112 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T110 |
39 |
|
T111 |
33 |
|
T112 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T110 |
47 |
|
T111 |
31 |
|
T112 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T110 |
39 |
|
T111 |
32 |
|
T112 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T110 |
47 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T110 |
39 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T110 |
46 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T110 |
38 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
22 |
|
T111 |
16 |
|
T112 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T110 |
44 |
|
T111 |
30 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
22 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T110 |
35 |
|
T111 |
32 |
|
T112 |
21 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65108 |
1 |
|
|
T110 |
2248 |
|
T111 |
1617 |
|
T112 |
2011 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45364 |
1 |
|
|
T110 |
990 |
|
T111 |
919 |
|
T112 |
472 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56160 |
1 |
|
|
T110 |
1625 |
|
T111 |
2134 |
|
T112 |
633 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43367 |
1 |
|
|
T110 |
967 |
|
T111 |
573 |
|
T112 |
588 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T110 |
57 |
|
T111 |
38 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T110 |
24 |
|
T111 |
23 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T110 |
56 |
|
T111 |
38 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T110 |
52 |
|
T111 |
38 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T110 |
24 |
|
T111 |
23 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T110 |
55 |
|
T111 |
37 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T110 |
49 |
|
T111 |
37 |
|
T112 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
24 |
|
T111 |
23 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T110 |
52 |
|
T111 |
36 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T110 |
45 |
|
T111 |
37 |
|
T112 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T110 |
24 |
|
T111 |
23 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T110 |
50 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T110 |
45 |
|
T111 |
36 |
|
T112 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T110 |
50 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T110 |
43 |
|
T111 |
35 |
|
T112 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T110 |
50 |
|
T111 |
34 |
|
T112 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T110 |
41 |
|
T111 |
35 |
|
T112 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T110 |
49 |
|
T111 |
34 |
|
T112 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T110 |
41 |
|
T111 |
33 |
|
T112 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T110 |
47 |
|
T111 |
33 |
|
T112 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T110 |
40 |
|
T111 |
32 |
|
T112 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T110 |
47 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T110 |
38 |
|
T111 |
32 |
|
T112 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T110 |
47 |
|
T111 |
30 |
|
T112 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T110 |
37 |
|
T111 |
32 |
|
T112 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T110 |
45 |
|
T111 |
29 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T110 |
37 |
|
T111 |
31 |
|
T112 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T110 |
45 |
|
T111 |
28 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T110 |
34 |
|
T111 |
29 |
|
T112 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T110 |
44 |
|
T111 |
28 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T110 |
33 |
|
T111 |
29 |
|
T112 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T110 |
43 |
|
T111 |
25 |
|
T112 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T110 |
23 |
|
T111 |
22 |
|
T112 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T110 |
31 |
|
T111 |
29 |
|
T112 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
24 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T110 |
41 |
|
T111 |
24 |
|
T112 |
22 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59045 |
1 |
|
|
T110 |
1618 |
|
T111 |
1243 |
|
T112 |
1535 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46180 |
1 |
|
|
T110 |
1008 |
|
T111 |
875 |
|
T112 |
524 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58503 |
1 |
|
|
T110 |
2117 |
|
T111 |
1156 |
|
T112 |
827 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46177 |
1 |
|
|
T110 |
1166 |
|
T111 |
1852 |
|
T112 |
613 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T110 |
52 |
|
T111 |
51 |
|
T112 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
26 |
|
T111 |
12 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T110 |
49 |
|
T111 |
54 |
|
T112 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T110 |
49 |
|
T111 |
50 |
|
T112 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
26 |
|
T111 |
12 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T110 |
46 |
|
T111 |
54 |
|
T112 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T110 |
48 |
|
T111 |
49 |
|
T112 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
26 |
|
T111 |
12 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T110 |
43 |
|
T111 |
54 |
|
T112 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T110 |
48 |
|
T111 |
49 |
|
T112 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
26 |
|
T111 |
12 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T110 |
43 |
|
T111 |
54 |
|
T112 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T110 |
47 |
|
T111 |
46 |
|
T112 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
26 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T110 |
43 |
|
T111 |
55 |
|
T112 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T110 |
46 |
|
T111 |
45 |
|
T112 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T110 |
26 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T110 |
41 |
|
T111 |
53 |
|
T112 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T110 |
45 |
|
T111 |
43 |
|
T112 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
26 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T110 |
40 |
|
T111 |
53 |
|
T112 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T110 |
44 |
|
T111 |
41 |
|
T112 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T110 |
26 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T110 |
39 |
|
T111 |
49 |
|
T112 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T110 |
44 |
|
T111 |
39 |
|
T112 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T110 |
38 |
|
T111 |
49 |
|
T112 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T110 |
43 |
|
T111 |
39 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T110 |
37 |
|
T111 |
48 |
|
T112 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T110 |
41 |
|
T111 |
39 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T110 |
35 |
|
T111 |
47 |
|
T112 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T110 |
41 |
|
T111 |
38 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T110 |
35 |
|
T111 |
47 |
|
T112 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T110 |
41 |
|
T111 |
34 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T110 |
33 |
|
T111 |
47 |
|
T112 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T110 |
41 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T110 |
33 |
|
T111 |
46 |
|
T112 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T110 |
22 |
|
T111 |
14 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T110 |
40 |
|
T111 |
31 |
|
T112 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T110 |
25 |
|
T111 |
11 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T110 |
32 |
|
T111 |
44 |
|
T112 |
25 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61150 |
1 |
|
|
T110 |
1260 |
|
T111 |
1134 |
|
T112 |
874 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43634 |
1 |
|
|
T110 |
1323 |
|
T111 |
1208 |
|
T112 |
523 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59983 |
1 |
|
|
T110 |
2339 |
|
T111 |
1806 |
|
T112 |
844 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44883 |
1 |
|
|
T110 |
1024 |
|
T111 |
1005 |
|
T112 |
1351 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T110 |
54 |
|
T111 |
51 |
|
T112 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
18 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T110 |
57 |
|
T111 |
42 |
|
T112 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T110 |
53 |
|
T111 |
51 |
|
T112 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T110 |
18 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T110 |
57 |
|
T111 |
42 |
|
T112 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T110 |
50 |
|
T111 |
51 |
|
T112 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
18 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T110 |
55 |
|
T111 |
42 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T110 |
48 |
|
T111 |
51 |
|
T112 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T110 |
18 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T110 |
52 |
|
T111 |
42 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T110 |
46 |
|
T111 |
50 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T110 |
50 |
|
T111 |
43 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T110 |
44 |
|
T111 |
49 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T110 |
48 |
|
T111 |
41 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T110 |
44 |
|
T111 |
47 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T110 |
46 |
|
T111 |
41 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T110 |
43 |
|
T111 |
47 |
|
T112 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T110 |
46 |
|
T111 |
41 |
|
T112 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T110 |
43 |
|
T111 |
45 |
|
T112 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T110 |
42 |
|
T111 |
40 |
|
T112 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T110 |
42 |
|
T111 |
44 |
|
T112 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T110 |
41 |
|
T111 |
40 |
|
T112 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T110 |
42 |
|
T111 |
42 |
|
T112 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T110 |
41 |
|
T111 |
39 |
|
T112 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T110 |
41 |
|
T111 |
42 |
|
T112 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T110 |
41 |
|
T111 |
37 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T110 |
40 |
|
T111 |
42 |
|
T112 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T110 |
40 |
|
T111 |
37 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T110 |
40 |
|
T111 |
42 |
|
T112 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T110 |
39 |
|
T111 |
37 |
|
T112 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T110 |
20 |
|
T111 |
10 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T110 |
40 |
|
T111 |
38 |
|
T112 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
18 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T110 |
38 |
|
T111 |
36 |
|
T112 |
23 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57245 |
1 |
|
|
T110 |
1573 |
|
T111 |
2112 |
|
T112 |
801 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44732 |
1 |
|
|
T110 |
1383 |
|
T111 |
1073 |
|
T112 |
572 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63468 |
1 |
|
|
T110 |
1079 |
|
T111 |
996 |
|
T112 |
1641 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44200 |
1 |
|
|
T110 |
1714 |
|
T111 |
919 |
|
T112 |
566 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T110 |
57 |
|
T111 |
46 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T110 |
57 |
|
T111 |
42 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T110 |
57 |
|
T111 |
46 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T110 |
56 |
|
T111 |
41 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T110 |
57 |
|
T111 |
45 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T110 |
56 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T110 |
54 |
|
T111 |
43 |
|
T112 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T110 |
56 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T110 |
54 |
|
T111 |
42 |
|
T112 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T110 |
55 |
|
T111 |
40 |
|
T112 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T110 |
54 |
|
T111 |
42 |
|
T112 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T110 |
54 |
|
T111 |
40 |
|
T112 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T110 |
53 |
|
T111 |
42 |
|
T112 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T110 |
50 |
|
T111 |
37 |
|
T112 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T110 |
52 |
|
T111 |
42 |
|
T112 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T110 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T110 |
50 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T110 |
51 |
|
T111 |
40 |
|
T112 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T110 |
50 |
|
T111 |
36 |
|
T112 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T110 |
50 |
|
T111 |
40 |
|
T112 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T110 |
48 |
|
T111 |
35 |
|
T112 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T110 |
48 |
|
T111 |
39 |
|
T112 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T110 |
46 |
|
T111 |
34 |
|
T112 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T110 |
45 |
|
T111 |
38 |
|
T112 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T110 |
45 |
|
T111 |
34 |
|
T112 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T110 |
45 |
|
T111 |
37 |
|
T112 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T110 |
44 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T110 |
45 |
|
T111 |
36 |
|
T112 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T110 |
42 |
|
T111 |
31 |
|
T112 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T110 |
20 |
|
T111 |
19 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T110 |
45 |
|
T111 |
35 |
|
T112 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T110 |
21 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T110 |
39 |
|
T111 |
31 |
|
T112 |
19 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57805 |
1 |
|
|
T110 |
1416 |
|
T111 |
906 |
|
T112 |
667 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44627 |
1 |
|
|
T110 |
2175 |
|
T111 |
745 |
|
T112 |
1617 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65405 |
1 |
|
|
T110 |
946 |
|
T111 |
1917 |
|
T112 |
809 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42996 |
1 |
|
|
T110 |
1234 |
|
T111 |
1741 |
|
T112 |
473 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T110 |
62 |
|
T111 |
37 |
|
T112 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T110 |
63 |
|
T111 |
33 |
|
T112 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T110 |
62 |
|
T111 |
37 |
|
T112 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T110 |
60 |
|
T111 |
31 |
|
T112 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T110 |
62 |
|
T111 |
37 |
|
T112 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T110 |
57 |
|
T111 |
29 |
|
T112 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T110 |
60 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T110 |
54 |
|
T111 |
29 |
|
T112 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T110 |
56 |
|
T111 |
36 |
|
T112 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T110 |
54 |
|
T111 |
29 |
|
T112 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T110 |
56 |
|
T111 |
36 |
|
T112 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T110 |
53 |
|
T111 |
29 |
|
T112 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T110 |
56 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T110 |
53 |
|
T111 |
29 |
|
T112 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T110 |
56 |
|
T111 |
35 |
|
T112 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T110 |
53 |
|
T111 |
28 |
|
T112 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T110 |
55 |
|
T111 |
33 |
|
T112 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T110 |
53 |
|
T111 |
28 |
|
T112 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T110 |
54 |
|
T111 |
32 |
|
T112 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T110 |
48 |
|
T111 |
27 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T110 |
54 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T110 |
47 |
|
T111 |
27 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T110 |
54 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T110 |
46 |
|
T111 |
27 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T110 |
51 |
|
T111 |
31 |
|
T112 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T110 |
46 |
|
T111 |
26 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T110 |
51 |
|
T111 |
29 |
|
T112 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T110 |
45 |
|
T111 |
26 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T110 |
17 |
|
T111 |
19 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T110 |
51 |
|
T111 |
29 |
|
T112 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T110 |
16 |
|
T111 |
24 |
|
T112 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T110 |
41 |
|
T111 |
26 |
|
T112 |
16 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56562 |
1 |
|
|
T110 |
1575 |
|
T111 |
762 |
|
T112 |
980 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46781 |
1 |
|
|
T110 |
1753 |
|
T111 |
947 |
|
T112 |
1442 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59469 |
1 |
|
|
T110 |
990 |
|
T111 |
1155 |
|
T112 |
844 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46122 |
1 |
|
|
T110 |
1384 |
|
T111 |
2107 |
|
T112 |
360 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T110 |
69 |
|
T111 |
54 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T110 |
70 |
|
T111 |
58 |
|
T112 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T110 |
69 |
|
T111 |
53 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T110 |
68 |
|
T111 |
58 |
|
T112 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T110 |
69 |
|
T111 |
53 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T110 |
68 |
|
T111 |
58 |
|
T112 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T110 |
68 |
|
T111 |
50 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T110 |
66 |
|
T111 |
58 |
|
T112 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T110 |
66 |
|
T111 |
50 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T110 |
62 |
|
T111 |
56 |
|
T112 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T110 |
63 |
|
T111 |
46 |
|
T112 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T110 |
61 |
|
T111 |
56 |
|
T112 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T110 |
62 |
|
T111 |
44 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T110 |
61 |
|
T111 |
55 |
|
T112 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T110 |
60 |
|
T111 |
41 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T110 |
61 |
|
T111 |
54 |
|
T112 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T110 |
59 |
|
T111 |
39 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T110 |
60 |
|
T111 |
54 |
|
T112 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T110 |
57 |
|
T111 |
37 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T110 |
59 |
|
T111 |
53 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T110 |
57 |
|
T111 |
36 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T110 |
59 |
|
T111 |
52 |
|
T112 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T110 |
56 |
|
T111 |
35 |
|
T112 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T110 |
58 |
|
T111 |
50 |
|
T112 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T110 |
56 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T110 |
55 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T110 |
55 |
|
T111 |
34 |
|
T112 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T110 |
54 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T110 |
12 |
|
T111 |
17 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T110 |
53 |
|
T111 |
33 |
|
T112 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T110 |
11 |
|
T111 |
14 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T110 |
51 |
|
T111 |
49 |
|
T112 |
12 |