Unified Coverage Report :: Group Instance : masked_out_lower_mask_data_cov_obj

Group Instance : masked_out_lower_mask_data_cov_obj_pin3

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin3

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin3

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin3

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin4

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin4

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin4

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin4

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin5

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin5

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin5

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin5

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin6

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin6

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin6

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin6

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin7

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin7

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin7

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin7

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin8

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin8

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin8

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin8

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin9

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin9

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin9

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin9

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin0

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin1

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin1

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin1

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin10

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin10

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin10

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin10

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin11

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin11

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin11

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin11

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin12

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin12

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin12

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin12

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin13

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin13

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin13

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin13

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin14

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin14

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin14

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin14

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin15

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin15

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin15

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin15

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin2

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin2

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin2

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin3

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin3

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin3

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin3

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_upper_mask_data_cov_obj_pin4

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin4

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin4

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin4

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349845

T32

T48

1164

T49

2200

auto[1]

348451

T32

T48

1124

T49

2196

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348336

T32

T48

1157

T49

2186

auto[1]

349960

T32

T48

1131

T49

2210

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174671

T32

T48

588

T49

1120

auto[0]

auto[1]

175174

T32

T48

576

T49

1080

auto[1]

auto[0]

173665

T32

T48

569

T49

1066

auto[1]

174786

T48

555

T49

1130

T113

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348910

T32

T48

1168

T49

2163

auto[1]

349386

T32

T48

1120

T49

2233

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349285

T32

T48

1155

T49

2228

auto[1]

349011

T32

T48

1133

T49

2168

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174493

T32

T48

584

T49

1084

auto[0]

auto[1]

174417

T32

T48

584

T49

1079

auto[1]

auto[0]

174792

T32

T48

571

T49

1144

auto[1]

174594

T32

T48

549

T49

1089

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349657

T32

T48

1179

T49

2295

auto[1]

348639

T32

T48

1109

T49

2101

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348812

T32

T48

1134

T49

2168

auto[1]

349484

T32

T48

1154

T49

2228

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174529

T32

T48

576

T49

1116

auto[0]

auto[1]

175128

T32

T48

603

T49

1179

auto[1]

auto[0]

174283

T32

T48

558

T49

1052

auto[1]

174356

T32

T48

551

T49

1049

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348988

T32

T48

1145

T49

2222

auto[1]

349308

T32

T48

1143

T49

2174

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349056

T32

T48

1155

T49

2188

auto[1]

349240

T32

T48

1133

T49

2208

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174071

T32

T48

584

T49

1084

auto[0]

auto[1]

174917

T32

T48

561

T49

1138

auto[1]

auto[0]

174985

T32

T48

571

T49

1104

auto[1]

174323

T32

T48

572

T49

1070

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348959

T32

T48

1091

T49

2179

auto[1]

349337

T32

T48

1197

T49

2217

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349638

T32

T48

1136

T49

2253

auto[1]

348658

T32

T48

1152

T49

2143

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174664

T32

T48

535

T49

1139

auto[0]

auto[1]

174295

T32

T48

556

T49

1040

auto[1]

auto[0]

174974

T32

T48

601

T49

1114

auto[1]

174363

T32

T48

596

T49

1103

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349330

T32

T48

1181

T49

2204

auto[1]

348966

T32

T48

1107

T49

2192

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349256

T32

T48

1146

T49

2207

auto[1]

349040

T32

T48

1142

T49

2189

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174814

T32

T48

585

T49

1126

auto[0]

auto[1]

174516

T32

T48

596

T49

1078

auto[1]

auto[0]

174442

T32

T48

561

T49

1081

auto[1]

174524

T32

T48

546

T49

1111

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349681

T32

T48

1124

T49

2222

auto[1]

348615

T32

T48

1164

T49

2174

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348983

T32

T48

1187

T49

2198

auto[1]

349313

T32

T48

1101

T49

2198

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174866

T32

T48

589

T49

1132

auto[0]

auto[1]

174815

T32

T48

535

T49

1090

auto[1]

auto[0]

174117

T32

T48

598

T49

1066

auto[1]

174498

T32

T48

566

T49

1108

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348695

T32

T48

1155

T49

2205

auto[1]

348505

T32

T48

1092

T49

2250

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348263

T32

T48

1130

T49

2211

auto[1]

348937

T32

T48

1117

T49

2244

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174223

T32

T48

572

T49

1116

auto[0]

auto[1]

174472

T32

T48

583

T49

1089

auto[1]

auto[0]

174040

T32

T48

558

T49

1095

auto[1]

174465

T32

T48

534

T49

1155

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348975

T32

T48

1158

T49

2219

auto[1]

348225

T32

T48

1089

T49

2236

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348860

T32

T48

1140

T49

2280

auto[1]

348340

T32

T48

1107

T49

2175

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174332

T32

T48

588

T49

1139

auto[0]

auto[1]

174643

T32

T48

570

T49

1080

auto[1]

auto[0]

174528

T32

T48

552

T49

1141

auto[1]

173697

T32

T48

537

T49

1095

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349014

T32

T48

1131

T49

2186

auto[1]

348186

T32

T48

1116

T49

2269

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348727

T32

T48

1132

T49

2222

auto[1]

348473

T32

T48

1115

T49

2233

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174863

T48

580

T49

1121

T113

auto[0]

auto[1]

174151

T32

T48

551

T49

1065

auto[1]

auto[0]

173864

T32

T48

552

T49

1101

auto[1]

174322

T32

T48

564

T49

1168

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348675

T32

T48

1143

T49

2205

auto[1]

348525

T32

T48

1104

T49

2250

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348131

T32

T48

1131

T49

2195

auto[1]

349069

T32

T48

1116

T49

2260

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174277

T32

T48

568

T49

1079

auto[0]

auto[1]

174398

T32

T48

575

T49

1126

auto[1]

auto[0]

173854

T32

T48

563

T49

1116

auto[1]

174671

T32

T48

541

T49

1134

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348317

T32

T48

1135

T49

2222

auto[1]

348883

T32

T48

1112

T49

2233

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348470

T32

T48

1107

T49

2231

auto[1]

348730

T32

T48

1140

T49

2224

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174205

T32

T48

567

T49

1111

auto[0]

auto[1]

174112

T32

T48

568

T49

1111

auto[1]

auto[0]

174265

T32

T48

540

T49

1120

auto[1]

174618

T32

T48

572

T49

1113

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348502

T32

T48

1088

T49

2198

auto[1]

348698

T32

T48

1159

T49

2257

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348552

T32

T48

1103

T49

2202

auto[1]

348648

T32

T48

1144

T49

2253

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174244

T32

T48

542

T49

1132

auto[0]

auto[1]

174258

T32

T48

546

T49

1066

auto[1]

auto[0]

174308

T32

T48

561

T49

1070

auto[1]

174390

T32

T48

598

T49

1187

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348662

T32

T48

1179

T49

2252

auto[1]

348538

T32

T48

1068

T49

2203

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348406

T32

T48

1121

T49

2239

auto[1]

348794

T32

T48

1126

T49

2216

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174462

T32

T48

587

T49

1141

auto[0]

auto[1]

174200

T32

T48

592

T49

1111

auto[1]

auto[0]

173944

T32

T48

534

T49

1098

auto[1]

174594

T32

T48

534

T49

1105

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348106

T32

T48

1147

T49

2150

auto[1]

349094

T32

T48

1100

T49

2305

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348823

T32

T48

1091

T49

2244

auto[1]

348377

T32

T48

1156

T49

2211

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174159

T32

T48

544

T49

1070

auto[0]

auto[1]

173947

T32

T48

603

T49

1080

auto[1]

auto[0]

174664

T32

T48

547

T49

1174

auto[1]

174430

T32

T48

553

T49

1131

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348156

T32

T48

1113

T49

2262

auto[1]

349044

T32

T48

1134

T49

2193

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348778

T32

T48

1128

T49

2272

auto[1]

348422

T32

T48

1119

T49

2183

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

173999

T32

T48

549

T49

1135

auto[0]

auto[1]

174157

T32

T48

564

T49

1127

auto[1]

auto[0]

174779

T32

T48

579

T49

1137

auto[1]

174265

T32

T48

555

T49

1056

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348711

T32

T48

1095

T49

2247

auto[1]

348489

T32

T48

1152

T49

2208

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

347957

T32

T48

1107

T49

2231

auto[1]

349243

T32

T48

1140

T49

2224

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174283

T32

T48

534

T49

1121

auto[0]

auto[1]

174428

T32

T48

561

T49

1126

auto[1]

auto[0]

173674

T32

T48

573

T49

1110

auto[1]

174815

T32

T48

579

T49

1098

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348034

T32

T48

1107

T49

2249

auto[1]

349166

T32

T48

1140

T49

2206

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

348498

T32

T48

1119

T49

2202

auto[1]

348702

T32

T48

1128

T49

2253

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174247

T32

T48

542

T49

1117

auto[0]

auto[1]

173787

T32

T48

565

T49

1132

auto[1]

auto[0]

174251

T32

T48

577

T49

1085

auto[1]

174915

T32

T48

563

T49

1121