Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3132507 |
1 |
|
|
T44 |
102 |
|
T45 |
90 |
|
T46 |
142 |
| auto[1] |
2743181 |
1 |
|
|
T44 |
94 |
|
T45 |
120 |
|
T46 |
154 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3699214 |
1 |
|
|
T44 |
86 |
|
T45 |
128 |
|
T46 |
132 |
| auto[1] |
2176474 |
1 |
|
|
T44 |
110 |
|
T45 |
82 |
|
T46 |
164 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2037789 |
1 |
|
|
T44 |
44 |
|
T45 |
49 |
|
T46 |
61 |
| auto[0] |
auto[1] |
1094718 |
1 |
|
|
T44 |
58 |
|
T45 |
41 |
|
T46 |
81 |
| auto[1] |
auto[0] |
1661425 |
1 |
|
|
T44 |
42 |
|
T45 |
79 |
|
T46 |
71 |
| auto[1] |
auto[1] |
1081756 |
1 |
|
|
T44 |
52 |
|
T45 |
41 |
|
T46 |
83 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3132324 |
1 |
|
|
T44 |
88 |
|
T45 |
106 |
|
T46 |
156 |
| auto[1] |
2743364 |
1 |
|
|
T44 |
108 |
|
T45 |
104 |
|
T46 |
140 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3700811 |
1 |
|
|
T44 |
115 |
|
T45 |
123 |
|
T46 |
152 |
| auto[1] |
2174877 |
1 |
|
|
T44 |
81 |
|
T45 |
87 |
|
T46 |
144 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2038389 |
1 |
|
|
T44 |
46 |
|
T45 |
67 |
|
T46 |
72 |
| auto[0] |
auto[1] |
1093935 |
1 |
|
|
T44 |
42 |
|
T45 |
39 |
|
T46 |
84 |
| auto[1] |
auto[0] |
1662422 |
1 |
|
|
T44 |
69 |
|
T45 |
56 |
|
T46 |
80 |
| auto[1] |
auto[1] |
1080942 |
1 |
|
|
T44 |
39 |
|
T45 |
48 |
|
T46 |
60 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3136013 |
1 |
|
|
T44 |
90 |
|
T45 |
102 |
|
T46 |
140 |
| auto[1] |
2739675 |
1 |
|
|
T44 |
106 |
|
T45 |
108 |
|
T46 |
156 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3703016 |
1 |
|
|
T44 |
83 |
|
T45 |
99 |
|
T46 |
152 |
| auto[1] |
2172672 |
1 |
|
|
T44 |
113 |
|
T45 |
111 |
|
T46 |
144 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2042241 |
1 |
|
|
T44 |
34 |
|
T45 |
44 |
|
T46 |
72 |
| auto[0] |
auto[1] |
1093772 |
1 |
|
|
T44 |
56 |
|
T45 |
58 |
|
T46 |
68 |
| auto[1] |
auto[0] |
1660775 |
1 |
|
|
T44 |
49 |
|
T45 |
55 |
|
T46 |
80 |
| auto[1] |
auto[1] |
1078900 |
1 |
|
|
T44 |
57 |
|
T45 |
53 |
|
T46 |
76 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3135704 |
1 |
|
|
T44 |
72 |
|
T45 |
122 |
|
T46 |
160 |
| auto[1] |
2739984 |
1 |
|
|
T44 |
124 |
|
T45 |
88 |
|
T46 |
136 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3699488 |
1 |
|
|
T44 |
110 |
|
T45 |
100 |
|
T46 |
146 |
| auto[1] |
2176200 |
1 |
|
|
T44 |
86 |
|
T45 |
110 |
|
T46 |
150 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2038660 |
1 |
|
|
T44 |
36 |
|
T45 |
55 |
|
T46 |
78 |
| auto[0] |
auto[1] |
1097044 |
1 |
|
|
T44 |
36 |
|
T45 |
67 |
|
T46 |
82 |
| auto[1] |
auto[0] |
1660828 |
1 |
|
|
T44 |
74 |
|
T45 |
45 |
|
T46 |
68 |
| auto[1] |
auto[1] |
1079156 |
1 |
|
|
T44 |
50 |
|
T45 |
43 |
|
T46 |
68 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3140900 |
1 |
|
|
T44 |
116 |
|
T45 |
96 |
|
T46 |
120 |
| auto[1] |
2734788 |
1 |
|
|
T44 |
80 |
|
T45 |
114 |
|
T46 |
176 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3700989 |
1 |
|
|
T44 |
99 |
|
T45 |
94 |
|
T46 |
168 |
| auto[1] |
2174699 |
1 |
|
|
T44 |
97 |
|
T45 |
116 |
|
T46 |
128 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2043026 |
1 |
|
|
T44 |
61 |
|
T45 |
44 |
|
T46 |
65 |
| auto[0] |
auto[1] |
1097874 |
1 |
|
|
T44 |
55 |
|
T45 |
52 |
|
T46 |
55 |
| auto[1] |
auto[0] |
1657963 |
1 |
|
|
T44 |
38 |
|
T45 |
50 |
|
T46 |
103 |
| auto[1] |
auto[1] |
1076825 |
1 |
|
|
T44 |
42 |
|
T45 |
64 |
|
T46 |
73 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3133633 |
1 |
|
|
T44 |
82 |
|
T45 |
114 |
|
T46 |
160 |
| auto[1] |
2742055 |
1 |
|
|
T44 |
114 |
|
T45 |
96 |
|
T46 |
136 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3704754 |
1 |
|
|
T44 |
116 |
|
T45 |
101 |
|
T46 |
152 |
| auto[1] |
2170934 |
1 |
|
|
T44 |
80 |
|
T45 |
109 |
|
T46 |
144 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2041647 |
1 |
|
|
T44 |
45 |
|
T45 |
55 |
|
T46 |
83 |
| auto[0] |
auto[1] |
1091986 |
1 |
|
|
T44 |
37 |
|
T45 |
59 |
|
T46 |
77 |
| auto[1] |
auto[0] |
1663107 |
1 |
|
|
T44 |
71 |
|
T45 |
46 |
|
T46 |
69 |
| auto[1] |
auto[1] |
1078948 |
1 |
|
|
T44 |
43 |
|
T45 |
50 |
|
T46 |
67 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3139834 |
1 |
|
|
T44 |
114 |
|
T45 |
110 |
|
T46 |
178 |
| auto[1] |
2735854 |
1 |
|
|
T44 |
82 |
|
T45 |
100 |
|
T46 |
118 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3701167 |
1 |
|
|
T44 |
91 |
|
T45 |
107 |
|
T46 |
143 |
| auto[1] |
2174521 |
1 |
|
|
T44 |
105 |
|
T45 |
103 |
|
T46 |
153 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2042507 |
1 |
|
|
T44 |
54 |
|
T45 |
54 |
|
T46 |
90 |
| auto[0] |
auto[1] |
1097327 |
1 |
|
|
T44 |
60 |
|
T45 |
56 |
|
T46 |
88 |
| auto[1] |
auto[0] |
1658660 |
1 |
|
|
T44 |
37 |
|
T45 |
53 |
|
T46 |
53 |
| auto[1] |
auto[1] |
1077194 |
1 |
|
|
T44 |
45 |
|
T45 |
47 |
|
T46 |
65 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3132692 |
1 |
|
|
T44 |
104 |
|
T45 |
94 |
|
T46 |
132 |
| auto[1] |
2742996 |
1 |
|
|
T44 |
92 |
|
T45 |
116 |
|
T46 |
164 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3699751 |
1 |
|
|
T44 |
99 |
|
T45 |
111 |
|
T46 |
146 |
| auto[1] |
2175937 |
1 |
|
|
T44 |
97 |
|
T45 |
99 |
|
T46 |
150 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2038533 |
1 |
|
|
T44 |
49 |
|
T45 |
49 |
|
T46 |
59 |
| auto[0] |
auto[1] |
1094159 |
1 |
|
|
T44 |
55 |
|
T45 |
45 |
|
T46 |
73 |
| auto[1] |
auto[0] |
1661218 |
1 |
|
|
T44 |
50 |
|
T45 |
62 |
|
T46 |
87 |
| auto[1] |
auto[1] |
1081778 |
1 |
|
|
T44 |
42 |
|
T45 |
54 |
|
T46 |
77 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3133694 |
1 |
|
|
T44 |
98 |
|
T45 |
108 |
|
T46 |
154 |
| auto[1] |
2741994 |
1 |
|
|
T44 |
98 |
|
T45 |
102 |
|
T46 |
142 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3712779 |
1 |
|
|
T44 |
98 |
|
T45 |
101 |
|
T46 |
146 |
| auto[1] |
2162909 |
1 |
|
|
T44 |
98 |
|
T45 |
109 |
|
T46 |
150 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2045937 |
1 |
|
|
T44 |
47 |
|
T45 |
53 |
|
T46 |
73 |
| auto[0] |
auto[1] |
1087757 |
1 |
|
|
T44 |
51 |
|
T45 |
55 |
|
T46 |
81 |
| auto[1] |
auto[0] |
1666842 |
1 |
|
|
T44 |
51 |
|
T45 |
48 |
|
T46 |
73 |
| auto[1] |
auto[1] |
1075152 |
1 |
|
|
T44 |
47 |
|
T45 |
54 |
|
T46 |
69 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3131981 |
1 |
|
|
T44 |
90 |
|
T45 |
100 |
|
T46 |
142 |
| auto[1] |
2743707 |
1 |
|
|
T44 |
106 |
|
T45 |
110 |
|
T46 |
154 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3712877 |
1 |
|
|
T44 |
111 |
|
T45 |
115 |
|
T46 |
153 |
| auto[1] |
2162811 |
1 |
|
|
T44 |
85 |
|
T45 |
95 |
|
T46 |
143 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2044808 |
1 |
|
|
T44 |
47 |
|
T45 |
54 |
|
T46 |
76 |
| auto[0] |
auto[1] |
1087173 |
1 |
|
|
T44 |
43 |
|
T45 |
46 |
|
T46 |
66 |
| auto[1] |
auto[0] |
1668069 |
1 |
|
|
T44 |
64 |
|
T45 |
61 |
|
T46 |
77 |
| auto[1] |
auto[1] |
1075638 |
1 |
|
|
T44 |
42 |
|
T45 |
49 |
|
T46 |
77 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3133577 |
1 |
|
|
T44 |
114 |
|
T45 |
110 |
|
T46 |
144 |
| auto[1] |
2742111 |
1 |
|
|
T44 |
82 |
|
T45 |
100 |
|
T46 |
152 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3713688 |
1 |
|
|
T44 |
85 |
|
T45 |
107 |
|
T46 |
154 |
| auto[1] |
2162000 |
1 |
|
|
T44 |
111 |
|
T45 |
103 |
|
T46 |
142 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2046459 |
1 |
|
|
T44 |
46 |
|
T45 |
55 |
|
T46 |
68 |
| auto[0] |
auto[1] |
1087118 |
1 |
|
|
T44 |
68 |
|
T45 |
55 |
|
T46 |
76 |
| auto[1] |
auto[0] |
1667229 |
1 |
|
|
T44 |
39 |
|
T45 |
52 |
|
T46 |
86 |
| auto[1] |
auto[1] |
1074882 |
1 |
|
|
T44 |
43 |
|
T45 |
48 |
|
T46 |
66 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3136748 |
1 |
|
|
T44 |
92 |
|
T45 |
106 |
|
T46 |
152 |
| auto[1] |
2738940 |
1 |
|
|
T44 |
104 |
|
T45 |
104 |
|
T46 |
144 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3709365 |
1 |
|
|
T44 |
96 |
|
T45 |
103 |
|
T46 |
155 |
| auto[1] |
2166323 |
1 |
|
|
T44 |
100 |
|
T45 |
107 |
|
T46 |
141 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2045572 |
1 |
|
|
T44 |
44 |
|
T45 |
48 |
|
T46 |
77 |
| auto[0] |
auto[1] |
1091176 |
1 |
|
|
T44 |
48 |
|
T45 |
58 |
|
T46 |
75 |
| auto[1] |
auto[0] |
1663793 |
1 |
|
|
T44 |
52 |
|
T45 |
55 |
|
T46 |
78 |
| auto[1] |
auto[1] |
1075147 |
1 |
|
|
T44 |
52 |
|
T45 |
49 |
|
T46 |
66 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3135136 |
1 |
|
|
T44 |
114 |
|
T45 |
108 |
|
T46 |
148 |
| auto[1] |
2740552 |
1 |
|
|
T44 |
82 |
|
T45 |
102 |
|
T46 |
148 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3702398 |
1 |
|
|
T44 |
96 |
|
T45 |
110 |
|
T46 |
163 |
| auto[1] |
2173290 |
1 |
|
|
T44 |
100 |
|
T45 |
100 |
|
T46 |
133 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2042656 |
1 |
|
|
T44 |
54 |
|
T45 |
50 |
|
T46 |
87 |
| auto[0] |
auto[1] |
1092480 |
1 |
|
|
T44 |
60 |
|
T45 |
58 |
|
T46 |
61 |
| auto[1] |
auto[0] |
1659742 |
1 |
|
|
T44 |
42 |
|
T45 |
60 |
|
T46 |
76 |
| auto[1] |
auto[1] |
1080810 |
1 |
|
|
T44 |
40 |
|
T45 |
42 |
|
T46 |
72 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3136231 |
1 |
|
|
T44 |
110 |
|
T45 |
114 |
|
T46 |
146 |
| auto[1] |
2739457 |
1 |
|
|
T44 |
86 |
|
T45 |
96 |
|
T46 |
150 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3710524 |
1 |
|
|
T44 |
98 |
|
T45 |
87 |
|
T46 |
153 |
| auto[1] |
2165164 |
1 |
|
|
T44 |
98 |
|
T45 |
123 |
|
T46 |
143 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2046871 |
1 |
|
|
T44 |
53 |
|
T45 |
46 |
|
T46 |
82 |
| auto[0] |
auto[1] |
1089360 |
1 |
|
|
T44 |
57 |
|
T45 |
68 |
|
T46 |
64 |
| auto[1] |
auto[0] |
1663653 |
1 |
|
|
T44 |
45 |
|
T45 |
41 |
|
T46 |
71 |
| auto[1] |
auto[1] |
1075804 |
1 |
|
|
T44 |
41 |
|
T45 |
55 |
|
T46 |
79 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3137812 |
1 |
|
|
T44 |
82 |
|
T45 |
102 |
|
T46 |
158 |
| auto[1] |
2737876 |
1 |
|
|
T44 |
114 |
|
T45 |
108 |
|
T46 |
138 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3715110 |
1 |
|
|
T44 |
115 |
|
T45 |
101 |
|
T46 |
156 |
| auto[1] |
2160578 |
1 |
|
|
T44 |
81 |
|
T45 |
109 |
|
T46 |
140 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2047395 |
1 |
|
|
T44 |
51 |
|
T45 |
40 |
|
T46 |
82 |
| auto[0] |
auto[1] |
1090417 |
1 |
|
|
T44 |
31 |
|
T45 |
62 |
|
T46 |
76 |
| auto[1] |
auto[0] |
1667715 |
1 |
|
|
T44 |
64 |
|
T45 |
61 |
|
T46 |
74 |
| auto[1] |
auto[1] |
1070161 |
1 |
|
|
T44 |
50 |
|
T45 |
47 |
|
T46 |
64 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3137434 |
1 |
|
|
T44 |
104 |
|
T45 |
94 |
|
T46 |
140 |
| auto[1] |
2738254 |
1 |
|
|
T44 |
92 |
|
T45 |
116 |
|
T46 |
156 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3714443 |
1 |
|
|
T44 |
98 |
|
T45 |
108 |
|
T46 |
146 |
| auto[1] |
2161245 |
1 |
|
|
T44 |
98 |
|
T45 |
102 |
|
T46 |
150 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2050594 |
1 |
|
|
T44 |
54 |
|
T45 |
47 |
|
T46 |
72 |
| auto[0] |
auto[1] |
1086840 |
1 |
|
|
T44 |
50 |
|
T45 |
47 |
|
T46 |
68 |
| auto[1] |
auto[0] |
1663849 |
1 |
|
|
T44 |
44 |
|
T45 |
61 |
|
T46 |
74 |
| auto[1] |
auto[1] |
1074405 |
1 |
|
|
T44 |
48 |
|
T45 |
55 |
|
T46 |
82 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3130993 |
1 |
|
|
T44 |
80 |
|
T45 |
106 |
|
T46 |
148 |
| auto[1] |
2744695 |
1 |
|
|
T44 |
116 |
|
T45 |
104 |
|
T46 |
148 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3710520 |
1 |
|
|
T44 |
95 |
|
T45 |
94 |
|
T46 |
160 |
| auto[1] |
2165168 |
1 |
|
|
T44 |
101 |
|
T45 |
116 |
|
T46 |
136 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2041872 |
1 |
|
|
T44 |
38 |
|
T45 |
44 |
|
T46 |
79 |
| auto[0] |
auto[1] |
1089121 |
1 |
|
|
T44 |
42 |
|
T45 |
62 |
|
T46 |
69 |
| auto[1] |
auto[0] |
1668648 |
1 |
|
|
T44 |
57 |
|
T45 |
50 |
|
T46 |
81 |
| auto[1] |
auto[1] |
1076047 |
1 |
|
|
T44 |
59 |
|
T45 |
54 |
|
T46 |
67 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3136447 |
1 |
|
|
T44 |
82 |
|
T45 |
104 |
|
T46 |
138 |
| auto[1] |
2739241 |
1 |
|
|
T44 |
114 |
|
T45 |
106 |
|
T46 |
158 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3713389 |
1 |
|
|
T44 |
95 |
|
T45 |
112 |
|
T46 |
138 |
| auto[1] |
2162299 |
1 |
|
|
T44 |
101 |
|
T45 |
98 |
|
T46 |
158 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2045886 |
1 |
|
|
T44 |
44 |
|
T45 |
55 |
|
T46 |
66 |
| auto[0] |
auto[1] |
1090561 |
1 |
|
|
T44 |
38 |
|
T45 |
49 |
|
T46 |
72 |
| auto[1] |
auto[0] |
1667503 |
1 |
|
|
T44 |
51 |
|
T45 |
57 |
|
T46 |
72 |
| auto[1] |
auto[1] |
1071738 |
1 |
|
|
T44 |
63 |
|
T45 |
49 |
|
T46 |
86 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3136271 |
1 |
|
|
T44 |
104 |
|
T45 |
114 |
|
T46 |
166 |
| auto[1] |
2739417 |
1 |
|
|
T44 |
92 |
|
T45 |
96 |
|
T46 |
130 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3714098 |
1 |
|
|
T44 |
116 |
|
T45 |
81 |
|
T46 |
126 |
| auto[1] |
2161590 |
1 |
|
|
T44 |
80 |
|
T45 |
129 |
|
T46 |
170 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2048075 |
1 |
|
|
T44 |
64 |
|
T45 |
49 |
|
T46 |
75 |
| auto[0] |
auto[1] |
1088196 |
1 |
|
|
T44 |
40 |
|
T45 |
65 |
|
T46 |
91 |
| auto[1] |
auto[0] |
1666023 |
1 |
|
|
T44 |
52 |
|
T45 |
32 |
|
T46 |
51 |
| auto[1] |
auto[1] |
1073394 |
1 |
|
|
T44 |
40 |
|
T45 |
64 |
|
T46 |
79 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3130814 |
1 |
|
|
T44 |
106 |
|
T45 |
128 |
|
T46 |
154 |
| auto[1] |
2744874 |
1 |
|
|
T44 |
90 |
|
T45 |
82 |
|
T46 |
142 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3710443 |
1 |
|
|
T44 |
92 |
|
T45 |
103 |
|
T46 |
141 |
| auto[1] |
2165245 |
1 |
|
|
T44 |
104 |
|
T45 |
107 |
|
T46 |
155 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2042538 |
1 |
|
|
T44 |
48 |
|
T45 |
56 |
|
T46 |
75 |
| auto[0] |
auto[1] |
1088276 |
1 |
|
|
T44 |
58 |
|
T45 |
72 |
|
T46 |
79 |
| auto[1] |
auto[0] |
1667905 |
1 |
|
|
T44 |
44 |
|
T45 |
47 |
|
T46 |
66 |
| auto[1] |
auto[1] |
1076969 |
1 |
|
|
T44 |
46 |
|
T45 |
35 |
|
T46 |
76 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3135325 |
1 |
|
|
T44 |
100 |
|
T45 |
94 |
|
T46 |
132 |
| auto[1] |
2740363 |
1 |
|
|
T44 |
96 |
|
T45 |
116 |
|
T46 |
164 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3709882 |
1 |
|
|
T44 |
83 |
|
T45 |
116 |
|
T46 |
161 |
| auto[1] |
2165806 |
1 |
|
|
T44 |
113 |
|
T45 |
94 |
|
T46 |
135 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2045858 |
1 |
|
|
T44 |
42 |
|
T45 |
57 |
|
T46 |
74 |
| auto[0] |
auto[1] |
1089467 |
1 |
|
|
T44 |
58 |
|
T45 |
37 |
|
T46 |
58 |
| auto[1] |
auto[0] |
1664024 |
1 |
|
|
T44 |
41 |
|
T45 |
59 |
|
T46 |
87 |
| auto[1] |
auto[1] |
1076339 |
1 |
|
|
T44 |
55 |
|
T45 |
57 |
|
T46 |
77 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3140076 |
1 |
|
|
T44 |
88 |
|
T45 |
114 |
|
T46 |
146 |
| auto[1] |
2735612 |
1 |
|
|
T44 |
108 |
|
T45 |
96 |
|
T46 |
150 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3712594 |
1 |
|
|
T44 |
98 |
|
T45 |
127 |
|
T46 |
119 |
| auto[1] |
2163094 |
1 |
|
|
T44 |
98 |
|
T45 |
83 |
|
T46 |
177 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2049415 |
1 |
|
|
T44 |
42 |
|
T45 |
68 |
|
T46 |
50 |
| auto[0] |
auto[1] |
1090661 |
1 |
|
|
T44 |
46 |
|
T45 |
46 |
|
T46 |
96 |
| auto[1] |
auto[0] |
1663179 |
1 |
|
|
T44 |
56 |
|
T45 |
59 |
|
T46 |
69 |
| auto[1] |
auto[1] |
1072433 |
1 |
|
|
T44 |
52 |
|
T45 |
37 |
|
T46 |
81 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3137215 |
1 |
|
|
T44 |
92 |
|
T45 |
106 |
|
T46 |
156 |
| auto[1] |
2738473 |
1 |
|
|
T44 |
104 |
|
T45 |
104 |
|
T46 |
140 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3707839 |
1 |
|
|
T44 |
83 |
|
T45 |
100 |
|
T46 |
160 |
| auto[1] |
2167849 |
1 |
|
|
T44 |
113 |
|
T45 |
110 |
|
T46 |
136 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2045457 |
1 |
|
|
T44 |
41 |
|
T45 |
49 |
|
T46 |
78 |
| auto[0] |
auto[1] |
1091758 |
1 |
|
|
T44 |
51 |
|
T45 |
57 |
|
T46 |
78 |
| auto[1] |
auto[0] |
1662382 |
1 |
|
|
T44 |
42 |
|
T45 |
51 |
|
T46 |
82 |
| auto[1] |
auto[1] |
1076091 |
1 |
|
|
T44 |
62 |
|
T45 |
53 |
|
T46 |
58 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3134614 |
1 |
|
|
T44 |
108 |
|
T45 |
104 |
|
T46 |
152 |
| auto[1] |
2741074 |
1 |
|
|
T44 |
88 |
|
T45 |
106 |
|
T46 |
144 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3698486 |
1 |
|
|
T44 |
113 |
|
T45 |
117 |
|
T46 |
137 |
| auto[1] |
2177202 |
1 |
|
|
T44 |
83 |
|
T45 |
93 |
|
T46 |
159 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2038721 |
1 |
|
|
T44 |
65 |
|
T45 |
64 |
|
T46 |
75 |
| auto[0] |
auto[1] |
1095893 |
1 |
|
|
T44 |
43 |
|
T45 |
40 |
|
T46 |
77 |
| auto[1] |
auto[0] |
1659765 |
1 |
|
|
T44 |
48 |
|
T45 |
53 |
|
T46 |
62 |
| auto[1] |
auto[1] |
1081309 |
1 |
|
|
T44 |
40 |
|
T45 |
53 |
|
T46 |
82 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3135237 |
1 |
|
|
T44 |
110 |
|
T45 |
106 |
|
T46 |
144 |
| auto[1] |
2740451 |
1 |
|
|
T44 |
86 |
|
T45 |
104 |
|
T46 |
152 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3709879 |
1 |
|
|
T44 |
90 |
|
T45 |
103 |
|
T46 |
156 |
| auto[1] |
2165809 |
1 |
|
|
T44 |
106 |
|
T45 |
107 |
|
T46 |
140 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2046094 |
1 |
|
|
T44 |
53 |
|
T45 |
55 |
|
T46 |
76 |
| auto[0] |
auto[1] |
1089143 |
1 |
|
|
T44 |
57 |
|
T45 |
51 |
|
T46 |
68 |
| auto[1] |
auto[0] |
1663785 |
1 |
|
|
T44 |
37 |
|
T45 |
48 |
|
T46 |
80 |
| auto[1] |
auto[1] |
1076666 |
1 |
|
|
T44 |
49 |
|
T45 |
56 |
|
T46 |
72 |