Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11560382 |
1 |
|
|
T22 |
1 |
|
T23 |
2 |
|
T19 |
11 |
auto[1] |
9305902 |
1 |
|
|
T22 |
5 |
|
T19 |
1 |
|
T21 |
1 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17132381 |
1 |
|
|
T22 |
3 |
|
T23 |
2 |
|
T19 |
12 |
auto[1] |
3733903 |
1 |
|
|
T22 |
3 |
|
T21 |
1 |
|
T24 |
3 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11526869 |
1 |
|
|
T22 |
1 |
|
T23 |
2 |
|
T19 |
12 |
auto[1] |
9339415 |
1 |
|
|
T22 |
5 |
|
T21 |
3 |
|
T24 |
14 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2807679 |
1 |
|
|
T21 |
1 |
|
T24 |
7 |
|
T4 |
8 |
auto[1] |
auto[0] |
auto[1] |
1873775 |
1 |
|
|
T21 |
1 |
|
T24 |
2 |
|
T25 |
2 |
auto[1] |
auto[1] |
auto[0] |
2797833 |
1 |
|
|
T22 |
2 |
|
T21 |
1 |
|
T24 |
4 |
auto[1] |
auto[1] |
auto[1] |
1860128 |
1 |
|
|
T22 |
3 |
|
T24 |
1 |
|
T75 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |