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Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3255091 1 T44 138 T45 178 T46 78
auto[1] 2862504 1 T44 148 T45 190 T46 104


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3842632 1 T44 131 T45 176 T46 91
auto[1] 2274963 1 T44 155 T45 192 T46 91


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2113707 1 T44 60 T45 97 T46 41
auto[0] auto[1] 1141384 1 T44 78 T45 81 T46 37
auto[1] auto[0] 1728925 1 T44 71 T45 79 T46 50
auto[1] auto[1] 1133579 1 T44 77 T45 111 T46 54


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3263123 1 T44 138 T45 194 T46 88
auto[1] 2854472 1 T44 148 T45 174 T46 94


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3843739 1 T44 141 T45 180 T46 96
auto[1] 2273856 1 T44 145 T45 188 T46 86


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2118474 1 T44 68 T45 94 T46 50
auto[0] auto[1] 1144649 1 T44 70 T45 100 T46 38
auto[1] auto[0] 1725265 1 T44 73 T45 86 T46 46
auto[1] auto[1] 1129207 1 T44 75 T45 88 T46 48


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3263726 1 T44 156 T45 174 T46 92
auto[1] 2853869 1 T44 130 T45 194 T46 90


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3839862 1 T44 140 T45 159 T46 87
auto[1] 2277733 1 T44 146 T45 209 T46 95


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2116600 1 T44 75 T45 87 T46 40
auto[0] auto[1] 1147126 1 T44 81 T45 87 T46 52
auto[1] auto[0] 1723262 1 T44 65 T45 72 T46 47
auto[1] auto[1] 1130607 1 T44 65 T45 122 T46 43


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3263659 1 T44 126 T45 192 T46 102
auto[1] 2853936 1 T44 160 T45 176 T46 80


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3841954 1 T44 154 T45 186 T46 99
auto[1] 2275641 1 T44 132 T45 182 T46 83


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2117301 1 T44 67 T45 101 T46 53
auto[0] auto[1] 1146358 1 T44 59 T45 91 T46 49
auto[1] auto[0] 1724653 1 T44 87 T45 85 T46 46
auto[1] auto[1] 1129283 1 T44 73 T45 91 T46 34


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3259658 1 T44 128 T45 190 T46 96
auto[1] 2857937 1 T44 158 T45 178 T46 86


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3841322 1 T44 141 T45 190 T46 88
auto[1] 2276273 1 T44 145 T45 178 T46 94


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2113105 1 T44 63 T45 97 T46 51
auto[0] auto[1] 1146553 1 T44 65 T45 93 T46 45
auto[1] auto[0] 1728217 1 T44 78 T45 93 T46 37
auto[1] auto[1] 1129720 1 T44 80 T45 85 T46 49


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3250814 1 T44 130 T45 200 T46 98
auto[1] 2866781 1 T44 156 T45 168 T46 84


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3842860 1 T44 151 T45 184 T46 91
auto[1] 2274735 1 T44 135 T45 184 T46 91


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2109972 1 T44 73 T45 103 T46 51
auto[0] auto[1] 1140842 1 T44 57 T45 97 T46 47
auto[1] auto[0] 1732888 1 T44 78 T45 81 T46 40
auto[1] auto[1] 1133893 1 T44 78 T45 87 T46 44


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3266336 1 T44 126 T45 170 T46 82
auto[1] 2851259 1 T44 160 T45 198 T46 100


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3841375 1 T44 115 T45 179 T46 90
auto[1] 2276220 1 T44 171 T45 189 T46 92


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2117020 1 T44 52 T45 78 T46 41
auto[0] auto[1] 1149316 1 T44 74 T45 92 T46 41
auto[1] auto[0] 1724355 1 T44 63 T45 101 T46 49
auto[1] auto[1] 1126904 1 T44 97 T45 97 T46 51


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3263057 1 T44 148 T45 198 T46 90
auto[1] 2854538 1 T44 138 T45 170 T46 92


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3841659 1 T44 133 T45 200 T46 98
auto[1] 2275936 1 T44 153 T45 168 T46 84


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2117236 1 T44 63 T45 106 T46 45
auto[0] auto[1] 1145821 1 T44 85 T45 92 T46 45
auto[1] auto[0] 1724423 1 T44 70 T45 94 T46 53
auto[1] auto[1] 1130115 1 T44 68 T45 76 T46 39


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3256220 1 T44 154 T45 192 T46 90
auto[1] 2861375 1 T44 132 T45 176 T46 92


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851124 1 T44 149 T45 176 T46 82
auto[1] 2266471 1 T44 137 T45 192 T46 100


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2116423 1 T44 86 T45 85 T46 43
auto[0] auto[1] 1139797 1 T44 68 T45 107 T46 47
auto[1] auto[0] 1734701 1 T44 63 T45 91 T46 39
auto[1] auto[1] 1126674 1 T44 69 T45 85 T46 53


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3256079 1 T44 150 T45 178 T46 84
auto[1] 2861516 1 T44 136 T45 190 T46 98


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3850740 1 T44 161 T45 172 T46 95
auto[1] 2266855 1 T44 125 T45 196 T46 87


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2113840 1 T44 81 T45 86 T46 55
auto[0] auto[1] 1142239 1 T44 69 T45 92 T46 29
auto[1] auto[0] 1736900 1 T44 80 T45 86 T46 40
auto[1] auto[1] 1124616 1 T44 56 T45 104 T46 58


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3261587 1 T44 148 T45 186 T46 90
auto[1] 2856008 1 T44 138 T45 182 T46 92


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3853841 1 T44 146 T45 176 T46 100
auto[1] 2263754 1 T44 140 T45 192 T46 82


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2121693 1 T44 77 T45 92 T46 50
auto[0] auto[1] 1139894 1 T44 71 T45 94 T46 40
auto[1] auto[0] 1732148 1 T44 69 T45 84 T46 50
auto[1] auto[1] 1123860 1 T44 69 T45 98 T46 42


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3262429 1 T44 152 T45 188 T46 84
auto[1] 2855166 1 T44 134 T45 180 T46 98


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851004 1 T44 138 T45 181 T46 90
auto[1] 2266591 1 T44 148 T45 187 T46 92


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2120047 1 T44 71 T45 92 T46 39
auto[0] auto[1] 1142382 1 T44 81 T45 96 T46 45
auto[1] auto[0] 1730957 1 T44 67 T45 89 T46 51
auto[1] auto[1] 1124209 1 T44 67 T45 91 T46 47


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3253807 1 T44 130 T45 180 T46 98
auto[1] 2863788 1 T44 156 T45 188 T46 84


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3844059 1 T44 147 T45 187 T46 100
auto[1] 2273536 1 T44 139 T45 181 T46 82


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2110765 1 T44 68 T45 100 T46 56
auto[0] auto[1] 1143042 1 T44 62 T45 80 T46 42
auto[1] auto[0] 1733294 1 T44 79 T45 87 T46 44
auto[1] auto[1] 1130494 1 T44 77 T45 101 T46 40


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3262661 1 T44 144 T45 192 T46 98
auto[1] 2854934 1 T44 142 T45 176 T46 84


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3850151 1 T44 155 T45 188 T46 92
auto[1] 2267444 1 T44 131 T45 180 T46 90


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2119643 1 T44 86 T45 93 T46 50
auto[0] auto[1] 1143018 1 T44 58 T45 99 T46 48
auto[1] auto[0] 1730508 1 T44 69 T45 95 T46 42
auto[1] auto[1] 1124426 1 T44 73 T45 81 T46 42


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3257155 1 T44 144 T45 186 T46 82
auto[1] 2860440 1 T44 142 T45 182 T46 100


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3852362 1 T44 147 T45 171 T46 84
auto[1] 2265233 1 T44 139 T45 197 T46 98


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2117076 1 T44 76 T45 87 T46 35
auto[0] auto[1] 1140079 1 T44 68 T45 99 T46 47
auto[1] auto[0] 1735286 1 T44 71 T45 84 T46 49
auto[1] auto[1] 1125154 1 T44 71 T45 98 T46 51


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3260539 1 T44 138 T45 178 T46 88
auto[1] 2857056 1 T44 148 T45 190 T46 94


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3853325 1 T44 147 T45 194 T46 83
auto[1] 2264270 1 T44 139 T45 174 T46 99


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2120945 1 T44 80 T45 94 T46 38
auto[0] auto[1] 1139594 1 T44 58 T45 84 T46 50
auto[1] auto[0] 1732380 1 T44 67 T45 100 T46 45
auto[1] auto[1] 1124676 1 T44 81 T45 90 T46 49


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3257583 1 T44 130 T45 190 T46 84
auto[1] 2860012 1 T44 156 T45 178 T46 98


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3850169 1 T44 126 T45 184 T46 91
auto[1] 2267426 1 T44 160 T45 184 T46 91


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2117438 1 T44 54 T45 90 T46 41
auto[0] auto[1] 1140145 1 T44 76 T45 100 T46 43
auto[1] auto[0] 1732731 1 T44 72 T45 94 T46 50
auto[1] auto[1] 1127281 1 T44 84 T45 84 T46 48


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3261003 1 T44 130 T45 176 T46 88
auto[1] 2856592 1 T44 156 T45 192 T46 94


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851124 1 T44 151 T45 198 T46 82
auto[1] 2266471 1 T44 135 T45 170 T46 100


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2118906 1 T44 63 T45 92 T46 41
auto[0] auto[1] 1142097 1 T44 67 T45 84 T46 47
auto[1] auto[0] 1732218 1 T44 88 T45 106 T46 41
auto[1] auto[1] 1124374 1 T44 68 T45 86 T46 53


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3259164 1 T44 144 T45 178 T46 84
auto[1] 2858431 1 T44 142 T45 190 T46 98


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3850411 1 T44 134 T45 192 T46 108
auto[1] 2267184 1 T44 152 T45 176 T46 74


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2116021 1 T44 67 T45 90 T46 52
auto[0] auto[1] 1143143 1 T44 77 T45 88 T46 32
auto[1] auto[0] 1734390 1 T44 67 T45 102 T46 56
auto[1] auto[1] 1124041 1 T44 75 T45 88 T46 42


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3260620 1 T44 130 T45 206 T46 106
auto[1] 2856975 1 T44 156 T45 162 T46 76


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851283 1 T44 159 T45 178 T46 74
auto[1] 2266312 1 T44 127 T45 190 T46 108


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2120259 1 T44 74 T45 99 T46 41
auto[0] auto[1] 1140361 1 T44 56 T45 107 T46 65
auto[1] auto[0] 1731024 1 T44 85 T45 79 T46 33
auto[1] auto[1] 1125951 1 T44 71 T45 83 T46 43


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3259185 1 T44 138 T45 164 T46 86
auto[1] 2858410 1 T44 148 T45 204 T46 96


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3852669 1 T44 136 T45 158 T46 106
auto[1] 2264926 1 T44 150 T45 210 T46 76


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2119668 1 T44 71 T45 69 T46 54
auto[0] auto[1] 1139517 1 T44 67 T45 95 T46 32
auto[1] auto[0] 1733001 1 T44 65 T45 89 T46 52
auto[1] auto[1] 1125409 1 T44 83 T45 115 T46 44


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3259680 1 T44 156 T45 194 T46 80
auto[1] 2857915 1 T44 130 T45 174 T46 102


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3846389 1 T44 133 T45 191 T46 102
auto[1] 2271206 1 T44 153 T45 177 T46 80


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2116698 1 T44 74 T45 107 T46 38
auto[0] auto[1] 1142982 1 T44 82 T45 87 T46 42
auto[1] auto[0] 1729691 1 T44 59 T45 84 T46 64
auto[1] auto[1] 1128224 1 T44 71 T45 90 T46 38


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3264582 1 T44 136 T45 198 T46 92
auto[1] 2853013 1 T44 150 T45 170 T46 90


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851177 1 T44 130 T45 214 T46 93
auto[1] 2266418 1 T44 156 T45 154 T46 89


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2121816 1 T44 55 T45 110 T46 50
auto[0] auto[1] 1142766 1 T44 81 T45 88 T46 42
auto[1] auto[0] 1729361 1 T44 75 T45 104 T46 43
auto[1] auto[1] 1123652 1 T44 75 T45 66 T46 47


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3261203 1 T44 136 T45 166 T46 98
auto[1] 2856392 1 T44 150 T45 202 T46 84


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3838921 1 T44 153 T45 165 T46 81
auto[1] 2278674 1 T44 133 T45 203 T46 101


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2113739 1 T44 78 T45 76 T46 46
auto[0] auto[1] 1147464 1 T44 58 T45 90 T46 52
auto[1] auto[0] 1725182 1 T44 75 T45 89 T46 35
auto[1] auto[1] 1131210 1 T44 75 T45 113 T46 49


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3262313 1 T44 150 T45 166 T46 90
auto[1] 2855282 1 T44 136 T45 202 T46 92


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3851236 1 T44 159 T45 201 T46 97
auto[1] 2266359 1 T44 127 T45 167 T46 85


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2120607 1 T44 84 T45 89 T46 46
auto[0] auto[1] 1141706 1 T44 66 T45 77 T46 44
auto[1] auto[0] 1730629 1 T44 75 T45 112 T46 51
auto[1] auto[1] 1124653 1 T44 61 T45 90 T46 41


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3262884 1 T44 140 T45 184 T46 90
auto[1] 2854711 1 T44 146 T45 184 T46 92


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3856103 1 T44 143 T45 188 T46 97
auto[1] 2261492 1 T44 143 T45 180 T46 85


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2124044 1 T44 67 T45 96 T46 42
auto[0] auto[1] 1138840 1 T44 73 T45 88 T46 48
auto[1] auto[0] 1732059 1 T44 76 T45 92 T46 55
auto[1] auto[1] 1122652 1 T44 70 T45 92 T46 37

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