Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11763192 |
1 |
|
|
T22 |
15 |
|
T23 |
1 |
|
T24 |
9 |
auto[1] |
9676173 |
1 |
|
|
T22 |
15 |
|
T25 |
16 |
|
T26 |
7 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17563318 |
1 |
|
|
T22 |
30 |
|
T23 |
1 |
|
T24 |
3 |
auto[1] |
3876047 |
1 |
|
|
T24 |
6 |
|
T26 |
3 |
|
T2 |
1 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11813265 |
1 |
|
|
T22 |
30 |
|
T23 |
1 |
|
T24 |
1 |
auto[1] |
9626100 |
1 |
|
|
T24 |
8 |
|
T26 |
13 |
|
T2 |
5 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2857603 |
1 |
|
|
T24 |
2 |
|
T26 |
6 |
|
T2 |
2 |
auto[1] |
auto[0] |
auto[1] |
1924994 |
1 |
|
|
T24 |
6 |
|
T26 |
3 |
|
T11 |
1 |
auto[1] |
auto[1] |
auto[0] |
2892450 |
1 |
|
|
T26 |
4 |
|
T2 |
2 |
|
T18 |
1 |
auto[1] |
auto[1] |
auto[1] |
1951053 |
1 |
|
|
T2 |
1 |
|
T18 |
1 |
|
T104 |
5 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |