cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63327 |
1 |
|
|
T46 |
282 |
|
T48 |
1209 |
|
T115 |
1745 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52328 |
1 |
|
|
T46 |
51 |
|
T48 |
1842 |
|
T115 |
932 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65128 |
1 |
|
|
T46 |
991 |
|
T48 |
1423 |
|
T115 |
2919 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48371 |
1 |
|
|
T46 |
140 |
|
T48 |
1019 |
|
T115 |
1028 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
852 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1799 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1823 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
852 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1788 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
852 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
852 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
850 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
850 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
843 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
843 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T46 |
4 |
|
T48 |
36 |
|
T115 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T46 |
4 |
|
T48 |
35 |
|
T115 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T46 |
4 |
|
T48 |
35 |
|
T115 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T46 |
4 |
|
T48 |
35 |
|
T115 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T46 |
2 |
|
T48 |
31 |
|
T115 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
6 |
|
T48 |
18 |
|
T115 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T46 |
2 |
|
T48 |
29 |
|
T115 |
37 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
68223 |
1 |
|
|
T46 |
955 |
|
T48 |
1281 |
|
T115 |
1357 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52407 |
1 |
|
|
T46 |
179 |
|
T48 |
1030 |
|
T115 |
1328 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63113 |
1 |
|
|
T46 |
50 |
|
T48 |
1311 |
|
T115 |
2643 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45441 |
1 |
|
|
T46 |
215 |
|
T48 |
1818 |
|
T115 |
1018 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
2 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1825 |
1 |
|
|
T46 |
11 |
|
T48 |
39 |
|
T115 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T46 |
10 |
|
T48 |
43 |
|
T115 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
2 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1790 |
1 |
|
|
T46 |
11 |
|
T48 |
39 |
|
T115 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1807 |
1 |
|
|
T46 |
10 |
|
T48 |
43 |
|
T115 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
2 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T46 |
11 |
|
T48 |
37 |
|
T115 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T46 |
10 |
|
T48 |
42 |
|
T115 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
2 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T46 |
10 |
|
T48 |
41 |
|
T115 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T46 |
1 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T46 |
11 |
|
T48 |
35 |
|
T115 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T46 |
10 |
|
T48 |
39 |
|
T115 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T46 |
1 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T46 |
11 |
|
T48 |
35 |
|
T115 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T46 |
10 |
|
T48 |
39 |
|
T115 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T46 |
11 |
|
T48 |
34 |
|
T115 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T46 |
10 |
|
T48 |
39 |
|
T115 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T46 |
11 |
|
T48 |
32 |
|
T115 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T46 |
9 |
|
T48 |
32 |
|
T115 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T46 |
9 |
|
T48 |
31 |
|
T115 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T46 |
9 |
|
T48 |
31 |
|
T115 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T46 |
9 |
|
T48 |
30 |
|
T115 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T46 |
9 |
|
T48 |
29 |
|
T115 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T46 |
9 |
|
T48 |
29 |
|
T115 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
36 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66805 |
1 |
|
|
T46 |
232 |
|
T48 |
1207 |
|
T115 |
1387 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50299 |
1 |
|
|
T46 |
919 |
|
T48 |
658 |
|
T115 |
2124 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62760 |
1 |
|
|
T46 |
128 |
|
T48 |
1785 |
|
T115 |
1687 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48987 |
1 |
|
|
T46 |
160 |
|
T48 |
1914 |
|
T115 |
1223 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
5 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1860 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1842 |
1 |
|
|
T46 |
7 |
|
T48 |
34 |
|
T115 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
5 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1805 |
1 |
|
|
T46 |
6 |
|
T48 |
34 |
|
T115 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1805 |
1 |
|
|
T46 |
7 |
|
T48 |
33 |
|
T115 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T46 |
5 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T46 |
6 |
|
T48 |
34 |
|
T115 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T46 |
5 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T46 |
6 |
|
T48 |
32 |
|
T115 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T46 |
6 |
|
T48 |
30 |
|
T115 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T46 |
7 |
|
T48 |
32 |
|
T115 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T46 |
6 |
|
T48 |
30 |
|
T115 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T46 |
7 |
|
T48 |
30 |
|
T115 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T46 |
7 |
|
T48 |
28 |
|
T115 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T46 |
7 |
|
T48 |
27 |
|
T115 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T46 |
7 |
|
T48 |
27 |
|
T115 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T46 |
7 |
|
T48 |
26 |
|
T115 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T46 |
7 |
|
T48 |
26 |
|
T115 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T46 |
7 |
|
T48 |
25 |
|
T115 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T46 |
7 |
|
T48 |
25 |
|
T115 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T46 |
7 |
|
T48 |
25 |
|
T115 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T46 |
3 |
|
T48 |
29 |
|
T115 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T46 |
7 |
|
T48 |
25 |
|
T115 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
41 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60045 |
1 |
|
|
T46 |
172 |
|
T48 |
1256 |
|
T115 |
2116 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52725 |
1 |
|
|
T46 |
91 |
|
T48 |
1925 |
|
T115 |
1090 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66208 |
1 |
|
|
T46 |
342 |
|
T48 |
1367 |
|
T115 |
1520 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48819 |
1 |
|
|
T46 |
870 |
|
T48 |
868 |
|
T115 |
1358 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1872 |
1 |
|
|
T46 |
3 |
|
T48 |
44 |
|
T115 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1896 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1840 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1854 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1802 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1823 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1769 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1786 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1748 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
6 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
6 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T46 |
3 |
|
T48 |
29 |
|
T115 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T46 |
3 |
|
T48 |
29 |
|
T115 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
48 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63747 |
1 |
|
|
T46 |
100 |
|
T48 |
2612 |
|
T115 |
1405 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52739 |
1 |
|
|
T46 |
182 |
|
T48 |
918 |
|
T115 |
993 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64917 |
1 |
|
|
T46 |
286 |
|
T48 |
1170 |
|
T115 |
1760 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46580 |
1 |
|
|
T46 |
874 |
|
T48 |
580 |
|
T115 |
2010 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
862 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1823 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
875 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1810 |
1 |
|
|
T46 |
8 |
|
T48 |
42 |
|
T115 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
862 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
875 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T46 |
7 |
|
T48 |
42 |
|
T115 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
861 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
873 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
861 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
873 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
858 |
1 |
|
|
T46 |
2 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
869 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
858 |
1 |
|
|
T46 |
2 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
869 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T46 |
7 |
|
T48 |
37 |
|
T115 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
861 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T46 |
7 |
|
T48 |
35 |
|
T115 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
861 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T46 |
7 |
|
T48 |
33 |
|
T115 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
849 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T46 |
8 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
860 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
849 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T46 |
8 |
|
T48 |
40 |
|
T115 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
860 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T46 |
4 |
|
T48 |
31 |
|
T115 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
859 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T46 |
7 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
859 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T46 |
7 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
857 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T46 |
7 |
|
T48 |
37 |
|
T115 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
857 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T46 |
7 |
|
T48 |
35 |
|
T115 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
857 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
43 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
70700 |
1 |
|
|
T46 |
1134 |
|
T48 |
1179 |
|
T115 |
2470 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45737 |
1 |
|
|
T46 |
117 |
|
T48 |
907 |
|
T115 |
1113 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63615 |
1 |
|
|
T46 |
160 |
|
T48 |
2069 |
|
T115 |
1645 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48718 |
1 |
|
|
T46 |
65 |
|
T48 |
1104 |
|
T115 |
1142 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1843 |
1 |
|
|
T46 |
7 |
|
T48 |
49 |
|
T115 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1847 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1809 |
1 |
|
|
T46 |
7 |
|
T48 |
49 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1802 |
1 |
|
|
T46 |
6 |
|
T48 |
50 |
|
T115 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1774 |
1 |
|
|
T46 |
7 |
|
T48 |
48 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1765 |
1 |
|
|
T46 |
5 |
|
T48 |
50 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T46 |
7 |
|
T48 |
46 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T46 |
5 |
|
T48 |
50 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T46 |
5 |
|
T48 |
49 |
|
T115 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T46 |
5 |
|
T48 |
48 |
|
T115 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T46 |
7 |
|
T48 |
44 |
|
T115 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T46 |
3 |
|
T48 |
45 |
|
T115 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T46 |
3 |
|
T48 |
44 |
|
T115 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T46 |
6 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
39 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62404 |
1 |
|
|
T46 |
225 |
|
T48 |
1366 |
|
T115 |
2187 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51452 |
1 |
|
|
T46 |
207 |
|
T48 |
824 |
|
T115 |
928 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68786 |
1 |
|
|
T46 |
205 |
|
T48 |
2205 |
|
T115 |
1980 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45669 |
1 |
|
|
T46 |
862 |
|
T48 |
818 |
|
T115 |
1063 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1876 |
1 |
|
|
T46 |
6 |
|
T48 |
48 |
|
T115 |
57 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1853 |
1 |
|
|
T46 |
6 |
|
T48 |
49 |
|
T115 |
58 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1843 |
1 |
|
|
T46 |
6 |
|
T48 |
48 |
|
T115 |
56 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1813 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
57 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1814 |
1 |
|
|
T46 |
6 |
|
T48 |
48 |
|
T115 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
56 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T46 |
6 |
|
T48 |
47 |
|
T115 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T46 |
7 |
|
T48 |
47 |
|
T115 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T46 |
7 |
|
T48 |
46 |
|
T115 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T46 |
3 |
|
T48 |
44 |
|
T115 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T46 |
2 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T46 |
7 |
|
T48 |
43 |
|
T115 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T46 |
2 |
|
T48 |
42 |
|
T115 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T46 |
7 |
|
T48 |
42 |
|
T115 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T46 |
2 |
|
T48 |
40 |
|
T115 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T46 |
7 |
|
T48 |
39 |
|
T115 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T46 |
2 |
|
T48 |
32 |
|
T115 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T46 |
2 |
|
T48 |
32 |
|
T115 |
40 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67812 |
1 |
|
|
T46 |
120 |
|
T48 |
1299 |
|
T115 |
1924 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49996 |
1 |
|
|
T46 |
1016 |
|
T48 |
1923 |
|
T115 |
1015 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65958 |
1 |
|
|
T46 |
312 |
|
T48 |
1374 |
|
T115 |
2359 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45595 |
1 |
|
|
T46 |
57 |
|
T48 |
753 |
|
T115 |
1144 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1827 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T46 |
5 |
|
T48 |
41 |
|
T115 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1772 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T46 |
5 |
|
T48 |
39 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
2 |
|
T48 |
25 |
|
T115 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
35 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
69355 |
1 |
|
|
T46 |
848 |
|
T48 |
1362 |
|
T115 |
2200 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48751 |
1 |
|
|
T46 |
256 |
|
T48 |
888 |
|
T115 |
1145 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64695 |
1 |
|
|
T46 |
4 |
|
T48 |
1954 |
|
T115 |
1557 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44568 |
1 |
|
|
T46 |
258 |
|
T48 |
1079 |
|
T115 |
1215 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1950 |
1 |
|
|
T46 |
11 |
|
T48 |
49 |
|
T115 |
65 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T48 |
15 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1930 |
1 |
|
|
T46 |
13 |
|
T48 |
56 |
|
T115 |
63 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1911 |
1 |
|
|
T46 |
11 |
|
T48 |
48 |
|
T115 |
63 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T48 |
15 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1893 |
1 |
|
|
T46 |
12 |
|
T48 |
56 |
|
T115 |
62 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1875 |
1 |
|
|
T46 |
11 |
|
T48 |
48 |
|
T115 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T48 |
15 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1838 |
1 |
|
|
T46 |
11 |
|
T48 |
53 |
|
T115 |
61 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1845 |
1 |
|
|
T46 |
11 |
|
T48 |
46 |
|
T115 |
59 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T48 |
15 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1796 |
1 |
|
|
T46 |
11 |
|
T48 |
52 |
|
T115 |
59 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1807 |
1 |
|
|
T46 |
12 |
|
T48 |
44 |
|
T115 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1765 |
1 |
|
|
T46 |
11 |
|
T48 |
51 |
|
T115 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T46 |
12 |
|
T48 |
42 |
|
T115 |
57 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T46 |
11 |
|
T48 |
50 |
|
T115 |
57 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T46 |
12 |
|
T48 |
40 |
|
T115 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T46 |
11 |
|
T48 |
50 |
|
T115 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T46 |
12 |
|
T48 |
40 |
|
T115 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T46 |
11 |
|
T48 |
50 |
|
T115 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T46 |
11 |
|
T48 |
40 |
|
T115 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T46 |
11 |
|
T48 |
49 |
|
T115 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T46 |
11 |
|
T48 |
38 |
|
T115 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T46 |
11 |
|
T48 |
48 |
|
T115 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T46 |
11 |
|
T48 |
38 |
|
T115 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T46 |
10 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T46 |
10 |
|
T48 |
38 |
|
T115 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T46 |
10 |
|
T48 |
38 |
|
T115 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T46 |
9 |
|
T48 |
41 |
|
T115 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T46 |
10 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T46 |
9 |
|
T48 |
41 |
|
T115 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
2 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T46 |
10 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T48 |
15 |
|
T115 |
23 |
|
T116 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
46 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59095 |
1 |
|
|
T46 |
255 |
|
T48 |
990 |
|
T115 |
1535 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50977 |
1 |
|
|
T46 |
26 |
|
T48 |
1190 |
|
T115 |
1402 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60363 |
1 |
|
|
T46 |
1129 |
|
T48 |
2161 |
|
T115 |
1285 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
57729 |
1 |
|
|
T46 |
151 |
|
T48 |
1016 |
|
T115 |
1915 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1936 |
1 |
|
|
T46 |
3 |
|
T48 |
49 |
|
T115 |
62 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1897 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
61 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1901 |
1 |
|
|
T46 |
3 |
|
T48 |
47 |
|
T115 |
62 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1864 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
61 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1869 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
62 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1829 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1838 |
1 |
|
|
T46 |
3 |
|
T48 |
45 |
|
T115 |
61 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1798 |
1 |
|
|
T46 |
2 |
|
T48 |
45 |
|
T115 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T46 |
2 |
|
T48 |
45 |
|
T115 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T46 |
2 |
|
T48 |
45 |
|
T115 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T46 |
2 |
|
T48 |
43 |
|
T115 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T46 |
2 |
|
T48 |
42 |
|
T115 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T46 |
1 |
|
T48 |
39 |
|
T115 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T46 |
1 |
|
T48 |
38 |
|
T115 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T46 |
1 |
|
T48 |
37 |
|
T115 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
3 |
|
T48 |
25 |
|
T115 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
40 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62087 |
1 |
|
|
T46 |
1071 |
|
T48 |
2462 |
|
T115 |
1984 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50902 |
1 |
|
|
T46 |
182 |
|
T48 |
848 |
|
T115 |
1238 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61606 |
1 |
|
|
T46 |
91 |
|
T48 |
1300 |
|
T115 |
1603 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54586 |
1 |
|
|
T46 |
187 |
|
T48 |
928 |
|
T115 |
1244 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1859 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
64 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1849 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
62 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1819 |
1 |
|
|
T46 |
6 |
|
T48 |
38 |
|
T115 |
64 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1809 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T46 |
6 |
|
T48 |
38 |
|
T115 |
63 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
63 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
63 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T46 |
4 |
|
T48 |
41 |
|
T115 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
61 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
60 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T46 |
2 |
|
T48 |
41 |
|
T115 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T46 |
2 |
|
T48 |
41 |
|
T115 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T46 |
2 |
|
T48 |
41 |
|
T115 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T46 |
2 |
|
T48 |
41 |
|
T115 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T46 |
6 |
|
T48 |
28 |
|
T115 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T46 |
2 |
|
T48 |
41 |
|
T115 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T46 |
2 |
|
T48 |
40 |
|
T115 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T46 |
6 |
|
T48 |
25 |
|
T115 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T46 |
2 |
|
T48 |
38 |
|
T115 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T46 |
6 |
|
T48 |
24 |
|
T115 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T46 |
2 |
|
T48 |
37 |
|
T115 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T46 |
6 |
|
T48 |
21 |
|
T115 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T46 |
2 |
|
T48 |
37 |
|
T115 |
45 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61831 |
1 |
|
|
T46 |
219 |
|
T48 |
1795 |
|
T115 |
1588 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49244 |
1 |
|
|
T46 |
109 |
|
T48 |
717 |
|
T115 |
1490 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61785 |
1 |
|
|
T46 |
1145 |
|
T48 |
2295 |
|
T115 |
1696 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55744 |
1 |
|
|
T46 |
42 |
|
T48 |
694 |
|
T115 |
1707 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1890 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1878 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1854 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1837 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1818 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T46 |
4 |
|
T48 |
32 |
|
T115 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T46 |
4 |
|
T48 |
31 |
|
T115 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T46 |
4 |
|
T48 |
25 |
|
T115 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T46 |
2 |
|
T48 |
34 |
|
T115 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T46 |
4 |
|
T48 |
25 |
|
T115 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T46 |
2 |
|
T48 |
34 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T46 |
4 |
|
T48 |
25 |
|
T115 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T46 |
2 |
|
T48 |
34 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T46 |
2 |
|
T48 |
33 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
26 |
|
T115 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T46 |
2 |
|
T48 |
33 |
|
T115 |
24 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61594 |
1 |
|
|
T46 |
176 |
|
T48 |
982 |
|
T115 |
2089 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51440 |
1 |
|
|
T46 |
188 |
|
T48 |
2080 |
|
T115 |
1173 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64197 |
1 |
|
|
T46 |
70 |
|
T48 |
1095 |
|
T115 |
1708 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50859 |
1 |
|
|
T46 |
1037 |
|
T48 |
1259 |
|
T115 |
1043 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1893 |
1 |
|
|
T46 |
8 |
|
T48 |
50 |
|
T115 |
60 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1910 |
1 |
|
|
T46 |
8 |
|
T48 |
49 |
|
T115 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1850 |
1 |
|
|
T46 |
8 |
|
T48 |
50 |
|
T115 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1874 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
58 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1817 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1845 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1783 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1820 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T48 |
16 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T46 |
9 |
|
T48 |
47 |
|
T115 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1769 |
1 |
|
|
T46 |
8 |
|
T48 |
47 |
|
T115 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T48 |
16 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T46 |
9 |
|
T48 |
44 |
|
T115 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T46 |
7 |
|
T48 |
47 |
|
T115 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T46 |
7 |
|
T48 |
45 |
|
T115 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T46 |
9 |
|
T48 |
42 |
|
T115 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T46 |
7 |
|
T48 |
44 |
|
T115 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T46 |
9 |
|
T48 |
41 |
|
T115 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T46 |
7 |
|
T48 |
43 |
|
T115 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T46 |
8 |
|
T48 |
40 |
|
T115 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T46 |
7 |
|
T48 |
43 |
|
T115 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T46 |
7 |
|
T48 |
41 |
|
T115 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T46 |
8 |
|
T48 |
36 |
|
T115 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T46 |
7 |
|
T48 |
41 |
|
T115 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T46 |
8 |
|
T48 |
35 |
|
T115 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T46 |
8 |
|
T48 |
35 |
|
T115 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T48 |
15 |
|
T115 |
28 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T46 |
7 |
|
T48 |
35 |
|
T115 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
1 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T46 |
7 |
|
T48 |
39 |
|
T115 |
38 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64103 |
1 |
|
|
T46 |
1003 |
|
T48 |
1526 |
|
T115 |
2145 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49648 |
1 |
|
|
T46 |
161 |
|
T48 |
504 |
|
T115 |
1031 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68173 |
1 |
|
|
T46 |
168 |
|
T48 |
2639 |
|
T115 |
2199 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47600 |
1 |
|
|
T46 |
114 |
|
T48 |
864 |
|
T115 |
983 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1802 |
1 |
|
|
T46 |
5 |
|
T48 |
31 |
|
T115 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
850 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1783 |
1 |
|
|
T46 |
7 |
|
T48 |
31 |
|
T115 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
850 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1739 |
1 |
|
|
T46 |
7 |
|
T48 |
31 |
|
T115 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
850 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T46 |
7 |
|
T48 |
31 |
|
T115 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
850 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T46 |
7 |
|
T48 |
31 |
|
T115 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
846 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
846 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
840 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T46 |
6 |
|
T48 |
30 |
|
T115 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
6 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
840 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T46 |
6 |
|
T48 |
30 |
|
T115 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
837 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T46 |
6 |
|
T48 |
29 |
|
T115 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
837 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T46 |
4 |
|
T48 |
25 |
|
T115 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T46 |
4 |
|
T48 |
22 |
|
T115 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T46 |
5 |
|
T48 |
27 |
|
T115 |
34 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
70581 |
1 |
|
|
T46 |
234 |
|
T48 |
1716 |
|
T115 |
2116 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47448 |
1 |
|
|
T46 |
991 |
|
T48 |
801 |
|
T115 |
1180 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62578 |
1 |
|
|
T46 |
169 |
|
T48 |
2454 |
|
T115 |
1572 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47909 |
1 |
|
|
T46 |
104 |
|
T48 |
602 |
|
T115 |
1644 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1832 |
1 |
|
|
T46 |
4 |
|
T48 |
33 |
|
T115 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1836 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T46 |
4 |
|
T48 |
31 |
|
T115 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1792 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T46 |
4 |
|
T48 |
31 |
|
T115 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T46 |
5 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T46 |
4 |
|
T48 |
31 |
|
T115 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T46 |
4 |
|
T48 |
36 |
|
T115 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
828 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T46 |
4 |
|
T48 |
36 |
|
T115 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
828 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T46 |
4 |
|
T48 |
29 |
|
T115 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T46 |
3 |
|
T48 |
29 |
|
T115 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T46 |
4 |
|
T48 |
28 |
|
T115 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T46 |
3 |
|
T48 |
29 |
|
T115 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
4 |
|
T48 |
26 |
|
T115 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T46 |
4 |
|
T48 |
24 |
|
T115 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
27 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66311 |
1 |
|
|
T46 |
210 |
|
T48 |
1617 |
|
T115 |
1519 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47831 |
1 |
|
|
T46 |
167 |
|
T48 |
1001 |
|
T115 |
1825 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62218 |
1 |
|
|
T46 |
997 |
|
T48 |
2058 |
|
T115 |
2079 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51068 |
1 |
|
|
T46 |
116 |
|
T48 |
802 |
|
T115 |
995 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1858 |
1 |
|
|
T46 |
6 |
|
T48 |
37 |
|
T115 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
842 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1861 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1818 |
1 |
|
|
T46 |
6 |
|
T48 |
37 |
|
T115 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
842 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1824 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
844 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1774 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
844 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
838 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
838 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T46 |
5 |
|
T48 |
39 |
|
T115 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
840 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
840 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T46 |
5 |
|
T48 |
37 |
|
T115 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T46 |
5 |
|
T48 |
32 |
|
T115 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T46 |
5 |
|
T48 |
31 |
|
T115 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T46 |
3 |
|
T48 |
32 |
|
T115 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
24 |
|
T115 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T46 |
5 |
|
T48 |
29 |
|
T115 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
35 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61883 |
1 |
|
|
T46 |
187 |
|
T48 |
889 |
|
T115 |
2413 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55028 |
1 |
|
|
T46 |
22 |
|
T48 |
865 |
|
T115 |
928 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61403 |
1 |
|
|
T46 |
384 |
|
T48 |
2178 |
|
T115 |
1730 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49991 |
1 |
|
|
T46 |
898 |
|
T48 |
1224 |
|
T115 |
1251 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1897 |
1 |
|
|
T46 |
4 |
|
T48 |
53 |
|
T115 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1897 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1855 |
1 |
|
|
T46 |
4 |
|
T48 |
53 |
|
T115 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1863 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T46 |
4 |
|
T48 |
53 |
|
T115 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1825 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1784 |
1 |
|
|
T46 |
4 |
|
T48 |
53 |
|
T115 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1800 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T46 |
4 |
|
T48 |
47 |
|
T115 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T46 |
2 |
|
T48 |
48 |
|
T115 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T46 |
1 |
|
T48 |
48 |
|
T115 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T46 |
1 |
|
T48 |
47 |
|
T115 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T46 |
1 |
|
T48 |
46 |
|
T115 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T46 |
1 |
|
T48 |
44 |
|
T115 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T46 |
1 |
|
T48 |
41 |
|
T115 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T46 |
1 |
|
T48 |
39 |
|
T115 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
5 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62088 |
1 |
|
|
T46 |
861 |
|
T48 |
1985 |
|
T115 |
2248 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48127 |
1 |
|
|
T46 |
234 |
|
T48 |
1071 |
|
T115 |
1537 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65422 |
1 |
|
|
T46 |
2 |
|
T48 |
1115 |
|
T115 |
983 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50678 |
1 |
|
|
T46 |
290 |
|
T48 |
1139 |
|
T115 |
1269 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1914 |
1 |
|
|
T46 |
11 |
|
T48 |
50 |
|
T115 |
67 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1941 |
1 |
|
|
T46 |
12 |
|
T48 |
53 |
|
T115 |
66 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1873 |
1 |
|
|
T46 |
11 |
|
T48 |
47 |
|
T115 |
67 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1913 |
1 |
|
|
T46 |
12 |
|
T48 |
53 |
|
T115 |
65 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
829 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1834 |
1 |
|
|
T46 |
11 |
|
T48 |
46 |
|
T115 |
67 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1877 |
1 |
|
|
T46 |
12 |
|
T48 |
53 |
|
T115 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
829 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T46 |
11 |
|
T48 |
46 |
|
T115 |
66 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1847 |
1 |
|
|
T46 |
12 |
|
T48 |
53 |
|
T115 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T46 |
12 |
|
T48 |
46 |
|
T115 |
63 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1807 |
1 |
|
|
T46 |
12 |
|
T48 |
53 |
|
T115 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T46 |
11 |
|
T48 |
45 |
|
T115 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1765 |
1 |
|
|
T46 |
11 |
|
T48 |
53 |
|
T115 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T46 |
11 |
|
T48 |
43 |
|
T115 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T46 |
11 |
|
T48 |
50 |
|
T115 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T46 |
11 |
|
T48 |
41 |
|
T115 |
59 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T46 |
10 |
|
T48 |
48 |
|
T115 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T46 |
10 |
|
T48 |
40 |
|
T115 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T46 |
10 |
|
T48 |
48 |
|
T115 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T46 |
10 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T46 |
10 |
|
T48 |
48 |
|
T115 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T46 |
10 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T46 |
10 |
|
T48 |
48 |
|
T115 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T46 |
10 |
|
T48 |
48 |
|
T115 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T46 |
10 |
|
T48 |
45 |
|
T115 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T46 |
9 |
|
T48 |
34 |
|
T115 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T46 |
10 |
|
T48 |
44 |
|
T115 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T46 |
1 |
|
T48 |
19 |
|
T115 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T46 |
8 |
|
T48 |
34 |
|
T115 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T48 |
15 |
|
T115 |
22 |
|
T116 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T46 |
10 |
|
T48 |
42 |
|
T115 |
43 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65562 |
1 |
|
|
T46 |
53 |
|
T48 |
2417 |
|
T115 |
2411 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48384 |
1 |
|
|
T46 |
30 |
|
T48 |
872 |
|
T115 |
1378 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66171 |
1 |
|
|
T46 |
937 |
|
T48 |
1525 |
|
T115 |
971 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47269 |
1 |
|
|
T46 |
394 |
|
T48 |
707 |
|
T115 |
1313 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1882 |
1 |
|
|
T46 |
8 |
|
T48 |
45 |
|
T115 |
70 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1876 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
70 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1849 |
1 |
|
|
T46 |
8 |
|
T48 |
44 |
|
T115 |
68 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
69 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1820 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
66 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1809 |
1 |
|
|
T46 |
9 |
|
T48 |
37 |
|
T115 |
66 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T46 |
8 |
|
T48 |
42 |
|
T115 |
65 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T46 |
9 |
|
T48 |
37 |
|
T115 |
65 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T46 |
9 |
|
T48 |
40 |
|
T115 |
64 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T46 |
9 |
|
T48 |
35 |
|
T115 |
65 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
64 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T46 |
9 |
|
T48 |
33 |
|
T115 |
64 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T46 |
9 |
|
T48 |
39 |
|
T115 |
61 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T46 |
9 |
|
T48 |
31 |
|
T115 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T46 |
9 |
|
T48 |
29 |
|
T115 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T46 |
9 |
|
T48 |
29 |
|
T115 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T46 |
8 |
|
T48 |
37 |
|
T115 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T46 |
8 |
|
T48 |
36 |
|
T115 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T46 |
8 |
|
T48 |
36 |
|
T115 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T46 |
6 |
|
T48 |
34 |
|
T115 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T46 |
9 |
|
T48 |
28 |
|
T115 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
2 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T46 |
9 |
|
T48 |
25 |
|
T115 |
47 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
69780 |
1 |
|
|
T46 |
1053 |
|
T48 |
1133 |
|
T115 |
2790 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48286 |
1 |
|
|
T46 |
150 |
|
T48 |
1297 |
|
T115 |
1340 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62741 |
1 |
|
|
T46 |
256 |
|
T48 |
1744 |
|
T115 |
1497 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48120 |
1 |
|
|
T46 |
78 |
|
T48 |
1151 |
|
T115 |
726 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1861 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1845 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1835 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1809 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1795 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1769 |
1 |
|
|
T46 |
4 |
|
T48 |
51 |
|
T115 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T46 |
4 |
|
T48 |
48 |
|
T115 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T46 |
4 |
|
T48 |
50 |
|
T115 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T46 |
4 |
|
T48 |
47 |
|
T115 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T46 |
4 |
|
T48 |
49 |
|
T115 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T46 |
4 |
|
T48 |
47 |
|
T115 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T46 |
3 |
|
T48 |
47 |
|
T115 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T46 |
3 |
|
T48 |
46 |
|
T115 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T46 |
4 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T46 |
3 |
|
T48 |
45 |
|
T115 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T46 |
4 |
|
T48 |
44 |
|
T115 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T46 |
2 |
|
T48 |
16 |
|
T115 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
26 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64305 |
1 |
|
|
T46 |
157 |
|
T48 |
1149 |
|
T115 |
1373 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48774 |
1 |
|
|
T46 |
88 |
|
T48 |
719 |
|
T115 |
1270 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59727 |
1 |
|
|
T46 |
301 |
|
T48 |
2521 |
|
T115 |
2323 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55260 |
1 |
|
|
T46 |
943 |
|
T48 |
1176 |
|
T115 |
1238 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1904 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
66 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1902 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
62 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1873 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
66 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1866 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
62 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1828 |
1 |
|
|
T46 |
5 |
|
T48 |
41 |
|
T115 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1832 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1793 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
61 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T46 |
2 |
|
T48 |
38 |
|
T115 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T46 |
2 |
|
T48 |
37 |
|
T115 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T46 |
2 |
|
T48 |
36 |
|
T115 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T46 |
1 |
|
T48 |
35 |
|
T115 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T46 |
1 |
|
T48 |
35 |
|
T115 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T46 |
1 |
|
T48 |
33 |
|
T115 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T46 |
5 |
|
T48 |
28 |
|
T115 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T46 |
1 |
|
T48 |
32 |
|
T115 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
3 |
|
T48 |
16 |
|
T115 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T46 |
5 |
|
T48 |
20 |
|
T115 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T46 |
1 |
|
T48 |
32 |
|
T115 |
46 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
71928 |
1 |
|
|
T46 |
166 |
|
T48 |
2072 |
|
T115 |
1637 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45187 |
1 |
|
|
T46 |
956 |
|
T48 |
979 |
|
T115 |
1035 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62752 |
1 |
|
|
T46 |
269 |
|
T48 |
1338 |
|
T115 |
2557 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48700 |
1 |
|
|
T46 |
84 |
|
T48 |
1088 |
|
T115 |
1020 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
873 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1823 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
873 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1795 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
872 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T46 |
5 |
|
T48 |
42 |
|
T115 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
872 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
867 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T46 |
5 |
|
T48 |
41 |
|
T115 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
867 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
862 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
862 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T46 |
5 |
|
T48 |
38 |
|
T115 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
860 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
860 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
856 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T46 |
4 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
856 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T46 |
4 |
|
T48 |
33 |
|
T115 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T46 |
4 |
|
T48 |
36 |
|
T115 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
856 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T46 |
4 |
|
T48 |
33 |
|
T115 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T46 |
4 |
|
T48 |
35 |
|
T115 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
856 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T46 |
4 |
|
T48 |
33 |
|
T115 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
855 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T46 |
4 |
|
T48 |
33 |
|
T115 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
4 |
|
T48 |
18 |
|
T115 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58483 |
1 |
|
|
T46 |
114 |
|
T48 |
1139 |
|
T115 |
1174 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51887 |
1 |
|
|
T46 |
966 |
|
T48 |
1745 |
|
T115 |
1474 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68489 |
1 |
|
|
T46 |
207 |
|
T48 |
1297 |
|
T115 |
1276 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50196 |
1 |
|
|
T46 |
170 |
|
T48 |
1152 |
|
T115 |
2309 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1840 |
1 |
|
|
T46 |
8 |
|
T48 |
50 |
|
T115 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1815 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T46 |
7 |
|
T48 |
50 |
|
T115 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1792 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
59 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T46 |
7 |
|
T48 |
49 |
|
T115 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
2 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T46 |
7 |
|
T48 |
47 |
|
T115 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
1 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T46 |
8 |
|
T48 |
46 |
|
T115 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
1 |
|
T48 |
18 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T46 |
8 |
|
T48 |
45 |
|
T115 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T46 |
8 |
|
T48 |
42 |
|
T115 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T46 |
8 |
|
T48 |
41 |
|
T115 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T46 |
6 |
|
T48 |
38 |
|
T115 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T46 |
6 |
|
T48 |
38 |
|
T115 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T46 |
8 |
|
T48 |
38 |
|
T115 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T46 |
6 |
|
T48 |
37 |
|
T115 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T46 |
5 |
|
T48 |
37 |
|
T115 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T46 |
1 |
|
T48 |
17 |
|
T115 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T46 |
7 |
|
T48 |
35 |
|
T115 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T46 |
3 |
|
T48 |
22 |
|
T115 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
45 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64959 |
1 |
|
|
T46 |
1142 |
|
T48 |
1426 |
|
T115 |
2831 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54784 |
1 |
|
|
T46 |
40 |
|
T48 |
754 |
|
T115 |
1418 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62701 |
1 |
|
|
T46 |
263 |
|
T48 |
1418 |
|
T115 |
1261 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45658 |
1 |
|
|
T46 |
32 |
|
T48 |
1854 |
|
T115 |
933 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1888 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1866 |
1 |
|
|
T46 |
1 |
|
T48 |
44 |
|
T115 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1850 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1826 |
1 |
|
|
T46 |
1 |
|
T48 |
43 |
|
T115 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1815 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T46 |
1 |
|
T48 |
42 |
|
T115 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T46 |
3 |
|
T48 |
39 |
|
T115 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T46 |
1 |
|
T48 |
40 |
|
T115 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T46 |
6 |
|
T48 |
22 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T46 |
1 |
|
T48 |
40 |
|
T115 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T46 |
6 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T46 |
1 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T46 |
6 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T46 |
1 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T46 |
1 |
|
T48 |
37 |
|
T115 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T46 |
1 |
|
T48 |
37 |
|
T115 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T46 |
1 |
|
T48 |
37 |
|
T115 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T46 |
1 |
|
T48 |
35 |
|
T115 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T46 |
3 |
|
T48 |
31 |
|
T115 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T46 |
1 |
|
T48 |
35 |
|
T115 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T46 |
1 |
|
T48 |
35 |
|
T115 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T46 |
5 |
|
T48 |
21 |
|
T115 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T46 |
2 |
|
T48 |
29 |
|
T115 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T46 |
7 |
|
T48 |
19 |
|
T115 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T46 |
1 |
|
T48 |
34 |
|
T115 |
33 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62582 |
1 |
|
|
T46 |
186 |
|
T48 |
2057 |
|
T115 |
1357 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55499 |
1 |
|
|
T46 |
65 |
|
T48 |
1212 |
|
T115 |
1238 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56518 |
1 |
|
|
T46 |
298 |
|
T48 |
1032 |
|
T115 |
1227 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54765 |
1 |
|
|
T46 |
895 |
|
T48 |
897 |
|
T115 |
2283 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1861 |
1 |
|
|
T46 |
6 |
|
T48 |
53 |
|
T115 |
61 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1872 |
1 |
|
|
T46 |
7 |
|
T48 |
52 |
|
T115 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1813 |
1 |
|
|
T46 |
6 |
|
T48 |
53 |
|
T115 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T46 |
7 |
|
T48 |
52 |
|
T115 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1775 |
1 |
|
|
T46 |
6 |
|
T48 |
50 |
|
T115 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T46 |
6 |
|
T48 |
50 |
|
T115 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T46 |
6 |
|
T48 |
49 |
|
T115 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T46 |
4 |
|
T48 |
21 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T46 |
6 |
|
T48 |
50 |
|
T115 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T46 |
6 |
|
T48 |
47 |
|
T115 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T46 |
6 |
|
T48 |
48 |
|
T115 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T46 |
6 |
|
T48 |
47 |
|
T115 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T46 |
6 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T46 |
6 |
|
T48 |
43 |
|
T115 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T46 |
5 |
|
T48 |
39 |
|
T115 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T46 |
6 |
|
T48 |
42 |
|
T115 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T46 |
3 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
45 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66203 |
1 |
|
|
T46 |
1094 |
|
T48 |
1219 |
|
T115 |
1863 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49384 |
1 |
|
|
T46 |
131 |
|
T48 |
1861 |
|
T115 |
963 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66664 |
1 |
|
|
T46 |
122 |
|
T48 |
995 |
|
T115 |
2745 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48729 |
1 |
|
|
T46 |
99 |
|
T48 |
1328 |
|
T115 |
874 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T46 |
7 |
|
T48 |
46 |
|
T115 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
865 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T46 |
7 |
|
T48 |
53 |
|
T115 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T46 |
6 |
|
T48 |
43 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
865 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T46 |
6 |
|
T48 |
52 |
|
T115 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T46 |
6 |
|
T48 |
43 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
864 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T46 |
6 |
|
T48 |
52 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T46 |
4 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T46 |
6 |
|
T48 |
43 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
864 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T46 |
7 |
|
T48 |
43 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
862 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T46 |
7 |
|
T48 |
41 |
|
T115 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
862 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T46 |
7 |
|
T48 |
40 |
|
T115 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
853 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T46 |
6 |
|
T48 |
51 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
853 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T46 |
6 |
|
T48 |
48 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T46 |
6 |
|
T48 |
38 |
|
T115 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
849 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T46 |
6 |
|
T48 |
46 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
849 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T46 |
6 |
|
T48 |
46 |
|
T115 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
848 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
848 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
847 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
822 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
847 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T46 |
5 |
|
T48 |
45 |
|
T115 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T46 |
3 |
|
T48 |
19 |
|
T115 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
847 |
1 |
|
|
T46 |
3 |
|
T48 |
12 |
|
T115 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T46 |
5 |
|
T48 |
44 |
|
T115 |
28 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60137 |
1 |
|
|
T46 |
297 |
|
T48 |
1047 |
|
T115 |
1532 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47883 |
1 |
|
|
T46 |
114 |
|
T48 |
995 |
|
T115 |
871 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
70752 |
1 |
|
|
T46 |
160 |
|
T48 |
2213 |
|
T115 |
2807 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49969 |
1 |
|
|
T46 |
921 |
|
T48 |
1174 |
|
T115 |
1066 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1845 |
1 |
|
|
T46 |
6 |
|
T48 |
50 |
|
T115 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1832 |
1 |
|
|
T46 |
6 |
|
T48 |
45 |
|
T115 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1808 |
1 |
|
|
T46 |
6 |
|
T48 |
49 |
|
T115 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1803 |
1 |
|
|
T46 |
5 |
|
T48 |
45 |
|
T115 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T46 |
5 |
|
T48 |
48 |
|
T115 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T46 |
5 |
|
T48 |
45 |
|
T115 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T46 |
5 |
|
T48 |
46 |
|
T115 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T46 |
5 |
|
T48 |
45 |
|
T115 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T46 |
5 |
|
T48 |
45 |
|
T115 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T46 |
4 |
|
T48 |
41 |
|
T115 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T46 |
4 |
|
T48 |
41 |
|
T115 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T46 |
5 |
|
T48 |
42 |
|
T115 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T46 |
5 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T46 |
5 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T46 |
4 |
|
T48 |
39 |
|
T115 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T46 |
5 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T46 |
5 |
|
T48 |
36 |
|
T115 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T46 |
4 |
|
T48 |
37 |
|
T115 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T46 |
3 |
|
T48 |
15 |
|
T115 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T46 |
4 |
|
T48 |
34 |
|
T115 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T46 |
5 |
|
T48 |
34 |
|
T115 |
39 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67830 |
1 |
|
|
T46 |
855 |
|
T48 |
2148 |
|
T115 |
1345 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50703 |
1 |
|
|
T46 |
219 |
|
T48 |
839 |
|
T115 |
1166 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60890 |
1 |
|
|
T46 |
249 |
|
T48 |
1634 |
|
T115 |
1355 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49646 |
1 |
|
|
T46 |
119 |
|
T48 |
1054 |
|
T115 |
2170 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1830 |
1 |
|
|
T46 |
8 |
|
T48 |
37 |
|
T115 |
70 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1818 |
1 |
|
|
T46 |
7 |
|
T48 |
38 |
|
T115 |
66 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T46 |
8 |
|
T48 |
35 |
|
T115 |
69 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T46 |
7 |
|
T48 |
37 |
|
T115 |
65 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T46 |
8 |
|
T48 |
33 |
|
T115 |
65 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T46 |
7 |
|
T48 |
37 |
|
T115 |
64 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T46 |
3 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T46 |
8 |
|
T48 |
33 |
|
T115 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
63 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T46 |
9 |
|
T48 |
33 |
|
T115 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
63 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
2 |
|
T48 |
20 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T46 |
9 |
|
T48 |
31 |
|
T115 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T46 |
9 |
|
T48 |
30 |
|
T115 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T46 |
9 |
|
T48 |
30 |
|
T115 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
60 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T46 |
8 |
|
T48 |
29 |
|
T115 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T46 |
5 |
|
T48 |
31 |
|
T115 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T46 |
8 |
|
T48 |
29 |
|
T115 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T46 |
5 |
|
T48 |
31 |
|
T115 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T46 |
8 |
|
T48 |
29 |
|
T115 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T46 |
5 |
|
T48 |
31 |
|
T115 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T46 |
7 |
|
T48 |
28 |
|
T115 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T46 |
6 |
|
T48 |
28 |
|
T115 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T46 |
6 |
|
T48 |
28 |
|
T115 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
2 |
|
T48 |
19 |
|
T115 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T46 |
6 |
|
T48 |
28 |
|
T115 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T46 |
3 |
|
T48 |
18 |
|
T115 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T46 |
5 |
|
T48 |
30 |
|
T115 |
48 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67059 |
1 |
|
|
T46 |
947 |
|
T48 |
1008 |
|
T115 |
2772 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50171 |
1 |
|
|
T46 |
199 |
|
T48 |
1153 |
|
T115 |
1258 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61726 |
1 |
|
|
T46 |
95 |
|
T48 |
2301 |
|
T115 |
1471 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50379 |
1 |
|
|
T46 |
180 |
|
T48 |
818 |
|
T115 |
787 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1821 |
1 |
|
|
T46 |
9 |
|
T48 |
48 |
|
T115 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1829 |
1 |
|
|
T46 |
8 |
|
T48 |
45 |
|
T115 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T46 |
9 |
|
T48 |
45 |
|
T115 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1806 |
1 |
|
|
T46 |
8 |
|
T48 |
45 |
|
T115 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T46 |
9 |
|
T48 |
45 |
|
T115 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T46 |
8 |
|
T48 |
44 |
|
T115 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T46 |
2 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T46 |
9 |
|
T48 |
45 |
|
T115 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T46 |
8 |
|
T48 |
41 |
|
T115 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T46 |
10 |
|
T48 |
44 |
|
T115 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T46 |
8 |
|
T48 |
41 |
|
T115 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T46 |
1 |
|
T48 |
23 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T46 |
10 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T46 |
10 |
|
T48 |
41 |
|
T115 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T46 |
10 |
|
T48 |
40 |
|
T115 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T46 |
8 |
|
T48 |
39 |
|
T115 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T46 |
10 |
|
T48 |
40 |
|
T115 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T46 |
8 |
|
T48 |
36 |
|
T115 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T46 |
10 |
|
T48 |
39 |
|
T115 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T46 |
6 |
|
T48 |
34 |
|
T115 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T46 |
10 |
|
T48 |
39 |
|
T115 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T46 |
6 |
|
T48 |
33 |
|
T115 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T46 |
6 |
|
T48 |
32 |
|
T115 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T46 |
10 |
|
T48 |
37 |
|
T115 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T46 |
1 |
|
T48 |
22 |
|
T115 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T46 |
10 |
|
T48 |
35 |
|
T115 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T46 |
2 |
|
T48 |
26 |
|
T115 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T46 |
6 |
|
T48 |
31 |
|
T115 |
37 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
70257 |
1 |
|
|
T46 |
286 |
|
T48 |
2056 |
|
T115 |
1183 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51365 |
1 |
|
|
T46 |
173 |
|
T48 |
803 |
|
T115 |
2006 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56746 |
1 |
|
|
T46 |
96 |
|
T48 |
1371 |
|
T115 |
1804 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48608 |
1 |
|
|
T46 |
971 |
|
T48 |
1063 |
|
T115 |
1250 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1950 |
1 |
|
|
T46 |
3 |
|
T48 |
44 |
|
T115 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1955 |
1 |
|
|
T46 |
5 |
|
T48 |
49 |
|
T115 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1909 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1923 |
1 |
|
|
T46 |
5 |
|
T48 |
48 |
|
T115 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1871 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1893 |
1 |
|
|
T46 |
5 |
|
T48 |
48 |
|
T115 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1843 |
1 |
|
|
T46 |
3 |
|
T48 |
38 |
|
T115 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1858 |
1 |
|
|
T46 |
5 |
|
T48 |
48 |
|
T115 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1810 |
1 |
|
|
T46 |
3 |
|
T48 |
37 |
|
T115 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1815 |
1 |
|
|
T46 |
5 |
|
T48 |
47 |
|
T115 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T46 |
3 |
|
T48 |
36 |
|
T115 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T46 |
5 |
|
T48 |
46 |
|
T115 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T46 |
3 |
|
T48 |
35 |
|
T115 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T46 |
5 |
|
T48 |
44 |
|
T115 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T46 |
4 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T46 |
3 |
|
T48 |
34 |
|
T115 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T46 |
5 |
|
T48 |
43 |
|
T115 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T46 |
5 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T46 |
3 |
|
T48 |
33 |
|
T115 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T46 |
5 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T46 |
3 |
|
T48 |
30 |
|
T115 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T46 |
4 |
|
T48 |
42 |
|
T115 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T46 |
4 |
|
T48 |
41 |
|
T115 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T46 |
3 |
|
T48 |
28 |
|
T115 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T46 |
4 |
|
T48 |
40 |
|
T115 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T46 |
3 |
|
T48 |
27 |
|
T115 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T46 |
2 |
|
T48 |
21 |
|
T115 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T46 |
4 |
|
T48 |
38 |
|
T115 |
39 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64751 |
1 |
|
|
T46 |
1193 |
|
T48 |
1232 |
|
T115 |
1755 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47697 |
1 |
|
|
T46 |
96 |
|
T48 |
1139 |
|
T115 |
1911 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63900 |
1 |
|
|
T46 |
147 |
|
T48 |
1945 |
|
T115 |
1412 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51846 |
1 |
|
|
T46 |
81 |
|
T48 |
1040 |
|
T115 |
1249 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1832 |
1 |
|
|
T46 |
3 |
|
T48 |
52 |
|
T115 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1846 |
1 |
|
|
T46 |
3 |
|
T48 |
53 |
|
T115 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1800 |
1 |
|
|
T46 |
3 |
|
T48 |
51 |
|
T115 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1806 |
1 |
|
|
T46 |
3 |
|
T48 |
51 |
|
T115 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1769 |
1 |
|
|
T46 |
3 |
|
T48 |
48 |
|
T115 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1781 |
1 |
|
|
T46 |
3 |
|
T48 |
51 |
|
T115 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
845 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T46 |
3 |
|
T48 |
48 |
|
T115 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T46 |
3 |
|
T48 |
50 |
|
T115 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T46 |
2 |
|
T48 |
48 |
|
T115 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T46 |
3 |
|
T48 |
48 |
|
T115 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T46 |
2 |
|
T48 |
48 |
|
T115 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T46 |
3 |
|
T48 |
47 |
|
T115 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
837 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T46 |
2 |
|
T48 |
48 |
|
T115 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T46 |
3 |
|
T48 |
47 |
|
T115 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
837 |
1 |
|
|
T46 |
5 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T46 |
2 |
|
T48 |
46 |
|
T115 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T46 |
3 |
|
T48 |
44 |
|
T115 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
835 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T46 |
2 |
|
T48 |
46 |
|
T115 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T46 |
3 |
|
T48 |
43 |
|
T115 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
835 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T46 |
2 |
|
T48 |
45 |
|
T115 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T46 |
3 |
|
T48 |
42 |
|
T115 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T46 |
2 |
|
T48 |
44 |
|
T115 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T46 |
2 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T46 |
3 |
|
T48 |
41 |
|
T115 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T46 |
2 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T46 |
2 |
|
T48 |
39 |
|
T115 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
831 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T46 |
2 |
|
T48 |
39 |
|
T115 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T46 |
4 |
|
T48 |
15 |
|
T115 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T46 |
3 |
|
T48 |
40 |
|
T115 |
37 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66150 |
1 |
|
|
T46 |
141 |
|
T48 |
998 |
|
T115 |
1347 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48916 |
1 |
|
|
T46 |
113 |
|
T48 |
1929 |
|
T115 |
1884 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59874 |
1 |
|
|
T46 |
231 |
|
T48 |
1343 |
|
T115 |
1527 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54209 |
1 |
|
|
T46 |
922 |
|
T48 |
1194 |
|
T115 |
1545 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1821 |
1 |
|
|
T46 |
7 |
|
T48 |
48 |
|
T115 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
848 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1792 |
1 |
|
|
T46 |
8 |
|
T48 |
48 |
|
T115 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T46 |
7 |
|
T48 |
47 |
|
T115 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
848 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1762 |
1 |
|
|
T46 |
8 |
|
T48 |
47 |
|
T115 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T46 |
6 |
|
T48 |
46 |
|
T115 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
846 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T46 |
8 |
|
T48 |
44 |
|
T115 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
846 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T46 |
8 |
|
T48 |
44 |
|
T115 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T46 |
6 |
|
T48 |
44 |
|
T115 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T46 |
8 |
|
T48 |
43 |
|
T115 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T46 |
6 |
|
T48 |
40 |
|
T115 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
845 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T46 |
7 |
|
T48 |
42 |
|
T115 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T46 |
6 |
|
T48 |
39 |
|
T115 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T46 |
7 |
|
T48 |
42 |
|
T115 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T46 |
5 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T46 |
6 |
|
T48 |
39 |
|
T115 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
839 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T46 |
6 |
|
T48 |
36 |
|
T115 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T46 |
6 |
|
T48 |
35 |
|
T115 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T46 |
5 |
|
T48 |
35 |
|
T115 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T46 |
6 |
|
T48 |
41 |
|
T115 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T46 |
5 |
|
T48 |
33 |
|
T115 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T46 |
6 |
|
T48 |
39 |
|
T115 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T46 |
4 |
|
T48 |
17 |
|
T115 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T46 |
4 |
|
T48 |
32 |
|
T115 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T46 |
4 |
|
T48 |
16 |
|
T115 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T46 |
6 |
|
T48 |
39 |
|
T115 |
39 |