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Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3026582 1 T42 100 T43 152 T44 178
auto[1] 2644059 1 T42 106 T43 158 T44 158


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3567204 1 T42 86 T43 148 T44 196
auto[1] 2103437 1 T42 120 T43 162 T44 140


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1966151 1 T42 46 T43 68 T44 107
auto[0] auto[1] 1060431 1 T42 54 T43 84 T44 71
auto[1] auto[0] 1601053 1 T42 40 T43 80 T44 89
auto[1] auto[1] 1043006 1 T42 66 T43 78 T44 69


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3023459 1 T42 94 T43 142 T44 152
auto[1] 2647182 1 T42 112 T43 168 T44 184


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3565615 1 T42 104 T43 150 T44 154
auto[1] 2105026 1 T42 102 T43 160 T44 182


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1963663 1 T42 52 T43 61 T44 72
auto[0] auto[1] 1059796 1 T42 42 T43 81 T44 80
auto[1] auto[0] 1601952 1 T42 52 T43 89 T44 82
auto[1] auto[1] 1045230 1 T42 60 T43 79 T44 102


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3023762 1 T42 92 T43 148 T44 160
auto[1] 2646879 1 T42 114 T43 162 T44 176


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3568028 1 T42 89 T43 135 T44 186
auto[1] 2102613 1 T42 117 T43 175 T44 150


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1965181 1 T42 44 T43 65 T44 87
auto[0] auto[1] 1058581 1 T42 48 T43 83 T44 73
auto[1] auto[0] 1602847 1 T42 45 T43 70 T44 99
auto[1] auto[1] 1044032 1 T42 69 T43 92 T44 77


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3030572 1 T42 88 T43 168 T44 158
auto[1] 2640069 1 T42 118 T43 142 T44 178


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3568742 1 T42 86 T43 155 T44 116
auto[1] 2101899 1 T42 120 T43 155 T44 220


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1968098 1 T42 32 T43 84 T44 57
auto[0] auto[1] 1062474 1 T42 56 T43 84 T44 101
auto[1] auto[0] 1600644 1 T42 54 T43 71 T44 59
auto[1] auto[1] 1039425 1 T42 64 T43 71 T44 119


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3025613 1 T42 96 T43 154 T44 182
auto[1] 2645028 1 T42 110 T43 156 T44 154


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3566381 1 T42 117 T43 174 T44 168
auto[1] 2104260 1 T42 89 T43 136 T44 168


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1965484 1 T42 57 T43 86 T44 96
auto[0] auto[1] 1060129 1 T42 39 T43 68 T44 86
auto[1] auto[0] 1600897 1 T42 60 T43 88 T44 72
auto[1] auto[1] 1044131 1 T42 50 T43 68 T44 82


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3019502 1 T42 110 T43 138 T44 154
auto[1] 2651139 1 T42 96 T43 172 T44 182


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3569652 1 T42 89 T43 139 T44 188
auto[1] 2100989 1 T42 117 T43 171 T44 148


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1964433 1 T42 52 T43 57 T44 90
auto[0] auto[1] 1055069 1 T42 58 T43 81 T44 64
auto[1] auto[0] 1605219 1 T42 37 T43 82 T44 98
auto[1] auto[1] 1045920 1 T42 59 T43 90 T44 84


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020240 1 T42 98 T43 160 T44 180
auto[1] 2650401 1 T42 108 T43 150 T44 156


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3568222 1 T42 98 T43 172 T44 178
auto[1] 2102419 1 T42 108 T43 138 T44 158


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1961673 1 T42 50 T43 92 T44 90
auto[0] auto[1] 1058567 1 T42 48 T43 68 T44 90
auto[1] auto[0] 1606549 1 T42 48 T43 80 T44 88
auto[1] auto[1] 1043852 1 T42 60 T43 70 T44 68


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3021810 1 T42 90 T43 160 T44 176
auto[1] 2648831 1 T42 116 T43 150 T44 160


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3565372 1 T42 94 T43 160 T44 175
auto[1] 2105269 1 T42 112 T43 150 T44 161


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1962254 1 T42 35 T43 77 T44 94
auto[0] auto[1] 1059556 1 T42 55 T43 83 T44 82
auto[1] auto[0] 1603118 1 T42 59 T43 83 T44 81
auto[1] auto[1] 1045713 1 T42 57 T43 67 T44 79


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3021879 1 T42 126 T43 162 T44 188
auto[1] 2648762 1 T42 80 T43 148 T44 148


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3576984 1 T42 87 T43 153 T44 159
auto[1] 2093657 1 T42 119 T43 157 T44 177


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967762 1 T42 57 T43 81 T44 87
auto[0] auto[1] 1054117 1 T42 69 T43 81 T44 101
auto[1] auto[0] 1609222 1 T42 30 T43 72 T44 72
auto[1] auto[1] 1039540 1 T42 50 T43 76 T44 76


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020900 1 T42 98 T43 156 T44 166
auto[1] 2649741 1 T42 108 T43 154 T44 170


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3576464 1 T42 114 T43 147 T44 156
auto[1] 2094177 1 T42 92 T43 163 T44 180


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967529 1 T42 51 T43 71 T44 79
auto[0] auto[1] 1053371 1 T42 47 T43 85 T44 87
auto[1] auto[0] 1608935 1 T42 63 T43 76 T44 77
auto[1] auto[1] 1040806 1 T42 45 T43 78 T44 93


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3021803 1 T42 100 T43 150 T44 170
auto[1] 2648838 1 T42 106 T43 160 T44 166


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3578800 1 T42 104 T43 149 T44 174
auto[1] 2091841 1 T42 102 T43 161 T44 162


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1969361 1 T42 48 T43 78 T44 83
auto[0] auto[1] 1052442 1 T42 52 T43 72 T44 87
auto[1] auto[0] 1609439 1 T42 56 T43 71 T44 91
auto[1] auto[1] 1039399 1 T42 50 T43 89 T44 75


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020597 1 T42 98 T43 148 T44 164
auto[1] 2650044 1 T42 108 T43 162 T44 172


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3575899 1 T42 99 T43 175 T44 142
auto[1] 2094742 1 T42 107 T43 135 T44 194


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1966557 1 T42 46 T43 86 T44 70
auto[0] auto[1] 1054040 1 T42 52 T43 62 T44 94
auto[1] auto[0] 1609342 1 T42 53 T43 89 T44 72
auto[1] auto[1] 1040702 1 T42 55 T43 73 T44 100


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3027269 1 T42 108 T43 134 T44 162
auto[1] 2643372 1 T42 98 T43 176 T44 174


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3568130 1 T42 99 T43 160 T44 180
auto[1] 2102511 1 T42 107 T43 150 T44 156


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967512 1 T42 48 T43 71 T44 87
auto[0] auto[1] 1059757 1 T42 60 T43 63 T44 75
auto[1] auto[0] 1600618 1 T42 51 T43 89 T44 93
auto[1] auto[1] 1042754 1 T42 47 T43 87 T44 81


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020017 1 T42 92 T43 156 T44 184
auto[1] 2650624 1 T42 114 T43 154 T44 152


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3576698 1 T42 99 T43 150 T44 169
auto[1] 2093943 1 T42 107 T43 160 T44 167


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1965315 1 T42 44 T43 72 T44 86
auto[0] auto[1] 1054702 1 T42 48 T43 84 T44 98
auto[1] auto[0] 1611383 1 T42 55 T43 78 T44 83
auto[1] auto[1] 1039241 1 T42 59 T43 76 T44 69


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020474 1 T42 94 T43 188 T44 140
auto[1] 2650167 1 T42 112 T43 122 T44 196


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3579252 1 T42 102 T43 155 T44 176
auto[1] 2091389 1 T42 104 T43 155 T44 160


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967922 1 T42 52 T43 94 T44 75
auto[0] auto[1] 1052552 1 T42 42 T43 94 T44 65
auto[1] auto[0] 1611330 1 T42 50 T43 61 T44 101
auto[1] auto[1] 1038837 1 T42 62 T43 61 T44 95


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3030128 1 T42 94 T43 154 T44 180
auto[1] 2640513 1 T42 112 T43 156 T44 156


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3576875 1 T42 101 T43 151 T44 138
auto[1] 2093766 1 T42 105 T43 159 T44 198


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1974624 1 T42 42 T43 76 T44 78
auto[0] auto[1] 1055504 1 T42 52 T43 78 T44 102
auto[1] auto[0] 1602251 1 T42 59 T43 75 T44 60
auto[1] auto[1] 1038262 1 T42 53 T43 81 T44 96


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3020656 1 T42 94 T43 184 T44 162
auto[1] 2649985 1 T42 112 T43 126 T44 174


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3578501 1 T42 110 T43 161 T44 193
auto[1] 2092140 1 T42 96 T43 149 T44 143


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967871 1 T42 49 T43 88 T44 95
auto[0] auto[1] 1052785 1 T42 45 T43 96 T44 67
auto[1] auto[0] 1610630 1 T42 61 T43 73 T44 98
auto[1] auto[1] 1039355 1 T42 51 T43 53 T44 76


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3021238 1 T42 116 T43 152 T44 146
auto[1] 2649403 1 T42 90 T43 158 T44 190


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3573183 1 T42 96 T43 147 T44 162
auto[1] 2097458 1 T42 110 T43 163 T44 174


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1965768 1 T42 55 T43 75 T44 75
auto[0] auto[1] 1055470 1 T42 61 T43 77 T44 71
auto[1] auto[0] 1607415 1 T42 41 T43 72 T44 87
auto[1] auto[1] 1041988 1 T42 49 T43 86 T44 103


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3021195 1 T42 90 T43 164 T44 156
auto[1] 2649446 1 T42 116 T43 146 T44 180


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3580326 1 T42 102 T43 139 T44 163
auto[1] 2090315 1 T42 104 T43 171 T44 173


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1968519 1 T42 49 T43 74 T44 67
auto[0] auto[1] 1052676 1 T42 41 T43 90 T44 89
auto[1] auto[0] 1611807 1 T42 53 T43 65 T44 96
auto[1] auto[1] 1037639 1 T42 63 T43 81 T44 84


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3025071 1 T42 104 T43 146 T44 158
auto[1] 2645570 1 T42 102 T43 164 T44 178


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3578542 1 T42 96 T43 143 T44 184
auto[1] 2092099 1 T42 110 T43 167 T44 152


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1971158 1 T42 45 T43 68 T44 89
auto[0] auto[1] 1053913 1 T42 59 T43 78 T44 69
auto[1] auto[0] 1607384 1 T42 51 T43 75 T44 95
auto[1] auto[1] 1038186 1 T42 51 T43 89 T44 83


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3029888 1 T42 116 T43 154 T44 162
auto[1] 2640753 1 T42 90 T43 156 T44 174


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3578786 1 T42 97 T43 163 T44 155
auto[1] 2091855 1 T42 109 T43 147 T44 181


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1973167 1 T42 53 T43 81 T44 76
auto[0] auto[1] 1056721 1 T42 63 T43 73 T44 86
auto[1] auto[0] 1605619 1 T42 44 T43 82 T44 79
auto[1] auto[1] 1035134 1 T42 46 T43 74 T44 95


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3023703 1 T42 106 T43 116 T44 178
auto[1] 2646938 1 T42 100 T43 194 T44 158


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3581363 1 T42 106 T43 131 T44 178
auto[1] 2089278 1 T42 100 T43 179 T44 158


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1971482 1 T42 53 T43 53 T44 93
auto[0] auto[1] 1052221 1 T42 53 T43 63 T44 85
auto[1] auto[0] 1609881 1 T42 53 T43 78 T44 85
auto[1] auto[1] 1037057 1 T42 47 T43 116 T44 73


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3019358 1 T42 122 T43 156 T44 174
auto[1] 2651283 1 T42 84 T43 154 T44 162


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3577017 1 T42 115 T43 151 T44 168
auto[1] 2093624 1 T42 91 T43 159 T44 168


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1966149 1 T42 75 T43 65 T44 85
auto[0] auto[1] 1053209 1 T42 47 T43 91 T44 89
auto[1] auto[0] 1610868 1 T42 40 T43 86 T44 83
auto[1] auto[1] 1040415 1 T42 44 T43 68 T44 79


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3025285 1 T42 86 T43 150 T44 144
auto[1] 2645356 1 T42 120 T43 160 T44 192


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3569587 1 T42 97 T43 161 T44 147
auto[1] 2101054 1 T42 109 T43 149 T44 189


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1967921 1 T42 38 T43 74 T44 63
auto[0] auto[1] 1057364 1 T42 48 T43 76 T44 81
auto[1] auto[0] 1601666 1 T42 59 T43 87 T44 84
auto[1] auto[1] 1043690 1 T42 61 T43 73 T44 108


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3024739 1 T42 124 T43 164 T44 186
auto[1] 2645902 1 T42 82 T43 146 T44 150


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3580295 1 T42 106 T43 167 T44 161
auto[1] 2090346 1 T42 100 T43 143 T44 175


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1971320 1 T42 64 T43 91 T44 93
auto[0] auto[1] 1053419 1 T42 60 T43 73 T44 93
auto[1] auto[0] 1608975 1 T42 42 T43 76 T44 68
auto[1] auto[1] 1036927 1 T42 40 T43 70 T44 82


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3025315 1 T42 112 T43 138 T44 174
auto[1] 2645326 1 T42 94 T43 172 T44 162


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3578102 1 T42 106 T43 141 T44 177
auto[1] 2092539 1 T42 100 T43 169 T44 159


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1969647 1 T42 60 T43 60 T44 85
auto[0] auto[1] 1055668 1 T42 52 T43 78 T44 89
auto[1] auto[0] 1608455 1 T42 46 T43 81 T44 92
auto[1] auto[1] 1036871 1 T42 48 T43 91 T44 70

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