cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50867 |
1 |
|
|
T47 |
412 |
|
T97 |
150 |
|
T65 |
1239 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45051 |
1 |
|
|
T47 |
971 |
|
T97 |
738 |
|
T65 |
894 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51801 |
1 |
|
|
T47 |
2459 |
|
T97 |
161 |
|
T65 |
1829 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44505 |
1 |
|
|
T47 |
1192 |
|
T97 |
100 |
|
T65 |
1735 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T47 |
54 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T47 |
49 |
|
T97 |
8 |
|
T65 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T47 |
54 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T47 |
49 |
|
T97 |
8 |
|
T65 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T47 |
52 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T47 |
48 |
|
T97 |
8 |
|
T65 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T47 |
50 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T47 |
48 |
|
T97 |
8 |
|
T65 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T47 |
48 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T47 |
47 |
|
T97 |
8 |
|
T65 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T47 |
48 |
|
T97 |
7 |
|
T65 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T47 |
47 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T47 |
46 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T47 |
47 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T47 |
46 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T47 |
46 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T47 |
41 |
|
T97 |
6 |
|
T65 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T47 |
40 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T47 |
39 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1094 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T47 |
37 |
|
T97 |
4 |
|
T65 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
9 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1070 |
1 |
|
|
T47 |
43 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T47 |
36 |
|
T97 |
4 |
|
T65 |
26 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56392 |
1 |
|
|
T47 |
766 |
|
T97 |
158 |
|
T65 |
2627 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41073 |
1 |
|
|
T47 |
733 |
|
T97 |
160 |
|
T65 |
1101 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49920 |
1 |
|
|
T47 |
1901 |
|
T97 |
665 |
|
T65 |
1286 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45324 |
1 |
|
|
T47 |
1939 |
|
T97 |
208 |
|
T65 |
702 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
14 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
14 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
14 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
14 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T47 |
31 |
|
T97 |
7 |
|
T65 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T47 |
27 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T47 |
27 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T47 |
25 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T47 |
25 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T47 |
31 |
|
T97 |
7 |
|
T65 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T47 |
23 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T47 |
31 |
|
T97 |
7 |
|
T65 |
26 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51208 |
1 |
|
|
T47 |
869 |
|
T97 |
168 |
|
T65 |
1384 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48536 |
1 |
|
|
T47 |
2146 |
|
T97 |
106 |
|
T65 |
1180 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52616 |
1 |
|
|
T47 |
969 |
|
T97 |
852 |
|
T65 |
1899 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40278 |
1 |
|
|
T47 |
827 |
|
T97 |
84 |
|
T65 |
1023 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T47 |
55 |
|
T97 |
4 |
|
T65 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T47 |
50 |
|
T97 |
3 |
|
T65 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T47 |
55 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T47 |
48 |
|
T97 |
3 |
|
T65 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T47 |
55 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T47 |
46 |
|
T97 |
3 |
|
T65 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T47 |
55 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T47 |
46 |
|
T97 |
3 |
|
T65 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T47 |
54 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T47 |
45 |
|
T97 |
3 |
|
T65 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T47 |
54 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T47 |
52 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T47 |
43 |
|
T97 |
3 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T47 |
52 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T47 |
39 |
|
T97 |
3 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T47 |
50 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T47 |
46 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T47 |
46 |
|
T97 |
3 |
|
T65 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T47 |
45 |
|
T97 |
3 |
|
T65 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T47 |
45 |
|
T97 |
3 |
|
T65 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
40 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62418 |
1 |
|
|
T47 |
1242 |
|
T97 |
328 |
|
T65 |
2498 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36942 |
1 |
|
|
T47 |
915 |
|
T97 |
120 |
|
T65 |
769 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51388 |
1 |
|
|
T47 |
1313 |
|
T97 |
177 |
|
T65 |
1501 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42055 |
1 |
|
|
T47 |
1677 |
|
T97 |
597 |
|
T65 |
910 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T47 |
38 |
|
T97 |
7 |
|
T65 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T47 |
37 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T47 |
37 |
|
T97 |
6 |
|
T65 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T47 |
37 |
|
T97 |
6 |
|
T65 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T47 |
26 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T47 |
26 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1057 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T47 |
19 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1017 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
32 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60410 |
1 |
|
|
T47 |
1981 |
|
T97 |
757 |
|
T65 |
1158 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40368 |
1 |
|
|
T47 |
1192 |
|
T97 |
107 |
|
T65 |
1024 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49016 |
1 |
|
|
T47 |
1020 |
|
T97 |
154 |
|
T65 |
1128 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41892 |
1 |
|
|
T47 |
732 |
|
T97 |
203 |
|
T65 |
2125 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T47 |
52 |
|
T97 |
6 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T47 |
51 |
|
T97 |
6 |
|
T65 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T47 |
52 |
|
T97 |
6 |
|
T65 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T47 |
50 |
|
T97 |
6 |
|
T65 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T47 |
51 |
|
T97 |
6 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T47 |
48 |
|
T97 |
5 |
|
T65 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T47 |
51 |
|
T97 |
6 |
|
T65 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T47 |
48 |
|
T97 |
5 |
|
T65 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T47 |
51 |
|
T97 |
6 |
|
T65 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T47 |
46 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T47 |
51 |
|
T97 |
6 |
|
T65 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T47 |
43 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T47 |
51 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T47 |
43 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T47 |
51 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T47 |
42 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T47 |
41 |
|
T97 |
4 |
|
T65 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T47 |
48 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T47 |
36 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T47 |
48 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T47 |
47 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T47 |
47 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T47 |
47 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53662 |
1 |
|
|
T47 |
2312 |
|
T97 |
789 |
|
T65 |
1290 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42197 |
1 |
|
|
T47 |
800 |
|
T97 |
130 |
|
T65 |
1178 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56393 |
1 |
|
|
T47 |
1595 |
|
T97 |
200 |
|
T65 |
2215 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41114 |
1 |
|
|
T47 |
565 |
|
T97 |
106 |
|
T65 |
980 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T47 |
29 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T47 |
26 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1095 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1074 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
30 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47834 |
1 |
|
|
T47 |
996 |
|
T97 |
241 |
|
T65 |
1091 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43150 |
1 |
|
|
T47 |
903 |
|
T97 |
617 |
|
T65 |
1152 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54385 |
1 |
|
|
T47 |
1176 |
|
T97 |
280 |
|
T65 |
2051 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46778 |
1 |
|
|
T47 |
2093 |
|
T97 |
116 |
|
T65 |
1239 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T47 |
42 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T47 |
40 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T47 |
44 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T47 |
39 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T47 |
44 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T47 |
41 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T47 |
37 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T47 |
40 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T47 |
40 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T47 |
39 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T47 |
38 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1086 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50001 |
1 |
|
|
T47 |
915 |
|
T97 |
200 |
|
T65 |
2192 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39738 |
1 |
|
|
T47 |
712 |
|
T97 |
128 |
|
T65 |
943 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52842 |
1 |
|
|
T47 |
2707 |
|
T97 |
779 |
|
T65 |
1324 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50770 |
1 |
|
|
T47 |
1022 |
|
T97 |
58 |
|
T65 |
1088 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T47 |
34 |
|
T97 |
8 |
|
T65 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T47 |
15 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T47 |
33 |
|
T97 |
8 |
|
T65 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T47 |
33 |
|
T97 |
8 |
|
T65 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T47 |
33 |
|
T97 |
8 |
|
T65 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T47 |
29 |
|
T97 |
8 |
|
T65 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T47 |
28 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T47 |
28 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T47 |
29 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
17 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T47 |
29 |
|
T97 |
3 |
|
T65 |
33 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52124 |
1 |
|
|
T47 |
863 |
|
T97 |
780 |
|
T65 |
2430 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42382 |
1 |
|
|
T47 |
1045 |
|
T97 |
69 |
|
T65 |
989 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51834 |
1 |
|
|
T47 |
765 |
|
T97 |
176 |
|
T65 |
1307 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44910 |
1 |
|
|
T47 |
2309 |
|
T97 |
178 |
|
T65 |
1025 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T47 |
12 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T47 |
54 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T47 |
54 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T47 |
12 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T47 |
54 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T47 |
53 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T47 |
12 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T47 |
54 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T47 |
52 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T47 |
12 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T47 |
52 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T47 |
51 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T47 |
47 |
|
T97 |
3 |
|
T65 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T47 |
47 |
|
T97 |
3 |
|
T65 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T47 |
49 |
|
T97 |
5 |
|
T65 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T47 |
46 |
|
T97 |
3 |
|
T65 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T47 |
47 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T47 |
45 |
|
T97 |
3 |
|
T65 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T47 |
46 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T47 |
44 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T47 |
42 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T47 |
41 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T47 |
42 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T47 |
40 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T47 |
12 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53327 |
1 |
|
|
T47 |
1892 |
|
T97 |
188 |
|
T65 |
1231 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40881 |
1 |
|
|
T47 |
641 |
|
T97 |
78 |
|
T65 |
1988 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57413 |
1 |
|
|
T47 |
1293 |
|
T97 |
285 |
|
T65 |
1607 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41831 |
1 |
|
|
T47 |
1536 |
|
T97 |
693 |
|
T65 |
785 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T47 |
23 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T47 |
23 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T47 |
23 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T47 |
31 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T47 |
23 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T47 |
31 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T47 |
26 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T47 |
26 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T47 |
26 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1065 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1050 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1035 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
28 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53689 |
1 |
|
|
T47 |
1328 |
|
T97 |
130 |
|
T65 |
1428 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43413 |
1 |
|
|
T47 |
872 |
|
T97 |
792 |
|
T65 |
1070 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51098 |
1 |
|
|
T47 |
2180 |
|
T97 |
165 |
|
T65 |
2083 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43396 |
1 |
|
|
T47 |
771 |
|
T97 |
158 |
|
T65 |
821 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T47 |
38 |
|
T97 |
5 |
|
T65 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T47 |
38 |
|
T97 |
5 |
|
T65 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T47 |
36 |
|
T97 |
5 |
|
T65 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T47 |
41 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T47 |
36 |
|
T97 |
5 |
|
T65 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T47 |
41 |
|
T97 |
6 |
|
T65 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T47 |
35 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T47 |
39 |
|
T97 |
6 |
|
T65 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T47 |
39 |
|
T97 |
6 |
|
T65 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T47 |
37 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T47 |
26 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T47 |
24 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53363 |
1 |
|
|
T47 |
2768 |
|
T97 |
308 |
|
T65 |
1228 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45536 |
1 |
|
|
T47 |
757 |
|
T97 |
107 |
|
T65 |
1671 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49961 |
1 |
|
|
T47 |
1157 |
|
T97 |
622 |
|
T65 |
1549 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43355 |
1 |
|
|
T47 |
637 |
|
T97 |
137 |
|
T65 |
1209 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T47 |
34 |
|
T97 |
10 |
|
T65 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T47 |
32 |
|
T97 |
10 |
|
T65 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T47 |
32 |
|
T97 |
8 |
|
T65 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T47 |
31 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T47 |
31 |
|
T97 |
8 |
|
T65 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T47 |
20 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T47 |
30 |
|
T97 |
8 |
|
T65 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T47 |
20 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
20 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
20 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T47 |
27 |
|
T97 |
6 |
|
T65 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T47 |
26 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T47 |
28 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T47 |
28 |
|
T97 |
7 |
|
T65 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T47 |
24 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T47 |
28 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T47 |
27 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T47 |
20 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T47 |
27 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48113 |
1 |
|
|
T47 |
2208 |
|
T97 |
192 |
|
T65 |
1127 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40509 |
1 |
|
|
T47 |
751 |
|
T97 |
571 |
|
T65 |
992 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49340 |
1 |
|
|
T47 |
1144 |
|
T97 |
281 |
|
T65 |
1402 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53642 |
1 |
|
|
T47 |
1006 |
|
T97 |
165 |
|
T65 |
2055 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T47 |
40 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T47 |
37 |
|
T97 |
4 |
|
T65 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T47 |
37 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T47 |
37 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T47 |
36 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T47 |
35 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T47 |
35 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T47 |
35 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T47 |
31 |
|
T97 |
2 |
|
T65 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T47 |
31 |
|
T97 |
4 |
|
T65 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T47 |
31 |
|
T97 |
2 |
|
T65 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T47 |
31 |
|
T97 |
2 |
|
T65 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T47 |
30 |
|
T97 |
2 |
|
T65 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T47 |
29 |
|
T97 |
1 |
|
T65 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T47 |
21 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T47 |
28 |
|
T97 |
1 |
|
T65 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55893 |
1 |
|
|
T47 |
996 |
|
T97 |
247 |
|
T65 |
1321 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42172 |
1 |
|
|
T47 |
928 |
|
T97 |
660 |
|
T65 |
875 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47721 |
1 |
|
|
T47 |
2476 |
|
T97 |
198 |
|
T65 |
1425 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46291 |
1 |
|
|
T47 |
590 |
|
T97 |
86 |
|
T65 |
1955 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T47 |
44 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T47 |
43 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T47 |
42 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T47 |
21 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T47 |
41 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T47 |
41 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T47 |
41 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T47 |
39 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T47 |
41 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T47 |
39 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T47 |
40 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T47 |
38 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T47 |
39 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T47 |
37 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T47 |
39 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T47 |
36 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
31 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51902 |
1 |
|
|
T47 |
1102 |
|
T97 |
258 |
|
T65 |
1227 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44657 |
1 |
|
|
T47 |
2230 |
|
T97 |
692 |
|
T65 |
2049 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56865 |
1 |
|
|
T47 |
741 |
|
T97 |
83 |
|
T65 |
825 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38240 |
1 |
|
|
T47 |
953 |
|
T97 |
186 |
|
T65 |
1350 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T47 |
50 |
|
T97 |
7 |
|
T65 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T47 |
52 |
|
T97 |
8 |
|
T65 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T47 |
49 |
|
T97 |
7 |
|
T65 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T47 |
52 |
|
T97 |
8 |
|
T65 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T47 |
48 |
|
T97 |
7 |
|
T65 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T47 |
51 |
|
T97 |
7 |
|
T65 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T47 |
47 |
|
T97 |
7 |
|
T65 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T47 |
48 |
|
T97 |
7 |
|
T65 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T47 |
46 |
|
T97 |
7 |
|
T65 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T47 |
43 |
|
T97 |
7 |
|
T65 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T47 |
46 |
|
T97 |
7 |
|
T65 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T47 |
43 |
|
T97 |
7 |
|
T65 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
16 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T47 |
43 |
|
T97 |
7 |
|
T65 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T47 |
38 |
|
T97 |
7 |
|
T65 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
16 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
14 |
|
T97 |
1 |
|
T65 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
37 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56223 |
1 |
|
|
T47 |
2358 |
|
T97 |
301 |
|
T65 |
1118 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40799 |
1 |
|
|
T47 |
730 |
|
T97 |
69 |
|
T65 |
2140 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55239 |
1 |
|
|
T47 |
1456 |
|
T97 |
731 |
|
T65 |
1220 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40445 |
1 |
|
|
T47 |
689 |
|
T97 |
87 |
|
T65 |
1116 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T47 |
31 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
24 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T47 |
30 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T47 |
33 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
24 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
24 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
24 |
|
T97 |
7 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T47 |
31 |
|
T97 |
2 |
|
T65 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T47 |
28 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T47 |
29 |
|
T97 |
2 |
|
T65 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T47 |
27 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T47 |
28 |
|
T97 |
2 |
|
T65 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T47 |
25 |
|
T97 |
3 |
|
T65 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T47 |
28 |
|
T97 |
2 |
|
T65 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T47 |
25 |
|
T97 |
3 |
|
T65 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T47 |
28 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T47 |
27 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T47 |
24 |
|
T97 |
6 |
|
T65 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1044 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T47 |
19 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
35 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57219 |
1 |
|
|
T47 |
2245 |
|
T97 |
161 |
|
T65 |
1739 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41968 |
1 |
|
|
T47 |
570 |
|
T97 |
162 |
|
T65 |
1750 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50834 |
1 |
|
|
T47 |
1471 |
|
T97 |
765 |
|
T65 |
1355 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42676 |
1 |
|
|
T47 |
971 |
|
T97 |
75 |
|
T65 |
852 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T47 |
33 |
|
T97 |
7 |
|
T65 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T47 |
31 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T47 |
31 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T47 |
30 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
21 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T47 |
29 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T47 |
27 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T47 |
25 |
|
T97 |
7 |
|
T65 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T47 |
23 |
|
T97 |
6 |
|
T65 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1056 |
1 |
|
|
T47 |
27 |
|
T97 |
3 |
|
T65 |
28 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52900 |
1 |
|
|
T47 |
1196 |
|
T97 |
100 |
|
T65 |
1016 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42189 |
1 |
|
|
T47 |
730 |
|
T97 |
625 |
|
T65 |
2088 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56239 |
1 |
|
|
T47 |
1419 |
|
T97 |
248 |
|
T65 |
1360 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41503 |
1 |
|
|
T47 |
1808 |
|
T97 |
213 |
|
T65 |
1130 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T47 |
41 |
|
T97 |
10 |
|
T65 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T47 |
35 |
|
T97 |
10 |
|
T65 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T47 |
41 |
|
T97 |
10 |
|
T65 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T47 |
35 |
|
T97 |
10 |
|
T65 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T47 |
40 |
|
T97 |
10 |
|
T65 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T47 |
34 |
|
T97 |
10 |
|
T65 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T47 |
39 |
|
T97 |
9 |
|
T65 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T47 |
33 |
|
T97 |
10 |
|
T65 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T47 |
38 |
|
T97 |
8 |
|
T65 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T47 |
32 |
|
T97 |
10 |
|
T65 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T47 |
36 |
|
T97 |
8 |
|
T65 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T47 |
32 |
|
T97 |
10 |
|
T65 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T47 |
31 |
|
T97 |
10 |
|
T65 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T47 |
31 |
|
T97 |
10 |
|
T65 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T47 |
33 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T47 |
30 |
|
T97 |
10 |
|
T65 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T47 |
32 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T47 |
28 |
|
T97 |
9 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T47 |
28 |
|
T97 |
9 |
|
T65 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T47 |
28 |
|
T97 |
9 |
|
T65 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
24 |
|
T97 |
1 |
|
T65 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T47 |
27 |
|
T97 |
9 |
|
T65 |
37 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55097 |
1 |
|
|
T47 |
782 |
|
T97 |
151 |
|
T65 |
1686 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42554 |
1 |
|
|
T47 |
2173 |
|
T97 |
130 |
|
T65 |
757 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52477 |
1 |
|
|
T47 |
1261 |
|
T97 |
662 |
|
T65 |
2538 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42316 |
1 |
|
|
T47 |
773 |
|
T97 |
191 |
|
T65 |
853 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T47 |
49 |
|
T97 |
8 |
|
T65 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T47 |
45 |
|
T97 |
10 |
|
T65 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T47 |
49 |
|
T97 |
8 |
|
T65 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T47 |
44 |
|
T97 |
10 |
|
T65 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T47 |
47 |
|
T97 |
8 |
|
T65 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T47 |
43 |
|
T97 |
10 |
|
T65 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T47 |
46 |
|
T97 |
8 |
|
T65 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T47 |
40 |
|
T97 |
10 |
|
T65 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T47 |
45 |
|
T97 |
8 |
|
T65 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T47 |
39 |
|
T97 |
10 |
|
T65 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T47 |
44 |
|
T97 |
8 |
|
T65 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T47 |
38 |
|
T97 |
10 |
|
T65 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T47 |
44 |
|
T97 |
8 |
|
T65 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T47 |
36 |
|
T97 |
10 |
|
T65 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T47 |
44 |
|
T97 |
8 |
|
T65 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T47 |
35 |
|
T97 |
10 |
|
T65 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T47 |
43 |
|
T97 |
8 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T47 |
34 |
|
T97 |
9 |
|
T65 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T47 |
33 |
|
T97 |
9 |
|
T65 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T47 |
39 |
|
T97 |
7 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T47 |
33 |
|
T97 |
9 |
|
T65 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T47 |
39 |
|
T97 |
7 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T47 |
32 |
|
T97 |
9 |
|
T65 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T47 |
32 |
|
T97 |
9 |
|
T65 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T47 |
38 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
21 |
|
T97 |
2 |
|
T65 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1073 |
1 |
|
|
T47 |
29 |
|
T97 |
9 |
|
T65 |
27 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52726 |
1 |
|
|
T47 |
1126 |
|
T97 |
890 |
|
T65 |
1395 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42703 |
1 |
|
|
T47 |
1025 |
|
T97 |
41 |
|
T65 |
1300 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53630 |
1 |
|
|
T47 |
1414 |
|
T97 |
245 |
|
T65 |
999 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43495 |
1 |
|
|
T47 |
1627 |
|
T97 |
106 |
|
T65 |
1931 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T47 |
39 |
|
T97 |
2 |
|
T65 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T47 |
38 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T47 |
39 |
|
T97 |
2 |
|
T65 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T47 |
38 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T47 |
39 |
|
T97 |
2 |
|
T65 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T47 |
37 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T47 |
37 |
|
T97 |
2 |
|
T65 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T47 |
35 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T47 |
37 |
|
T97 |
2 |
|
T65 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T47 |
34 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T47 |
37 |
|
T97 |
2 |
|
T65 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T47 |
34 |
|
T97 |
2 |
|
T65 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T47 |
37 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T47 |
36 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T47 |
36 |
|
T97 |
2 |
|
T65 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T47 |
32 |
|
T97 |
2 |
|
T65 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T47 |
36 |
|
T97 |
2 |
|
T65 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T47 |
30 |
|
T97 |
2 |
|
T65 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T47 |
34 |
|
T97 |
2 |
|
T65 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T47 |
34 |
|
T97 |
2 |
|
T65 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T47 |
34 |
|
T97 |
2 |
|
T65 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T47 |
32 |
|
T97 |
2 |
|
T65 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T47 |
26 |
|
T97 |
2 |
|
T65 |
36 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47430 |
1 |
|
|
T47 |
1168 |
|
T97 |
156 |
|
T65 |
1391 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42684 |
1 |
|
|
T47 |
875 |
|
T97 |
703 |
|
T65 |
1179 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50358 |
1 |
|
|
T47 |
892 |
|
T97 |
146 |
|
T65 |
1027 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51095 |
1 |
|
|
T47 |
2023 |
|
T97 |
130 |
|
T65 |
1936 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T47 |
43 |
|
T97 |
10 |
|
T65 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T47 |
48 |
|
T97 |
9 |
|
T65 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T47 |
43 |
|
T97 |
10 |
|
T65 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T47 |
47 |
|
T97 |
9 |
|
T65 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T47 |
41 |
|
T97 |
10 |
|
T65 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T47 |
45 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T47 |
40 |
|
T97 |
10 |
|
T65 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T47 |
45 |
|
T97 |
9 |
|
T65 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T47 |
40 |
|
T97 |
9 |
|
T65 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T47 |
44 |
|
T97 |
9 |
|
T65 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T47 |
39 |
|
T97 |
9 |
|
T65 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T47 |
41 |
|
T97 |
9 |
|
T65 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T47 |
38 |
|
T97 |
9 |
|
T65 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T47 |
40 |
|
T97 |
9 |
|
T65 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
24 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T47 |
37 |
|
T97 |
9 |
|
T65 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T47 |
38 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T47 |
38 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T47 |
35 |
|
T97 |
8 |
|
T65 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T47 |
34 |
|
T97 |
8 |
|
T65 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T47 |
33 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
24 |
|
T97 |
2 |
|
T65 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T47 |
33 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
19 |
|
T97 |
3 |
|
T65 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T47 |
32 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50287 |
1 |
|
|
T47 |
2432 |
|
T97 |
200 |
|
T65 |
1091 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45155 |
1 |
|
|
T47 |
761 |
|
T97 |
20 |
|
T65 |
1010 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53014 |
1 |
|
|
T47 |
1418 |
|
T97 |
850 |
|
T65 |
1224 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43366 |
1 |
|
|
T47 |
694 |
|
T97 |
141 |
|
T65 |
2217 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T47 |
32 |
|
T97 |
1 |
|
T65 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T47 |
32 |
|
T97 |
1 |
|
T65 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T47 |
30 |
|
T97 |
1 |
|
T65 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T47 |
29 |
|
T97 |
1 |
|
T65 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T47 |
29 |
|
T97 |
1 |
|
T65 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
20 |
|
T97 |
7 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T47 |
29 |
|
T97 |
1 |
|
T65 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T47 |
29 |
|
T65 |
40 |
|
T98 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T47 |
28 |
|
T65 |
39 |
|
T98 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T47 |
28 |
|
T65 |
36 |
|
T98 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T47 |
26 |
|
T65 |
35 |
|
T98 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T47 |
26 |
|
T65 |
35 |
|
T98 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T47 |
26 |
|
T65 |
33 |
|
T98 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1127 |
1 |
|
|
T47 |
26 |
|
T65 |
32 |
|
T98 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
18 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T47 |
23 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58955 |
1 |
|
|
T47 |
1775 |
|
T97 |
115 |
|
T65 |
1253 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41032 |
1 |
|
|
T47 |
2018 |
|
T97 |
366 |
|
T65 |
2129 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51888 |
1 |
|
|
T47 |
929 |
|
T97 |
87 |
|
T65 |
884 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40895 |
1 |
|
|
T47 |
613 |
|
T97 |
652 |
|
T65 |
1087 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T47 |
33 |
|
T97 |
7 |
|
T65 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T47 |
29 |
|
T97 |
6 |
|
T65 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T47 |
32 |
|
T97 |
7 |
|
T65 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T47 |
32 |
|
T97 |
6 |
|
T65 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T47 |
27 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
18 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T47 |
27 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T47 |
25 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T47 |
22 |
|
T97 |
6 |
|
T65 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T47 |
20 |
|
T97 |
6 |
|
T65 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T47 |
30 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T47 |
29 |
|
T97 |
6 |
|
T65 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T47 |
20 |
|
T97 |
5 |
|
T65 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1110 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T47 |
18 |
|
T97 |
1 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T47 |
28 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
21 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52358 |
1 |
|
|
T47 |
1601 |
|
T97 |
148 |
|
T65 |
972 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43730 |
1 |
|
|
T47 |
809 |
|
T97 |
35 |
|
T65 |
1161 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55723 |
1 |
|
|
T47 |
1915 |
|
T97 |
771 |
|
T65 |
2395 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40416 |
1 |
|
|
T47 |
974 |
|
T97 |
175 |
|
T65 |
1067 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T47 |
17 |
|
T97 |
6 |
|
T65 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T47 |
36 |
|
T97 |
9 |
|
T65 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T47 |
17 |
|
T97 |
6 |
|
T65 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T47 |
35 |
|
T97 |
9 |
|
T65 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
17 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T47 |
35 |
|
T97 |
7 |
|
T65 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T47 |
32 |
|
T97 |
9 |
|
T65 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
17 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T47 |
32 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T47 |
32 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T47 |
32 |
|
T97 |
2 |
|
T65 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T47 |
31 |
|
T97 |
2 |
|
T65 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T47 |
30 |
|
T97 |
2 |
|
T65 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T47 |
30 |
|
T97 |
9 |
|
T65 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T47 |
30 |
|
T97 |
2 |
|
T65 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T47 |
29 |
|
T97 |
9 |
|
T65 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T47 |
30 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T47 |
29 |
|
T97 |
9 |
|
T65 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T47 |
28 |
|
T97 |
1 |
|
T65 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T47 |
28 |
|
T97 |
9 |
|
T65 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
16 |
|
T97 |
6 |
|
T65 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1089 |
1 |
|
|
T47 |
28 |
|
T97 |
1 |
|
T65 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T47 |
27 |
|
T97 |
9 |
|
T65 |
35 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52021 |
1 |
|
|
T47 |
2022 |
|
T97 |
771 |
|
T65 |
1292 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41065 |
1 |
|
|
T47 |
1005 |
|
T97 |
117 |
|
T65 |
809 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52760 |
1 |
|
|
T47 |
983 |
|
T97 |
117 |
|
T65 |
1888 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46006 |
1 |
|
|
T47 |
967 |
|
T97 |
225 |
|
T65 |
1776 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T47 |
47 |
|
T97 |
8 |
|
T65 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T47 |
54 |
|
T97 |
8 |
|
T65 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T47 |
47 |
|
T97 |
8 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T47 |
54 |
|
T97 |
8 |
|
T65 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T47 |
45 |
|
T97 |
8 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T47 |
53 |
|
T97 |
7 |
|
T65 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T47 |
52 |
|
T97 |
7 |
|
T65 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T47 |
50 |
|
T97 |
7 |
|
T65 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T47 |
49 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T47 |
47 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T47 |
20 |
|
T97 |
2 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T47 |
38 |
|
T97 |
5 |
|
T65 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T47 |
38 |
|
T97 |
5 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T47 |
43 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T47 |
42 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T47 |
35 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T47 |
39 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T47 |
38 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T47 |
20 |
|
T97 |
1 |
|
T65 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T47 |
12 |
|
T97 |
1 |
|
T65 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T47 |
38 |
|
T97 |
7 |
|
T65 |
30 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56687 |
1 |
|
|
T47 |
1826 |
|
T97 |
819 |
|
T65 |
1401 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46602 |
1 |
|
|
T47 |
742 |
|
T97 |
93 |
|
T65 |
1606 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
45607 |
1 |
|
|
T47 |
787 |
|
T97 |
118 |
|
T65 |
1708 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43544 |
1 |
|
|
T47 |
1843 |
|
T97 |
124 |
|
T65 |
790 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T47 |
43 |
|
T97 |
6 |
|
T65 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T47 |
42 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T47 |
39 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T47 |
19 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T47 |
38 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T47 |
39 |
|
T97 |
6 |
|
T65 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T47 |
36 |
|
T97 |
6 |
|
T65 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T47 |
36 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T47 |
34 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T47 |
33 |
|
T97 |
7 |
|
T65 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T47 |
32 |
|
T97 |
6 |
|
T65 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T47 |
32 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T47 |
31 |
|
T97 |
6 |
|
T65 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1068 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
16 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48603 |
1 |
|
|
T47 |
707 |
|
T97 |
170 |
|
T65 |
2275 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44101 |
1 |
|
|
T47 |
1399 |
|
T97 |
48 |
|
T65 |
850 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53803 |
1 |
|
|
T47 |
1738 |
|
T97 |
914 |
|
T65 |
1325 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45466 |
1 |
|
|
T47 |
1173 |
|
T97 |
119 |
|
T65 |
1197 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T47 |
53 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T47 |
52 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T47 |
51 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T47 |
11 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T47 |
50 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T47 |
50 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T47 |
43 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T47 |
50 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T47 |
43 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T47 |
50 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T47 |
42 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T47 |
10 |
|
T97 |
5 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T47 |
48 |
|
T97 |
3 |
|
T65 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T47 |
42 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T47 |
48 |
|
T97 |
3 |
|
T65 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T47 |
42 |
|
T97 |
3 |
|
T65 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T47 |
48 |
|
T97 |
3 |
|
T65 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T47 |
42 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T47 |
47 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T47 |
41 |
|
T97 |
3 |
|
T65 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T47 |
40 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T47 |
44 |
|
T97 |
3 |
|
T65 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T47 |
38 |
|
T97 |
3 |
|
T65 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T47 |
43 |
|
T97 |
2 |
|
T65 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T47 |
10 |
|
T97 |
4 |
|
T65 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T47 |
42 |
|
T97 |
2 |
|
T65 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T47 |
16 |
|
T97 |
4 |
|
T65 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1093 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
35 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55756 |
1 |
|
|
T47 |
1167 |
|
T97 |
163 |
|
T65 |
1406 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41824 |
1 |
|
|
T47 |
997 |
|
T97 |
97 |
|
T65 |
1720 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57344 |
1 |
|
|
T47 |
2298 |
|
T97 |
235 |
|
T65 |
1585 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38571 |
1 |
|
|
T47 |
792 |
|
T97 |
728 |
|
T65 |
1052 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T47 |
35 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T47 |
34 |
|
T97 |
6 |
|
T65 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T47 |
18 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T47 |
34 |
|
T97 |
5 |
|
T65 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T47 |
33 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T47 |
31 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T47 |
29 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1095 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T47 |
27 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1066 |
1 |
|
|
T47 |
31 |
|
T97 |
4 |
|
T65 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1091 |
1 |
|
|
T47 |
26 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1043 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T47 |
19 |
|
T97 |
5 |
|
T65 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1068 |
1 |
|
|
T47 |
26 |
|
T97 |
3 |
|
T65 |
26 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51967 |
1 |
|
|
T47 |
1594 |
|
T97 |
185 |
|
T65 |
1082 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46887 |
1 |
|
|
T47 |
799 |
|
T97 |
78 |
|
T65 |
1881 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53077 |
1 |
|
|
T47 |
2155 |
|
T97 |
233 |
|
T65 |
1415 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39937 |
1 |
|
|
T47 |
755 |
|
T97 |
735 |
|
T65 |
1341 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T47 |
31 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T47 |
36 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T47 |
35 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T47 |
29 |
|
T97 |
5 |
|
T65 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T47 |
28 |
|
T97 |
5 |
|
T65 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T47 |
34 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T47 |
32 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T47 |
30 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T47 |
29 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T47 |
28 |
|
T97 |
4 |
|
T65 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T47 |
27 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T47 |
22 |
|
T97 |
3 |
|
T65 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T47 |
25 |
|
T97 |
4 |
|
T65 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T47 |
18 |
|
T97 |
4 |
|
T65 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T47 |
24 |
|
T97 |
4 |
|
T65 |
36 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52517 |
1 |
|
|
T47 |
1114 |
|
T97 |
155 |
|
T65 |
1113 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43053 |
1 |
|
|
T47 |
1916 |
|
T97 |
714 |
|
T65 |
2046 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54214 |
1 |
|
|
T47 |
964 |
|
T97 |
188 |
|
T65 |
1455 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43975 |
1 |
|
|
T47 |
1091 |
|
T97 |
109 |
|
T65 |
1030 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T47 |
49 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T47 |
45 |
|
T97 |
8 |
|
T65 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T47 |
49 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T47 |
45 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T47 |
47 |
|
T97 |
9 |
|
T65 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T47 |
14 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T47 |
43 |
|
T97 |
9 |
|
T65 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
13 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T47 |
40 |
|
T97 |
9 |
|
T65 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T47 |
44 |
|
T97 |
7 |
|
T65 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T47 |
13 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T47 |
40 |
|
T97 |
9 |
|
T65 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T47 |
42 |
|
T97 |
7 |
|
T65 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
13 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T47 |
13 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T47 |
41 |
|
T97 |
7 |
|
T65 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T47 |
40 |
|
T97 |
8 |
|
T65 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T47 |
40 |
|
T97 |
6 |
|
T65 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T47 |
39 |
|
T97 |
8 |
|
T65 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T47 |
37 |
|
T97 |
8 |
|
T65 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T47 |
37 |
|
T97 |
8 |
|
T65 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T47 |
38 |
|
T97 |
6 |
|
T65 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T47 |
37 |
|
T97 |
8 |
|
T65 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1093 |
1 |
|
|
T47 |
37 |
|
T97 |
6 |
|
T65 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1082 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1073 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T47 |
13 |
|
T97 |
2 |
|
T65 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1052 |
1 |
|
|
T47 |
37 |
|
T97 |
7 |
|
T65 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T47 |
17 |
|
T97 |
3 |
|
T65 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1052 |
1 |
|
|
T47 |
36 |
|
T97 |
5 |
|
T65 |
28 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57883 |
1 |
|
|
T47 |
1231 |
|
T97 |
183 |
|
T65 |
1030 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45321 |
1 |
|
|
T47 |
903 |
|
T97 |
30 |
|
T65 |
983 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51549 |
1 |
|
|
T47 |
2189 |
|
T97 |
221 |
|
T65 |
1355 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37702 |
1 |
|
|
T47 |
800 |
|
T97 |
805 |
|
T65 |
2184 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T47 |
38 |
|
T97 |
3 |
|
T65 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T47 |
37 |
|
T97 |
5 |
|
T65 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T47 |
38 |
|
T97 |
3 |
|
T65 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T47 |
35 |
|
T97 |
5 |
|
T65 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T47 |
38 |
|
T97 |
3 |
|
T65 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T47 |
35 |
|
T97 |
5 |
|
T65 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T47 |
37 |
|
T97 |
3 |
|
T65 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T47 |
32 |
|
T97 |
5 |
|
T65 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T47 |
37 |
|
T97 |
3 |
|
T65 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T47 |
30 |
|
T97 |
5 |
|
T65 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T47 |
37 |
|
T97 |
3 |
|
T65 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T47 |
22 |
|
T97 |
5 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T47 |
35 |
|
T97 |
3 |
|
T65 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T47 |
35 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T47 |
27 |
|
T97 |
5 |
|
T65 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T47 |
26 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T47 |
26 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T47 |
33 |
|
T97 |
3 |
|
T65 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1082 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T47 |
22 |
|
T97 |
4 |
|
T65 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T47 |
33 |
|
T97 |
2 |
|
T65 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T47 |
23 |
|
T97 |
3 |
|
T65 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T47 |
25 |
|
T97 |
5 |
|
T65 |
38 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56807 |
1 |
|
|
T47 |
2056 |
|
T97 |
141 |
|
T65 |
1260 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37990 |
1 |
|
|
T47 |
991 |
|
T97 |
70 |
|
T65 |
1854 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53494 |
1 |
|
|
T47 |
847 |
|
T97 |
882 |
|
T65 |
980 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43705 |
1 |
|
|
T47 |
1030 |
|
T97 |
145 |
|
T65 |
1267 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T47 |
52 |
|
T97 |
4 |
|
T65 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T47 |
53 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T47 |
50 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T47 |
53 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T47 |
47 |
|
T97 |
4 |
|
T65 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T47 |
53 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T47 |
53 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T47 |
53 |
|
T97 |
4 |
|
T65 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T47 |
44 |
|
T97 |
4 |
|
T65 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T47 |
52 |
|
T97 |
4 |
|
T65 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T47 |
52 |
|
T97 |
4 |
|
T65 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T47 |
42 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T47 |
50 |
|
T97 |
4 |
|
T65 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T47 |
40 |
|
T97 |
3 |
|
T65 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T47 |
49 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T47 |
48 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T47 |
36 |
|
T97 |
3 |
|
T65 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T47 |
35 |
|
T97 |
3 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T47 |
45 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1090 |
1 |
|
|
T47 |
34 |
|
T97 |
3 |
|
T65 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T47 |
17 |
|
T97 |
4 |
|
T65 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1062 |
1 |
|
|
T47 |
32 |
|
T97 |
3 |
|
T65 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T47 |
15 |
|
T97 |
4 |
|
T65 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T47 |
43 |
|
T97 |
4 |
|
T65 |
41 |