Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2733412 |
1 |
|
|
T41 |
24 |
|
T42 |
18 |
|
T43 |
46 |
| auto[1] |
2397581 |
1 |
|
|
T41 |
38 |
|
T42 |
40 |
|
T43 |
64 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3226879 |
1 |
|
|
T41 |
44 |
|
T42 |
28 |
|
T43 |
54 |
| auto[1] |
1904114 |
1 |
|
|
T41 |
18 |
|
T42 |
30 |
|
T43 |
56 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1774145 |
1 |
|
|
T41 |
15 |
|
T42 |
9 |
|
T43 |
19 |
| auto[0] |
auto[1] |
959267 |
1 |
|
|
T41 |
9 |
|
T42 |
9 |
|
T43 |
27 |
| auto[1] |
auto[0] |
1452734 |
1 |
|
|
T41 |
29 |
|
T42 |
19 |
|
T43 |
35 |
| auto[1] |
auto[1] |
944847 |
1 |
|
|
T41 |
9 |
|
T42 |
21 |
|
T43 |
29 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2732617 |
1 |
|
|
T41 |
30 |
|
T42 |
32 |
|
T43 |
58 |
| auto[1] |
2398376 |
1 |
|
|
T41 |
32 |
|
T42 |
26 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3226193 |
1 |
|
|
T41 |
36 |
|
T42 |
19 |
|
T43 |
60 |
| auto[1] |
1904800 |
1 |
|
|
T41 |
26 |
|
T42 |
39 |
|
T43 |
50 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1774088 |
1 |
|
|
T41 |
16 |
|
T42 |
11 |
|
T43 |
30 |
| auto[0] |
auto[1] |
958529 |
1 |
|
|
T41 |
14 |
|
T42 |
21 |
|
T43 |
28 |
| auto[1] |
auto[0] |
1452105 |
1 |
|
|
T41 |
20 |
|
T42 |
8 |
|
T43 |
30 |
| auto[1] |
auto[1] |
946271 |
1 |
|
|
T41 |
12 |
|
T42 |
18 |
|
T43 |
22 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2727403 |
1 |
|
|
T41 |
28 |
|
T42 |
32 |
|
T43 |
58 |
| auto[1] |
2403590 |
1 |
|
|
T41 |
34 |
|
T42 |
26 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3225401 |
1 |
|
|
T41 |
34 |
|
T42 |
37 |
|
T43 |
73 |
| auto[1] |
1905592 |
1 |
|
|
T41 |
28 |
|
T42 |
21 |
|
T43 |
37 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1769982 |
1 |
|
|
T41 |
12 |
|
T42 |
21 |
|
T43 |
38 |
| auto[0] |
auto[1] |
957421 |
1 |
|
|
T41 |
16 |
|
T42 |
11 |
|
T43 |
20 |
| auto[1] |
auto[0] |
1455419 |
1 |
|
|
T41 |
22 |
|
T42 |
16 |
|
T43 |
35 |
| auto[1] |
auto[1] |
948171 |
1 |
|
|
T41 |
12 |
|
T42 |
10 |
|
T43 |
17 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730007 |
1 |
|
|
T41 |
32 |
|
T42 |
26 |
|
T43 |
34 |
| auto[1] |
2400986 |
1 |
|
|
T41 |
30 |
|
T42 |
32 |
|
T43 |
76 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3222632 |
1 |
|
|
T41 |
37 |
|
T42 |
37 |
|
T43 |
53 |
| auto[1] |
1908361 |
1 |
|
|
T41 |
25 |
|
T42 |
21 |
|
T43 |
57 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1769208 |
1 |
|
|
T41 |
18 |
|
T42 |
15 |
|
T43 |
11 |
| auto[0] |
auto[1] |
960799 |
1 |
|
|
T41 |
14 |
|
T42 |
11 |
|
T43 |
23 |
| auto[1] |
auto[0] |
1453424 |
1 |
|
|
T41 |
19 |
|
T42 |
22 |
|
T43 |
42 |
| auto[1] |
auto[1] |
947562 |
1 |
|
|
T41 |
11 |
|
T42 |
10 |
|
T43 |
34 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2733817 |
1 |
|
|
T41 |
30 |
|
T42 |
26 |
|
T43 |
50 |
| auto[1] |
2397176 |
1 |
|
|
T41 |
32 |
|
T42 |
32 |
|
T43 |
60 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3223827 |
1 |
|
|
T41 |
35 |
|
T42 |
31 |
|
T43 |
56 |
| auto[1] |
1907166 |
1 |
|
|
T41 |
27 |
|
T42 |
27 |
|
T43 |
54 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1773577 |
1 |
|
|
T41 |
21 |
|
T42 |
12 |
|
T43 |
28 |
| auto[0] |
auto[1] |
960240 |
1 |
|
|
T41 |
9 |
|
T42 |
14 |
|
T43 |
22 |
| auto[1] |
auto[0] |
1450250 |
1 |
|
|
T41 |
14 |
|
T42 |
19 |
|
T43 |
28 |
| auto[1] |
auto[1] |
946926 |
1 |
|
|
T41 |
18 |
|
T42 |
13 |
|
T43 |
32 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2732904 |
1 |
|
|
T41 |
32 |
|
T42 |
28 |
|
T43 |
56 |
| auto[1] |
2398089 |
1 |
|
|
T41 |
30 |
|
T42 |
30 |
|
T43 |
54 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3225827 |
1 |
|
|
T41 |
32 |
|
T42 |
33 |
|
T43 |
37 |
| auto[1] |
1905166 |
1 |
|
|
T41 |
30 |
|
T42 |
25 |
|
T43 |
73 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1773000 |
1 |
|
|
T41 |
17 |
|
T42 |
15 |
|
T43 |
17 |
| auto[0] |
auto[1] |
959904 |
1 |
|
|
T41 |
15 |
|
T42 |
13 |
|
T43 |
39 |
| auto[1] |
auto[0] |
1452827 |
1 |
|
|
T41 |
15 |
|
T42 |
18 |
|
T43 |
20 |
| auto[1] |
auto[1] |
945262 |
1 |
|
|
T41 |
15 |
|
T42 |
12 |
|
T43 |
34 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2731782 |
1 |
|
|
T41 |
22 |
|
T42 |
36 |
|
T43 |
56 |
| auto[1] |
2399211 |
1 |
|
|
T41 |
40 |
|
T42 |
22 |
|
T43 |
54 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3225669 |
1 |
|
|
T41 |
34 |
|
T42 |
40 |
|
T43 |
52 |
| auto[1] |
1905324 |
1 |
|
|
T41 |
28 |
|
T42 |
18 |
|
T43 |
58 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1773146 |
1 |
|
|
T41 |
15 |
|
T42 |
26 |
|
T43 |
24 |
| auto[0] |
auto[1] |
958636 |
1 |
|
|
T41 |
7 |
|
T42 |
10 |
|
T43 |
32 |
| auto[1] |
auto[0] |
1452523 |
1 |
|
|
T41 |
19 |
|
T42 |
14 |
|
T43 |
28 |
| auto[1] |
auto[1] |
946688 |
1 |
|
|
T41 |
21 |
|
T42 |
8 |
|
T43 |
26 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2735264 |
1 |
|
|
T41 |
28 |
|
T42 |
28 |
|
T43 |
62 |
| auto[1] |
2395729 |
1 |
|
|
T41 |
34 |
|
T42 |
30 |
|
T43 |
48 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3226027 |
1 |
|
|
T41 |
38 |
|
T42 |
24 |
|
T43 |
57 |
| auto[1] |
1904966 |
1 |
|
|
T41 |
24 |
|
T42 |
34 |
|
T43 |
53 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1773915 |
1 |
|
|
T41 |
17 |
|
T42 |
8 |
|
T43 |
27 |
| auto[0] |
auto[1] |
961349 |
1 |
|
|
T41 |
11 |
|
T42 |
20 |
|
T43 |
35 |
| auto[1] |
auto[0] |
1452112 |
1 |
|
|
T41 |
21 |
|
T42 |
16 |
|
T43 |
30 |
| auto[1] |
auto[1] |
943617 |
1 |
|
|
T41 |
13 |
|
T42 |
14 |
|
T43 |
18 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730291 |
1 |
|
|
T41 |
30 |
|
T42 |
30 |
|
T43 |
56 |
| auto[1] |
2400702 |
1 |
|
|
T41 |
32 |
|
T42 |
28 |
|
T43 |
54 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3235658 |
1 |
|
|
T41 |
31 |
|
T42 |
38 |
|
T43 |
55 |
| auto[1] |
1895335 |
1 |
|
|
T41 |
31 |
|
T42 |
20 |
|
T43 |
55 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1776038 |
1 |
|
|
T41 |
16 |
|
T42 |
19 |
|
T43 |
26 |
| auto[0] |
auto[1] |
954253 |
1 |
|
|
T41 |
14 |
|
T42 |
11 |
|
T43 |
30 |
| auto[1] |
auto[0] |
1459620 |
1 |
|
|
T41 |
15 |
|
T42 |
19 |
|
T43 |
29 |
| auto[1] |
auto[1] |
941082 |
1 |
|
|
T41 |
17 |
|
T42 |
9 |
|
T43 |
25 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2740216 |
1 |
|
|
T41 |
38 |
|
T42 |
32 |
|
T43 |
44 |
| auto[1] |
2390777 |
1 |
|
|
T41 |
24 |
|
T42 |
26 |
|
T43 |
66 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3234776 |
1 |
|
|
T41 |
32 |
|
T42 |
34 |
|
T43 |
51 |
| auto[1] |
1896217 |
1 |
|
|
T41 |
30 |
|
T42 |
24 |
|
T43 |
59 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1784822 |
1 |
|
|
T41 |
20 |
|
T42 |
17 |
|
T43 |
19 |
| auto[0] |
auto[1] |
955394 |
1 |
|
|
T41 |
18 |
|
T42 |
15 |
|
T43 |
25 |
| auto[1] |
auto[0] |
1449954 |
1 |
|
|
T41 |
12 |
|
T42 |
17 |
|
T43 |
32 |
| auto[1] |
auto[1] |
940823 |
1 |
|
|
T41 |
12 |
|
T42 |
9 |
|
T43 |
34 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730323 |
1 |
|
|
T41 |
42 |
|
T42 |
28 |
|
T43 |
60 |
| auto[1] |
2400670 |
1 |
|
|
T41 |
20 |
|
T42 |
30 |
|
T43 |
50 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3236948 |
1 |
|
|
T41 |
34 |
|
T42 |
33 |
|
T43 |
58 |
| auto[1] |
1894045 |
1 |
|
|
T41 |
28 |
|
T42 |
25 |
|
T43 |
52 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1775782 |
1 |
|
|
T41 |
22 |
|
T42 |
16 |
|
T43 |
33 |
| auto[0] |
auto[1] |
954541 |
1 |
|
|
T41 |
20 |
|
T42 |
12 |
|
T43 |
27 |
| auto[1] |
auto[0] |
1461166 |
1 |
|
|
T41 |
12 |
|
T42 |
17 |
|
T43 |
25 |
| auto[1] |
auto[1] |
939504 |
1 |
|
|
T41 |
8 |
|
T42 |
13 |
|
T43 |
25 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2732287 |
1 |
|
|
T41 |
38 |
|
T42 |
36 |
|
T43 |
72 |
| auto[1] |
2398706 |
1 |
|
|
T41 |
24 |
|
T42 |
22 |
|
T43 |
38 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3236058 |
1 |
|
|
T41 |
36 |
|
T42 |
30 |
|
T43 |
58 |
| auto[1] |
1894935 |
1 |
|
|
T41 |
26 |
|
T42 |
28 |
|
T43 |
52 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1777454 |
1 |
|
|
T41 |
19 |
|
T42 |
19 |
|
T43 |
35 |
| auto[0] |
auto[1] |
954833 |
1 |
|
|
T41 |
19 |
|
T42 |
17 |
|
T43 |
37 |
| auto[1] |
auto[0] |
1458604 |
1 |
|
|
T41 |
17 |
|
T42 |
11 |
|
T43 |
23 |
| auto[1] |
auto[1] |
940102 |
1 |
|
|
T41 |
7 |
|
T42 |
11 |
|
T43 |
15 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730007 |
1 |
|
|
T41 |
26 |
|
T42 |
30 |
|
T43 |
58 |
| auto[1] |
2400986 |
1 |
|
|
T41 |
36 |
|
T42 |
28 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3224495 |
1 |
|
|
T41 |
33 |
|
T42 |
27 |
|
T43 |
59 |
| auto[1] |
1906498 |
1 |
|
|
T41 |
29 |
|
T42 |
31 |
|
T43 |
51 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1770827 |
1 |
|
|
T41 |
13 |
|
T42 |
14 |
|
T43 |
30 |
| auto[0] |
auto[1] |
959180 |
1 |
|
|
T41 |
13 |
|
T42 |
16 |
|
T43 |
28 |
| auto[1] |
auto[0] |
1453668 |
1 |
|
|
T41 |
20 |
|
T42 |
13 |
|
T43 |
29 |
| auto[1] |
auto[1] |
947318 |
1 |
|
|
T41 |
16 |
|
T42 |
15 |
|
T43 |
23 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730743 |
1 |
|
|
T41 |
32 |
|
T42 |
12 |
|
T43 |
46 |
| auto[1] |
2400250 |
1 |
|
|
T41 |
30 |
|
T42 |
46 |
|
T43 |
64 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3233880 |
1 |
|
|
T41 |
27 |
|
T42 |
35 |
|
T43 |
59 |
| auto[1] |
1897113 |
1 |
|
|
T41 |
35 |
|
T42 |
23 |
|
T43 |
51 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1775102 |
1 |
|
|
T41 |
14 |
|
T42 |
8 |
|
T43 |
30 |
| auto[0] |
auto[1] |
955641 |
1 |
|
|
T41 |
18 |
|
T42 |
4 |
|
T43 |
16 |
| auto[1] |
auto[0] |
1458778 |
1 |
|
|
T41 |
13 |
|
T42 |
27 |
|
T43 |
29 |
| auto[1] |
auto[1] |
941472 |
1 |
|
|
T41 |
17 |
|
T42 |
19 |
|
T43 |
35 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2727799 |
1 |
|
|
T41 |
40 |
|
T42 |
28 |
|
T43 |
56 |
| auto[1] |
2403194 |
1 |
|
|
T41 |
22 |
|
T42 |
30 |
|
T43 |
54 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3235058 |
1 |
|
|
T41 |
36 |
|
T42 |
21 |
|
T43 |
55 |
| auto[1] |
1895935 |
1 |
|
|
T41 |
26 |
|
T42 |
37 |
|
T43 |
55 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1774208 |
1 |
|
|
T41 |
24 |
|
T42 |
13 |
|
T43 |
28 |
| auto[0] |
auto[1] |
953591 |
1 |
|
|
T41 |
16 |
|
T42 |
15 |
|
T43 |
28 |
| auto[1] |
auto[0] |
1460850 |
1 |
|
|
T41 |
12 |
|
T42 |
8 |
|
T43 |
27 |
| auto[1] |
auto[1] |
942344 |
1 |
|
|
T41 |
10 |
|
T42 |
22 |
|
T43 |
27 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2734240 |
1 |
|
|
T41 |
30 |
|
T42 |
32 |
|
T43 |
54 |
| auto[1] |
2396753 |
1 |
|
|
T41 |
32 |
|
T42 |
26 |
|
T43 |
56 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3233397 |
1 |
|
|
T41 |
32 |
|
T42 |
20 |
|
T43 |
50 |
| auto[1] |
1897596 |
1 |
|
|
T41 |
30 |
|
T42 |
38 |
|
T43 |
60 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1778479 |
1 |
|
|
T41 |
15 |
|
T42 |
9 |
|
T43 |
29 |
| auto[0] |
auto[1] |
955761 |
1 |
|
|
T41 |
15 |
|
T42 |
23 |
|
T43 |
25 |
| auto[1] |
auto[0] |
1454918 |
1 |
|
|
T41 |
17 |
|
T42 |
11 |
|
T43 |
21 |
| auto[1] |
auto[1] |
941835 |
1 |
|
|
T41 |
15 |
|
T42 |
15 |
|
T43 |
35 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2732957 |
1 |
|
|
T41 |
40 |
|
T42 |
28 |
|
T43 |
64 |
| auto[1] |
2398036 |
1 |
|
|
T41 |
22 |
|
T42 |
30 |
|
T43 |
46 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3235996 |
1 |
|
|
T41 |
33 |
|
T42 |
23 |
|
T43 |
55 |
| auto[1] |
1894997 |
1 |
|
|
T41 |
29 |
|
T42 |
35 |
|
T43 |
55 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1779399 |
1 |
|
|
T41 |
17 |
|
T42 |
12 |
|
T43 |
31 |
| auto[0] |
auto[1] |
953558 |
1 |
|
|
T41 |
23 |
|
T42 |
16 |
|
T43 |
33 |
| auto[1] |
auto[0] |
1456597 |
1 |
|
|
T41 |
16 |
|
T42 |
11 |
|
T43 |
24 |
| auto[1] |
auto[1] |
941439 |
1 |
|
|
T41 |
6 |
|
T42 |
19 |
|
T43 |
22 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2737308 |
1 |
|
|
T41 |
26 |
|
T42 |
22 |
|
T43 |
52 |
| auto[1] |
2393685 |
1 |
|
|
T41 |
36 |
|
T42 |
36 |
|
T43 |
58 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3236463 |
1 |
|
|
T41 |
24 |
|
T42 |
37 |
|
T43 |
66 |
| auto[1] |
1894530 |
1 |
|
|
T41 |
38 |
|
T42 |
21 |
|
T43 |
44 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1781253 |
1 |
|
|
T41 |
10 |
|
T42 |
10 |
|
T43 |
30 |
| auto[0] |
auto[1] |
956055 |
1 |
|
|
T41 |
16 |
|
T42 |
12 |
|
T43 |
22 |
| auto[1] |
auto[0] |
1455210 |
1 |
|
|
T41 |
14 |
|
T42 |
27 |
|
T43 |
36 |
| auto[1] |
auto[1] |
938475 |
1 |
|
|
T41 |
22 |
|
T42 |
9 |
|
T43 |
22 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2735158 |
1 |
|
|
T41 |
32 |
|
T42 |
28 |
|
T43 |
58 |
| auto[1] |
2395835 |
1 |
|
|
T41 |
30 |
|
T42 |
30 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3236412 |
1 |
|
|
T41 |
39 |
|
T42 |
27 |
|
T43 |
60 |
| auto[1] |
1894581 |
1 |
|
|
T41 |
23 |
|
T42 |
31 |
|
T43 |
50 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1779075 |
1 |
|
|
T41 |
18 |
|
T42 |
15 |
|
T43 |
39 |
| auto[0] |
auto[1] |
956083 |
1 |
|
|
T41 |
14 |
|
T42 |
13 |
|
T43 |
19 |
| auto[1] |
auto[0] |
1457337 |
1 |
|
|
T41 |
21 |
|
T42 |
12 |
|
T43 |
21 |
| auto[1] |
auto[1] |
938498 |
1 |
|
|
T41 |
9 |
|
T42 |
18 |
|
T43 |
31 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2735028 |
1 |
|
|
T41 |
30 |
|
T42 |
28 |
|
T43 |
58 |
| auto[1] |
2395965 |
1 |
|
|
T41 |
32 |
|
T42 |
30 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3235754 |
1 |
|
|
T41 |
30 |
|
T42 |
19 |
|
T43 |
60 |
| auto[1] |
1895239 |
1 |
|
|
T41 |
32 |
|
T42 |
39 |
|
T43 |
50 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1780876 |
1 |
|
|
T41 |
18 |
|
T42 |
9 |
|
T43 |
34 |
| auto[0] |
auto[1] |
954152 |
1 |
|
|
T41 |
12 |
|
T42 |
19 |
|
T43 |
24 |
| auto[1] |
auto[0] |
1454878 |
1 |
|
|
T41 |
12 |
|
T42 |
10 |
|
T43 |
26 |
| auto[1] |
auto[1] |
941087 |
1 |
|
|
T41 |
20 |
|
T42 |
20 |
|
T43 |
26 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2737495 |
1 |
|
|
T41 |
32 |
|
T42 |
36 |
|
T43 |
50 |
| auto[1] |
2393498 |
1 |
|
|
T41 |
30 |
|
T42 |
22 |
|
T43 |
60 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3230916 |
1 |
|
|
T41 |
28 |
|
T42 |
30 |
|
T43 |
61 |
| auto[1] |
1900077 |
1 |
|
|
T41 |
34 |
|
T42 |
28 |
|
T43 |
49 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1777797 |
1 |
|
|
T41 |
16 |
|
T42 |
16 |
|
T43 |
34 |
| auto[0] |
auto[1] |
959698 |
1 |
|
|
T41 |
16 |
|
T42 |
20 |
|
T43 |
16 |
| auto[1] |
auto[0] |
1453119 |
1 |
|
|
T41 |
12 |
|
T42 |
14 |
|
T43 |
27 |
| auto[1] |
auto[1] |
940379 |
1 |
|
|
T41 |
18 |
|
T42 |
8 |
|
T43 |
33 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2735356 |
1 |
|
|
T41 |
28 |
|
T42 |
36 |
|
T43 |
54 |
| auto[1] |
2395637 |
1 |
|
|
T41 |
34 |
|
T42 |
22 |
|
T43 |
56 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3237283 |
1 |
|
|
T41 |
34 |
|
T42 |
32 |
|
T43 |
57 |
| auto[1] |
1893710 |
1 |
|
|
T41 |
28 |
|
T42 |
26 |
|
T43 |
53 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1780747 |
1 |
|
|
T41 |
18 |
|
T42 |
21 |
|
T43 |
25 |
| auto[0] |
auto[1] |
954609 |
1 |
|
|
T41 |
10 |
|
T42 |
15 |
|
T43 |
29 |
| auto[1] |
auto[0] |
1456536 |
1 |
|
|
T41 |
16 |
|
T42 |
11 |
|
T43 |
32 |
| auto[1] |
auto[1] |
939101 |
1 |
|
|
T41 |
18 |
|
T42 |
11 |
|
T43 |
24 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2729238 |
1 |
|
|
T41 |
30 |
|
T42 |
22 |
|
T43 |
58 |
| auto[1] |
2401755 |
1 |
|
|
T41 |
32 |
|
T42 |
36 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3235829 |
1 |
|
|
T41 |
31 |
|
T42 |
29 |
|
T43 |
58 |
| auto[1] |
1895164 |
1 |
|
|
T41 |
31 |
|
T42 |
29 |
|
T43 |
52 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1775637 |
1 |
|
|
T41 |
19 |
|
T42 |
10 |
|
T43 |
33 |
| auto[0] |
auto[1] |
953601 |
1 |
|
|
T41 |
11 |
|
T42 |
12 |
|
T43 |
25 |
| auto[1] |
auto[0] |
1460192 |
1 |
|
|
T41 |
12 |
|
T42 |
19 |
|
T43 |
25 |
| auto[1] |
auto[1] |
941563 |
1 |
|
|
T41 |
20 |
|
T42 |
17 |
|
T43 |
27 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2734467 |
1 |
|
|
T41 |
30 |
|
T42 |
36 |
|
T43 |
58 |
| auto[1] |
2396526 |
1 |
|
|
T41 |
32 |
|
T42 |
22 |
|
T43 |
52 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3226649 |
1 |
|
|
T41 |
29 |
|
T42 |
25 |
|
T43 |
40 |
| auto[1] |
1904344 |
1 |
|
|
T41 |
33 |
|
T42 |
33 |
|
T43 |
70 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1774654 |
1 |
|
|
T41 |
14 |
|
T42 |
14 |
|
T43 |
22 |
| auto[0] |
auto[1] |
959813 |
1 |
|
|
T41 |
16 |
|
T42 |
22 |
|
T43 |
36 |
| auto[1] |
auto[0] |
1451995 |
1 |
|
|
T41 |
15 |
|
T42 |
11 |
|
T43 |
18 |
| auto[1] |
auto[1] |
944531 |
1 |
|
|
T41 |
17 |
|
T42 |
11 |
|
T43 |
34 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2730287 |
1 |
|
|
T41 |
26 |
|
T42 |
28 |
|
T43 |
64 |
| auto[1] |
2400706 |
1 |
|
|
T41 |
36 |
|
T42 |
30 |
|
T43 |
46 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3237962 |
1 |
|
|
T41 |
34 |
|
T42 |
19 |
|
T43 |
61 |
| auto[1] |
1893031 |
1 |
|
|
T41 |
28 |
|
T42 |
39 |
|
T43 |
49 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1777900 |
1 |
|
|
T41 |
15 |
|
T42 |
8 |
|
T43 |
34 |
| auto[0] |
auto[1] |
952387 |
1 |
|
|
T41 |
11 |
|
T42 |
20 |
|
T43 |
30 |
| auto[1] |
auto[0] |
1460062 |
1 |
|
|
T41 |
19 |
|
T42 |
11 |
|
T43 |
27 |
| auto[1] |
auto[1] |
940644 |
1 |
|
|
T41 |
17 |
|
T42 |
19 |
|
T43 |
19 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2734342 |
1 |
|
|
T41 |
34 |
|
T42 |
24 |
|
T43 |
48 |
| auto[1] |
2396651 |
1 |
|
|
T41 |
28 |
|
T42 |
34 |
|
T43 |
62 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3233453 |
1 |
|
|
T41 |
35 |
|
T42 |
27 |
|
T43 |
41 |
| auto[1] |
1897540 |
1 |
|
|
T41 |
27 |
|
T42 |
31 |
|
T43 |
69 |