cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55255 |
1 |
|
|
T41 |
151 |
|
T43 |
1640 |
|
T102 |
1522 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45632 |
1 |
|
|
T41 |
824 |
|
T43 |
1614 |
|
T102 |
245 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53481 |
1 |
|
|
T41 |
321 |
|
T43 |
1151 |
|
T102 |
966 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41695 |
1 |
|
|
T41 |
29 |
|
T43 |
718 |
|
T102 |
382 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T41 |
2 |
|
T43 |
37 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T41 |
1 |
|
T43 |
35 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T41 |
1 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T41 |
1 |
|
T43 |
14 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T41 |
1 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T41 |
1 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T41 |
1 |
|
T43 |
33 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T41 |
1 |
|
T43 |
32 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T41 |
1 |
|
T43 |
31 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T41 |
5 |
|
T43 |
32 |
|
T102 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T41 |
1 |
|
T43 |
30 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T41 |
5 |
|
T43 |
31 |
|
T102 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T41 |
1 |
|
T43 |
29 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T41 |
1 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1058 |
1 |
|
|
T41 |
5 |
|
T43 |
31 |
|
T102 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T41 |
1 |
|
T43 |
28 |
|
T102 |
13 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50992 |
1 |
|
|
T41 |
360 |
|
T43 |
960 |
|
T102 |
530 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44492 |
1 |
|
|
T41 |
740 |
|
T43 |
997 |
|
T102 |
1532 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53938 |
1 |
|
|
T41 |
167 |
|
T43 |
1507 |
|
T102 |
394 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46189 |
1 |
|
|
T41 |
62 |
|
T43 |
1483 |
|
T102 |
517 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T41 |
3 |
|
T43 |
42 |
|
T102 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T41 |
2 |
|
T43 |
34 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T41 |
2 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T41 |
2 |
|
T43 |
30 |
|
T102 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T41 |
2 |
|
T43 |
30 |
|
T102 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T41 |
2 |
|
T43 |
30 |
|
T102 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T41 |
2 |
|
T43 |
29 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T41 |
2 |
|
T43 |
27 |
|
T102 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1086 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T41 |
2 |
|
T43 |
27 |
|
T102 |
14 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52420 |
1 |
|
|
T41 |
783 |
|
T43 |
1170 |
|
T102 |
1704 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42051 |
1 |
|
|
T41 |
138 |
|
T43 |
1928 |
|
T102 |
375 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55100 |
1 |
|
|
T41 |
171 |
|
T43 |
789 |
|
T102 |
521 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45481 |
1 |
|
|
T41 |
167 |
|
T43 |
962 |
|
T102 |
492 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T41 |
7 |
|
T43 |
44 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T41 |
5 |
|
T43 |
44 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T41 |
6 |
|
T43 |
44 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T41 |
6 |
|
T43 |
44 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T41 |
7 |
|
T43 |
39 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T41 |
7 |
|
T43 |
38 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T41 |
6 |
|
T43 |
33 |
|
T102 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1094 |
1 |
|
|
T41 |
6 |
|
T43 |
33 |
|
T102 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
17 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55941 |
1 |
|
|
T41 |
920 |
|
T43 |
1453 |
|
T102 |
1549 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50007 |
1 |
|
|
T41 |
79 |
|
T43 |
803 |
|
T102 |
521 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51286 |
1 |
|
|
T41 |
109 |
|
T43 |
2118 |
|
T102 |
536 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37627 |
1 |
|
|
T41 |
146 |
|
T43 |
636 |
|
T102 |
427 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T41 |
3 |
|
T43 |
32 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T41 |
3 |
|
T43 |
29 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T41 |
3 |
|
T43 |
32 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T41 |
3 |
|
T43 |
29 |
|
T102 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T41 |
3 |
|
T43 |
28 |
|
T102 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T41 |
3 |
|
T43 |
27 |
|
T102 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T41 |
3 |
|
T43 |
27 |
|
T102 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T41 |
3 |
|
T43 |
27 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T41 |
3 |
|
T43 |
26 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T41 |
3 |
|
T43 |
26 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1107 |
1 |
|
|
T41 |
4 |
|
T43 |
25 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
14 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58983 |
1 |
|
|
T41 |
52 |
|
T43 |
2087 |
|
T102 |
501 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40657 |
1 |
|
|
T41 |
784 |
|
T43 |
916 |
|
T102 |
546 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51032 |
1 |
|
|
T41 |
189 |
|
T43 |
1322 |
|
T102 |
321 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44312 |
1 |
|
|
T41 |
215 |
|
T43 |
828 |
|
T102 |
1514 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T41 |
8 |
|
T43 |
35 |
|
T102 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T41 |
8 |
|
T43 |
33 |
|
T102 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T41 |
6 |
|
T43 |
33 |
|
T102 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T41 |
4 |
|
T43 |
26 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T41 |
4 |
|
T43 |
26 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
22 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56140 |
1 |
|
|
T41 |
873 |
|
T43 |
1571 |
|
T102 |
811 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48644 |
1 |
|
|
T41 |
72 |
|
T43 |
600 |
|
T102 |
354 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47073 |
1 |
|
|
T41 |
274 |
|
T43 |
1957 |
|
T102 |
630 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42061 |
1 |
|
|
T41 |
53 |
|
T43 |
842 |
|
T102 |
1286 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T41 |
5 |
|
T43 |
31 |
|
T102 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T41 |
5 |
|
T43 |
29 |
|
T102 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T41 |
4 |
|
T43 |
26 |
|
T102 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T41 |
4 |
|
T43 |
26 |
|
T102 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T41 |
4 |
|
T43 |
25 |
|
T102 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T41 |
3 |
|
T43 |
35 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T41 |
3 |
|
T43 |
35 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T41 |
2 |
|
T43 |
34 |
|
T102 |
14 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54650 |
1 |
|
|
T41 |
22 |
|
T43 |
1829 |
|
T102 |
519 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40367 |
1 |
|
|
T41 |
106 |
|
T43 |
704 |
|
T102 |
494 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53169 |
1 |
|
|
T41 |
190 |
|
T43 |
1528 |
|
T102 |
547 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47284 |
1 |
|
|
T41 |
892 |
|
T43 |
998 |
|
T102 |
1419 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T41 |
10 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T41 |
10 |
|
T43 |
39 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T41 |
8 |
|
T43 |
37 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T41 |
10 |
|
T43 |
38 |
|
T102 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T41 |
10 |
|
T43 |
38 |
|
T102 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T41 |
10 |
|
T43 |
37 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T41 |
7 |
|
T43 |
33 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T41 |
10 |
|
T43 |
36 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T41 |
10 |
|
T43 |
36 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T41 |
10 |
|
T43 |
36 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T41 |
10 |
|
T43 |
36 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T41 |
10 |
|
T43 |
36 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1112 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T41 |
10 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56914 |
1 |
|
|
T41 |
889 |
|
T43 |
985 |
|
T102 |
633 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44517 |
1 |
|
|
T41 |
39 |
|
T43 |
829 |
|
T102 |
385 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56505 |
1 |
|
|
T41 |
211 |
|
T43 |
1331 |
|
T102 |
492 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38327 |
1 |
|
|
T41 |
118 |
|
T43 |
1825 |
|
T102 |
1579 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T41 |
3 |
|
T43 |
47 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T41 |
3 |
|
T43 |
45 |
|
T102 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T41 |
3 |
|
T43 |
45 |
|
T102 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T41 |
3 |
|
T43 |
45 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T41 |
4 |
|
T43 |
43 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
5 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T41 |
2 |
|
T43 |
37 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T41 |
2 |
|
T43 |
36 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T41 |
2 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T41 |
2 |
|
T43 |
34 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T41 |
2 |
|
T43 |
33 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1086 |
1 |
|
|
T41 |
2 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T41 |
3 |
|
T43 |
35 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T41 |
5 |
|
T43 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T41 |
2 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T41 |
5 |
|
T43 |
12 |
|
T102 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
14 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56714 |
1 |
|
|
T41 |
246 |
|
T43 |
2018 |
|
T102 |
521 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40363 |
1 |
|
|
T41 |
219 |
|
T43 |
711 |
|
T102 |
676 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53650 |
1 |
|
|
T41 |
66 |
|
T43 |
1709 |
|
T102 |
403 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44554 |
1 |
|
|
T41 |
777 |
|
T43 |
693 |
|
T102 |
1420 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T41 |
5 |
|
T43 |
33 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T41 |
5 |
|
T43 |
29 |
|
T102 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T41 |
5 |
|
T43 |
29 |
|
T102 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T41 |
3 |
|
T43 |
27 |
|
T102 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T41 |
3 |
|
T43 |
26 |
|
T102 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T41 |
5 |
|
T43 |
25 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
1 |
|
T43 |
20 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
16 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57346 |
1 |
|
|
T41 |
833 |
|
T43 |
1850 |
|
T102 |
499 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38627 |
1 |
|
|
T41 |
85 |
|
T43 |
882 |
|
T102 |
362 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53892 |
1 |
|
|
T41 |
121 |
|
T43 |
1114 |
|
T102 |
1713 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44934 |
1 |
|
|
T41 |
220 |
|
T43 |
1073 |
|
T102 |
487 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T41 |
6 |
|
T43 |
48 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T41 |
8 |
|
T43 |
50 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T41 |
8 |
|
T43 |
49 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T41 |
8 |
|
T43 |
46 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T41 |
5 |
|
T43 |
45 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T41 |
8 |
|
T43 |
46 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T41 |
5 |
|
T43 |
45 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T41 |
8 |
|
T43 |
44 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T41 |
4 |
|
T43 |
43 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T41 |
8 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T41 |
8 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T41 |
4 |
|
T43 |
41 |
|
T102 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T41 |
8 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T41 |
4 |
|
T43 |
41 |
|
T102 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T41 |
3 |
|
T43 |
38 |
|
T102 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T41 |
8 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T41 |
2 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T41 |
8 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1105 |
1 |
|
|
T41 |
2 |
|
T43 |
34 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1074 |
1 |
|
|
T41 |
2 |
|
T43 |
32 |
|
T102 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
1 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
16 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54659 |
1 |
|
|
T41 |
206 |
|
T43 |
1086 |
|
T102 |
661 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41288 |
1 |
|
|
T41 |
735 |
|
T43 |
1011 |
|
T102 |
1392 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57884 |
1 |
|
|
T41 |
237 |
|
T43 |
797 |
|
T102 |
796 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41240 |
1 |
|
|
T41 |
73 |
|
T43 |
1959 |
|
T102 |
340 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T41 |
4 |
|
T43 |
50 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T41 |
2 |
|
T43 |
52 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T41 |
4 |
|
T43 |
49 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T41 |
2 |
|
T43 |
51 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T41 |
4 |
|
T43 |
47 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T41 |
2 |
|
T43 |
51 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T41 |
4 |
|
T43 |
47 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T41 |
1 |
|
T43 |
50 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T41 |
4 |
|
T43 |
47 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T41 |
1 |
|
T43 |
49 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T41 |
4 |
|
T43 |
43 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T41 |
1 |
|
T43 |
48 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T41 |
1 |
|
T43 |
47 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
7 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T41 |
1 |
|
T43 |
46 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T41 |
3 |
|
T43 |
39 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T41 |
1 |
|
T43 |
46 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T41 |
1 |
|
T43 |
45 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T41 |
1 |
|
T43 |
43 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T41 |
1 |
|
T43 |
43 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T41 |
1 |
|
T43 |
41 |
|
T102 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T41 |
1 |
|
T43 |
40 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
5 |
|
T43 |
14 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T41 |
6 |
|
T43 |
12 |
|
T102 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T41 |
1 |
|
T43 |
40 |
|
T102 |
9 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54121 |
1 |
|
|
T41 |
795 |
|
T43 |
1291 |
|
T102 |
789 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38123 |
1 |
|
|
T41 |
202 |
|
T43 |
970 |
|
T102 |
576 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56478 |
1 |
|
|
T41 |
158 |
|
T43 |
1851 |
|
T102 |
458 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46745 |
1 |
|
|
T41 |
98 |
|
T43 |
872 |
|
T102 |
1243 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
15 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49307 |
1 |
|
|
T41 |
153 |
|
T43 |
1305 |
|
T102 |
582 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41093 |
1 |
|
|
T41 |
158 |
|
T43 |
982 |
|
T102 |
514 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55616 |
1 |
|
|
T41 |
834 |
|
T43 |
1097 |
|
T102 |
561 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48608 |
1 |
|
|
T41 |
70 |
|
T43 |
1584 |
|
T102 |
1366 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T41 |
7 |
|
T43 |
39 |
|
T102 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T41 |
7 |
|
T43 |
43 |
|
T102 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T41 |
7 |
|
T43 |
41 |
|
T102 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T41 |
7 |
|
T43 |
41 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T41 |
7 |
|
T43 |
41 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T41 |
6 |
|
T43 |
41 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
4 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T41 |
3 |
|
T43 |
32 |
|
T102 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T41 |
7 |
|
T43 |
33 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T41 |
3 |
|
T43 |
29 |
|
T102 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T41 |
7 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T41 |
3 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T41 |
3 |
|
T43 |
27 |
|
T102 |
18 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52031 |
1 |
|
|
T41 |
792 |
|
T43 |
1223 |
|
T102 |
387 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42999 |
1 |
|
|
T41 |
132 |
|
T43 |
1828 |
|
T102 |
388 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51633 |
1 |
|
|
T41 |
132 |
|
T43 |
1276 |
|
T102 |
1518 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46229 |
1 |
|
|
T41 |
110 |
|
T43 |
681 |
|
T102 |
552 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T41 |
10 |
|
T43 |
43 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T41 |
10 |
|
T43 |
42 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T41 |
10 |
|
T43 |
42 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T41 |
10 |
|
T43 |
40 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T41 |
8 |
|
T43 |
41 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T41 |
10 |
|
T43 |
37 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T41 |
8 |
|
T43 |
40 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T41 |
10 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T41 |
8 |
|
T43 |
39 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T41 |
11 |
|
T43 |
34 |
|
T102 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T41 |
10 |
|
T43 |
34 |
|
T102 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T41 |
10 |
|
T43 |
33 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T41 |
8 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T41 |
9 |
|
T43 |
32 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T41 |
8 |
|
T43 |
37 |
|
T102 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T41 |
7 |
|
T43 |
32 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T41 |
7 |
|
T43 |
30 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T41 |
7 |
|
T43 |
29 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T41 |
8 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T41 |
7 |
|
T43 |
29 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T41 |
8 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T41 |
8 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
18 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54060 |
1 |
|
|
T41 |
86 |
|
T43 |
1333 |
|
T102 |
512 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41506 |
1 |
|
|
T41 |
113 |
|
T43 |
1714 |
|
T102 |
339 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56082 |
1 |
|
|
T41 |
754 |
|
T43 |
1014 |
|
T102 |
1708 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44293 |
1 |
|
|
T41 |
248 |
|
T43 |
851 |
|
T102 |
478 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T41 |
8 |
|
T43 |
45 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T41 |
7 |
|
T43 |
44 |
|
T102 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T41 |
8 |
|
T43 |
44 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T41 |
8 |
|
T43 |
43 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T41 |
7 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T41 |
7 |
|
T43 |
41 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T41 |
8 |
|
T43 |
39 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T41 |
8 |
|
T43 |
39 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T41 |
8 |
|
T43 |
38 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T41 |
8 |
|
T43 |
35 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T41 |
8 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T41 |
8 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1092 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T41 |
8 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T41 |
8 |
|
T43 |
30 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1045 |
1 |
|
|
T41 |
6 |
|
T43 |
35 |
|
T102 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T41 |
8 |
|
T43 |
27 |
|
T102 |
18 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55458 |
1 |
|
|
T41 |
230 |
|
T43 |
1442 |
|
T102 |
682 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45596 |
1 |
|
|
T41 |
164 |
|
T43 |
753 |
|
T102 |
184 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50723 |
1 |
|
|
T41 |
30 |
|
T43 |
1246 |
|
T102 |
1780 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43498 |
1 |
|
|
T41 |
794 |
|
T43 |
1606 |
|
T102 |
431 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T41 |
9 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T41 |
9 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T41 |
9 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T41 |
9 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T41 |
9 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T41 |
7 |
|
T43 |
35 |
|
T102 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T41 |
9 |
|
T43 |
33 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T41 |
9 |
|
T43 |
33 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T41 |
6 |
|
T43 |
32 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T41 |
5 |
|
T43 |
32 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T41 |
5 |
|
T43 |
29 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T41 |
6 |
|
T43 |
27 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
14 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53973 |
1 |
|
|
T41 |
878 |
|
T43 |
1180 |
|
T102 |
813 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45793 |
1 |
|
|
T41 |
143 |
|
T43 |
1511 |
|
T102 |
286 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53189 |
1 |
|
|
T41 |
173 |
|
T43 |
1152 |
|
T102 |
1760 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41967 |
1 |
|
|
T41 |
47 |
|
T43 |
1045 |
|
T102 |
219 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T41 |
7 |
|
T43 |
41 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T41 |
7 |
|
T43 |
46 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T41 |
7 |
|
T43 |
45 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T41 |
7 |
|
T43 |
44 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T41 |
7 |
|
T43 |
40 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T41 |
7 |
|
T43 |
39 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T41 |
7 |
|
T43 |
39 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T41 |
7 |
|
T43 |
33 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T41 |
2 |
|
T43 |
39 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T41 |
7 |
|
T43 |
32 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T41 |
2 |
|
T43 |
39 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T41 |
7 |
|
T43 |
29 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T41 |
7 |
|
T43 |
28 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T41 |
7 |
|
T43 |
26 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
2 |
|
T43 |
14 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T41 |
2 |
|
T43 |
38 |
|
T102 |
11 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53324 |
1 |
|
|
T41 |
251 |
|
T43 |
1284 |
|
T102 |
336 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42072 |
1 |
|
|
T41 |
112 |
|
T43 |
853 |
|
T102 |
453 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60801 |
1 |
|
|
T41 |
783 |
|
T43 |
2095 |
|
T102 |
1419 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40363 |
1 |
|
|
T41 |
84 |
|
T43 |
741 |
|
T102 |
720 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T41 |
5 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T41 |
5 |
|
T43 |
32 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T41 |
5 |
|
T43 |
32 |
|
T102 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T41 |
5 |
|
T43 |
32 |
|
T102 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T41 |
5 |
|
T43 |
31 |
|
T102 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T41 |
5 |
|
T43 |
29 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T41 |
4 |
|
T43 |
30 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1108 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1088 |
1 |
|
|
T41 |
3 |
|
T43 |
26 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
24 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52115 |
1 |
|
|
T41 |
788 |
|
T43 |
1455 |
|
T102 |
604 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39935 |
1 |
|
|
T41 |
92 |
|
T43 |
1409 |
|
T102 |
333 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63183 |
1 |
|
|
T41 |
254 |
|
T43 |
1583 |
|
T102 |
1639 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41019 |
1 |
|
|
T41 |
126 |
|
T43 |
625 |
|
T102 |
537 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T41 |
6 |
|
T43 |
27 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T41 |
6 |
|
T43 |
27 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
3 |
|
T43 |
25 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T41 |
6 |
|
T43 |
27 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T41 |
6 |
|
T43 |
27 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1110 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
24 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1084 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
14 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55532 |
1 |
|
|
T41 |
296 |
|
T43 |
2131 |
|
T102 |
560 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44741 |
1 |
|
|
T41 |
826 |
|
T43 |
848 |
|
T102 |
499 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55732 |
1 |
|
|
T41 |
199 |
|
T43 |
1346 |
|
T102 |
589 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39559 |
1 |
|
|
T41 |
10 |
|
T43 |
698 |
|
T102 |
1424 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T41 |
3 |
|
T43 |
32 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T41 |
2 |
|
T43 |
20 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T41 |
2 |
|
T43 |
31 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T41 |
2 |
|
T43 |
30 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T41 |
2 |
|
T43 |
30 |
|
T102 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T41 |
1 |
|
T43 |
28 |
|
T102 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T43 |
28 |
|
T102 |
15 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T43 |
27 |
|
T102 |
15 |
|
T103 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T43 |
26 |
|
T102 |
15 |
|
T103 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T41 |
2 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1051 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1046 |
1 |
|
|
T43 |
25 |
|
T102 |
15 |
|
T103 |
16 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54105 |
1 |
|
|
T41 |
197 |
|
T43 |
930 |
|
T102 |
540 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42368 |
1 |
|
|
T41 |
53 |
|
T43 |
1852 |
|
T102 |
448 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56043 |
1 |
|
|
T41 |
839 |
|
T43 |
1188 |
|
T102 |
1364 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41353 |
1 |
|
|
T41 |
177 |
|
T43 |
1013 |
|
T102 |
550 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T41 |
4 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T41 |
5 |
|
T43 |
44 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T41 |
4 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T41 |
5 |
|
T43 |
43 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T41 |
4 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T41 |
4 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T41 |
5 |
|
T43 |
44 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T41 |
4 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T41 |
3 |
|
T43 |
37 |
|
T102 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T41 |
4 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T41 |
3 |
|
T43 |
36 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T41 |
4 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T41 |
3 |
|
T43 |
35 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T41 |
3 |
|
T43 |
12 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
15 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60227 |
1 |
|
|
T41 |
143 |
|
T43 |
2383 |
|
T102 |
617 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42175 |
1 |
|
|
T41 |
85 |
|
T43 |
477 |
|
T102 |
326 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52252 |
1 |
|
|
T41 |
153 |
|
T43 |
1216 |
|
T102 |
689 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41272 |
1 |
|
|
T41 |
856 |
|
T43 |
951 |
|
T102 |
1393 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T41 |
4 |
|
T43 |
20 |
|
T102 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T41 |
4 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T41 |
6 |
|
T43 |
34 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T41 |
6 |
|
T43 |
33 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T41 |
6 |
|
T43 |
31 |
|
T102 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
4 |
|
T43 |
27 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
3 |
|
T43 |
21 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1093 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
15 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50922 |
1 |
|
|
T41 |
63 |
|
T43 |
1591 |
|
T102 |
373 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46794 |
1 |
|
|
T41 |
881 |
|
T43 |
790 |
|
T102 |
569 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51809 |
1 |
|
|
T41 |
46 |
|
T43 |
2012 |
|
T102 |
470 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45592 |
1 |
|
|
T41 |
205 |
|
T43 |
686 |
|
T102 |
1470 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T41 |
12 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T41 |
12 |
|
T43 |
35 |
|
T102 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T41 |
11 |
|
T43 |
31 |
|
T102 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T41 |
12 |
|
T43 |
34 |
|
T102 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T41 |
10 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T41 |
12 |
|
T43 |
34 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T41 |
9 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T41 |
12 |
|
T43 |
34 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T41 |
8 |
|
T43 |
31 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T41 |
12 |
|
T43 |
32 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T41 |
8 |
|
T43 |
30 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T41 |
12 |
|
T43 |
32 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T41 |
12 |
|
T43 |
32 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T41 |
1 |
|
T43 |
22 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T41 |
1 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T41 |
12 |
|
T43 |
30 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T41 |
10 |
|
T43 |
30 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T41 |
10 |
|
T43 |
29 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T41 |
6 |
|
T43 |
26 |
|
T102 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T41 |
10 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T41 |
6 |
|
T43 |
25 |
|
T102 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T41 |
10 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T41 |
6 |
|
T43 |
25 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T41 |
10 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T41 |
10 |
|
T43 |
28 |
|
T102 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
1 |
|
T43 |
21 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T41 |
5 |
|
T43 |
23 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T43 |
18 |
|
T102 |
10 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T41 |
10 |
|
T43 |
25 |
|
T102 |
17 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49437 |
1 |
|
|
T41 |
273 |
|
T43 |
2176 |
|
T102 |
673 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49686 |
1 |
|
|
T41 |
75 |
|
T43 |
916 |
|
T102 |
456 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51803 |
1 |
|
|
T41 |
117 |
|
T43 |
1018 |
|
T102 |
316 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44168 |
1 |
|
|
T41 |
803 |
|
T43 |
782 |
|
T102 |
1462 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T41 |
5 |
|
T43 |
44 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T41 |
4 |
|
T43 |
41 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T41 |
4 |
|
T43 |
41 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T41 |
4 |
|
T43 |
41 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T41 |
6 |
|
T43 |
41 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T41 |
4 |
|
T43 |
37 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
20 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T41 |
6 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T41 |
4 |
|
T43 |
36 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T41 |
3 |
|
T43 |
30 |
|
T102 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
19 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55804 |
1 |
|
|
T41 |
157 |
|
T43 |
1049 |
|
T102 |
455 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44857 |
1 |
|
|
T41 |
777 |
|
T43 |
1202 |
|
T102 |
1371 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53011 |
1 |
|
|
T41 |
237 |
|
T43 |
1662 |
|
T102 |
477 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41178 |
1 |
|
|
T41 |
84 |
|
T43 |
807 |
|
T102 |
484 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T41 |
6 |
|
T43 |
51 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T41 |
5 |
|
T43 |
51 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T41 |
5 |
|
T43 |
51 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T41 |
5 |
|
T43 |
50 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T41 |
5 |
|
T43 |
50 |
|
T102 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T41 |
6 |
|
T43 |
45 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T41 |
5 |
|
T43 |
49 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T41 |
6 |
|
T43 |
44 |
|
T102 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T41 |
4 |
|
T43 |
44 |
|
T102 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T41 |
4 |
|
T43 |
44 |
|
T102 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1113 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T41 |
3 |
|
T43 |
42 |
|
T102 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1095 |
1 |
|
|
T41 |
4 |
|
T43 |
36 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T41 |
3 |
|
T43 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1067 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
22 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55348 |
1 |
|
|
T41 |
155 |
|
T43 |
2034 |
|
T102 |
1539 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47115 |
1 |
|
|
T41 |
30 |
|
T43 |
752 |
|
T102 |
287 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49680 |
1 |
|
|
T41 |
285 |
|
T43 |
1268 |
|
T102 |
894 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42251 |
1 |
|
|
T41 |
775 |
|
T43 |
865 |
|
T102 |
382 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T41 |
6 |
|
T43 |
41 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
4 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T41 |
4 |
|
T43 |
37 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T41 |
7 |
|
T43 |
37 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T41 |
6 |
|
T43 |
37 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T41 |
4 |
|
T43 |
29 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T41 |
2 |
|
T43 |
27 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T41 |
6 |
|
T43 |
36 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T41 |
2 |
|
T43 |
23 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
15 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54678 |
1 |
|
|
T41 |
91 |
|
T43 |
1000 |
|
T102 |
828 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40909 |
1 |
|
|
T41 |
938 |
|
T43 |
1997 |
|
T102 |
1438 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60247 |
1 |
|
|
T41 |
48 |
|
T43 |
871 |
|
T102 |
478 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40087 |
1 |
|
|
T41 |
100 |
|
T43 |
918 |
|
T102 |
345 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T41 |
10 |
|
T43 |
53 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T41 |
9 |
|
T43 |
59 |
|
T102 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T41 |
10 |
|
T43 |
52 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T41 |
9 |
|
T43 |
55 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T41 |
10 |
|
T43 |
52 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T41 |
9 |
|
T43 |
52 |
|
T102 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T41 |
10 |
|
T43 |
51 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T41 |
9 |
|
T43 |
51 |
|
T102 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T41 |
10 |
|
T43 |
48 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T41 |
9 |
|
T43 |
49 |
|
T102 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T41 |
10 |
|
T43 |
48 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T41 |
8 |
|
T43 |
47 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T41 |
10 |
|
T43 |
48 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T41 |
8 |
|
T43 |
45 |
|
T102 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T41 |
10 |
|
T43 |
48 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T41 |
3 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T41 |
7 |
|
T43 |
45 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T41 |
10 |
|
T43 |
47 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T41 |
7 |
|
T43 |
45 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T41 |
10 |
|
T43 |
47 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T41 |
6 |
|
T43 |
44 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T41 |
9 |
|
T43 |
43 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T41 |
6 |
|
T43 |
43 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T41 |
9 |
|
T43 |
43 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T41 |
9 |
|
T43 |
42 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T41 |
9 |
|
T43 |
41 |
|
T102 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T41 |
9 |
|
T43 |
41 |
|
T102 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T41 |
2 |
|
T43 |
9 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T41 |
4 |
|
T43 |
37 |
|
T102 |
11 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52722 |
1 |
|
|
T41 |
832 |
|
T43 |
1436 |
|
T102 |
542 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43772 |
1 |
|
|
T41 |
118 |
|
T43 |
843 |
|
T102 |
477 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57338 |
1 |
|
|
T41 |
153 |
|
T43 |
1747 |
|
T102 |
1579 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41341 |
1 |
|
|
T41 |
167 |
|
T43 |
1034 |
|
T102 |
413 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T41 |
7 |
|
T43 |
38 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T41 |
4 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T41 |
4 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T41 |
4 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T41 |
7 |
|
T43 |
36 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T41 |
4 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T41 |
7 |
|
T43 |
34 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T41 |
7 |
|
T43 |
33 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T41 |
1 |
|
T43 |
17 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T41 |
7 |
|
T43 |
31 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T41 |
7 |
|
T43 |
30 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T41 |
4 |
|
T43 |
34 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T41 |
7 |
|
T43 |
29 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T41 |
6 |
|
T43 |
25 |
|
T102 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T41 |
3 |
|
T43 |
34 |
|
T102 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1127 |
1 |
|
|
T41 |
6 |
|
T43 |
25 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T41 |
3 |
|
T43 |
33 |
|
T102 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
1 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T41 |
6 |
|
T43 |
25 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T41 |
3 |
|
T43 |
16 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T41 |
3 |
|
T43 |
32 |
|
T102 |
13 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48335 |
1 |
|
|
T41 |
51 |
|
T43 |
1315 |
|
T102 |
1689 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47072 |
1 |
|
|
T41 |
156 |
|
T43 |
870 |
|
T102 |
298 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53588 |
1 |
|
|
T41 |
833 |
|
T43 |
1882 |
|
T102 |
1002 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45454 |
1 |
|
|
T41 |
165 |
|
T43 |
831 |
|
T102 |
280 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T41 |
9 |
|
T43 |
45 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T41 |
8 |
|
T43 |
45 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T41 |
9 |
|
T43 |
42 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T41 |
7 |
|
T43 |
44 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T41 |
9 |
|
T43 |
42 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T41 |
7 |
|
T43 |
44 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T41 |
8 |
|
T43 |
40 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
4 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T41 |
7 |
|
T43 |
42 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T41 |
8 |
|
T43 |
40 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T41 |
8 |
|
T43 |
42 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T41 |
8 |
|
T43 |
39 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T41 |
8 |
|
T43 |
39 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T41 |
6 |
|
T43 |
42 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T41 |
2 |
|
T43 |
17 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T41 |
6 |
|
T43 |
41 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T41 |
8 |
|
T43 |
36 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T41 |
8 |
|
T43 |
34 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T41 |
6 |
|
T43 |
40 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T41 |
8 |
|
T43 |
33 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T41 |
6 |
|
T43 |
39 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T41 |
7 |
|
T43 |
32 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T41 |
5 |
|
T43 |
39 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T41 |
7 |
|
T43 |
32 |
|
T102 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T41 |
5 |
|
T43 |
36 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T41 |
5 |
|
T43 |
35 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T41 |
2 |
|
T43 |
16 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
17 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T41 |
5 |
|
T43 |
34 |
|
T102 |
10 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52325 |
1 |
|
|
T41 |
991 |
|
T43 |
2018 |
|
T102 |
448 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44717 |
1 |
|
|
T41 |
102 |
|
T43 |
1038 |
|
T102 |
567 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52789 |
1 |
|
|
T41 |
94 |
|
T43 |
1000 |
|
T102 |
813 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45452 |
1 |
|
|
T41 |
94 |
|
T43 |
837 |
|
T102 |
1311 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T41 |
5 |
|
T43 |
46 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T41 |
5 |
|
T43 |
44 |
|
T102 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T41 |
5 |
|
T43 |
43 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T41 |
5 |
|
T43 |
43 |
|
T102 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T41 |
5 |
|
T43 |
43 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T41 |
5 |
|
T43 |
42 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T41 |
5 |
|
T43 |
41 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T41 |
5 |
|
T43 |
40 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T41 |
5 |
|
T43 |
38 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T41 |
5 |
|
T43 |
37 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T41 |
4 |
|
T43 |
35 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T41 |
4 |
|
T43 |
33 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T41 |
3 |
|
T43 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T41 |
3 |
|
T43 |
31 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T41 |
3 |
|
T43 |
28 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T41 |
3 |
|
T43 |
28 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
18 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T41 |
4 |
|
T43 |
32 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T41 |
2 |
|
T43 |
18 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T41 |
3 |
|
T43 |
28 |
|
T102 |
11 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50844 |
1 |
|
|
T41 |
119 |
|
T43 |
1502 |
|
T102 |
1592 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39075 |
1 |
|
|
T41 |
787 |
|
T43 |
757 |
|
T102 |
580 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60158 |
1 |
|
|
T41 |
260 |
|
T43 |
2174 |
|
T102 |
377 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45195 |
1 |
|
|
T41 |
76 |
|
T43 |
647 |
|
T102 |
521 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T41 |
6 |
|
T43 |
30 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T41 |
4 |
|
T43 |
31 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T41 |
5 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T41 |
4 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T41 |
6 |
|
T43 |
29 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T41 |
6 |
|
T43 |
28 |
|
T102 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T41 |
5 |
|
T43 |
27 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T41 |
5 |
|
T43 |
27 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T41 |
3 |
|
T43 |
23 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T41 |
5 |
|
T43 |
26 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T41 |
5 |
|
T43 |
28 |
|
T102 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T41 |
4 |
|
T43 |
26 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T41 |
5 |
|
T43 |
27 |
|
T102 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T41 |
4 |
|
T43 |
25 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T41 |
5 |
|
T43 |
27 |
|
T102 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T41 |
5 |
|
T43 |
27 |
|
T102 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T41 |
5 |
|
T43 |
24 |
|
T102 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T41 |
3 |
|
T43 |
22 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T41 |
4 |
|
T43 |
24 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T41 |
4 |
|
T43 |
22 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T41 |
4 |
|
T43 |
23 |
|
T102 |
18 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55762 |
1 |
|
|
T41 |
206 |
|
T43 |
821 |
|
T102 |
1906 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40908 |
1 |
|
|
T41 |
70 |
|
T43 |
1114 |
|
T102 |
156 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51474 |
1 |
|
|
T41 |
954 |
|
T43 |
882 |
|
T102 |
541 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47732 |
1 |
|
|
T41 |
48 |
|
T43 |
2031 |
|
T102 |
449 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T41 |
4 |
|
T43 |
52 |
|
T102 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T41 |
4 |
|
T43 |
50 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T41 |
4 |
|
T43 |
51 |
|
T102 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T41 |
4 |
|
T43 |
49 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T41 |
4 |
|
T43 |
51 |
|
T102 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T41 |
4 |
|
T43 |
49 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T41 |
4 |
|
T43 |
50 |
|
T102 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T41 |
4 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T41 |
4 |
|
T43 |
49 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T41 |
4 |
|
T43 |
49 |
|
T102 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T41 |
5 |
|
T43 |
49 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T41 |
4 |
|
T43 |
44 |
|
T102 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T41 |
5 |
|
T43 |
48 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T41 |
4 |
|
T43 |
44 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T41 |
5 |
|
T43 |
47 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T41 |
4 |
|
T43 |
47 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T41 |
4 |
|
T43 |
45 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T41 |
4 |
|
T43 |
40 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T41 |
4 |
|
T43 |
43 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T41 |
3 |
|
T43 |
11 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T41 |
4 |
|
T43 |
39 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T41 |
4 |
|
T43 |
43 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
10 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T41 |
4 |
|
T43 |
42 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
10 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T41 |
4 |
|
T43 |
38 |
|
T102 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T41 |
3 |
|
T43 |
41 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T41 |
3 |
|
T43 |
10 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T41 |
4 |
|
T43 |
36 |
|
T102 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T41 |
3 |
|
T43 |
13 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T41 |
3 |
|
T43 |
40 |
|
T102 |
15 |