Unified Coverage Report :: Group Instance : masked_oe_upper_mask_data_cov_obj

Group Instance : masked_oe_upper_mask_data_cov_obj_pin15

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin15

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin15

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin15

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin2

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin2

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin2

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin3

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin3

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin3

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin3

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin4

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin4

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin4

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin4

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin5

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin5

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin5

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin5

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin6

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin6

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin6

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin6

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin7

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin7

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin7

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin7

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin8

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin8

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin8

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin8

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_oe_upper_mask_data_cov_obj_pin9

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin9

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin9

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin9

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin0

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin1

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin1

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin1

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin10

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin10

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin10

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin10

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin11

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin11

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin11

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin11

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin12

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin12

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin12

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin12

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin13

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin13

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin13

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin13

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin14

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin14

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin14

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin14

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin15

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin15

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin15

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin15

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin2

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin2

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin2

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Group Instance : masked_out_lower_mask_data_cov_obj_pin3

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin3

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin3

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_var1	2	0	2	100.00	100	1	1	2
cp_var2	2	0	2	100.00	100	1	1	2

Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin3

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_var1_var2_cross	4	0	4	100.00	100	1	1	0

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349362

T32

T47

2178

T42

auto[1]

349774

T32

T47

2116

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350596

T32

T47

2163

T42

auto[1]

348540

T32

T47

2131

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175137

T32

T47

1104

T42

auto[0]

auto[1]

174225

T32

T47

1074

T42

auto[1]

auto[0]

175459

T32

T47

1059

T42

auto[1]

174315

T47

1057

T42

T66

1120

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350285

T32

T47

2163

T42

auto[1]

348851

T32

T47

2131

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350172

T32

T47

2105

T42

auto[1]

348964

T32

T47

2189

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175714

T32

T47

1068

T42

auto[0]

auto[1]

174571

T47

1095

T42

T66

1071

auto[1]

auto[0]

174458

T32

T47

1037

T42

auto[1]

174393

T32

T47

1094

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350469

T47

2155

T42

T66

2171

auto[1]

348667

T32

T47

2139

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350234

T32

T47

2145

T42

auto[1]

348902

T32

T47

2149

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175371

T47

1066

T42

T66

1108

auto[0]

auto[1]

175098

T47

1089

T42

T66

1063

auto[1]

auto[0]

174863

T32

T47

1079

T42

auto[1]

173804

T32

T47

1060

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349009

T32

T47

2137

T42

auto[1]

350127

T32

T47

2157

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350086

T32

T47

2185

T42

auto[1]

349050

T47

2109

T42

T66

2210

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174890

T32

T47

1074

T42

auto[0]

auto[1]

174119

T47

1063

T42

T66

1117

auto[1]

auto[0]

175196

T32

T47

1111

T42

auto[1]

174931

T47

1046

T66

1093

T104

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349430

T32

T47

2234

T42

auto[1]

349706

T47

2060

T42

T66

2150

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349491

T32

T47

2144

T42

auto[1]

349645

T32

T47

2150

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174900

T32

T47

1127

T42

auto[0]

auto[1]

174530

T32

T47

1107

T42

auto[1]

auto[0]

174591

T47

1017

T42

T66

1113

auto[1]

175115

T47

1043

T42

T66

1037

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350250

T32

T47

2232

T42

auto[1]

348886

T32

T47

2062

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349089

T47

2177

T42

T66

2237

auto[1]

350047

T32

T47

2117

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174987

T47

1126

T42

T66

1117

auto[0]

auto[1]

175263

T32

T47

1106

T42

auto[1]

auto[0]

174102

T47

1051

T42

T66

1120

auto[1]

174784

T32

T47

1011

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349626

T32

T47

2125

T42

auto[1]

349510

T32

T47

2169

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349138

T32

T47

2126

T42

auto[1]

349998

T47

2168

T42

T66

2157

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174582

T32

T47

1045

T42

auto[0]

auto[1]

175044

T47

1080

T42

T66

1079

auto[1]

auto[0]

174556

T32

T47

1081

T42

auto[1]

174954

T47

1088

T66

1078

T104

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350131

T32

T47

2127

T42

auto[1]

349005

T32

T47

2167

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349708

T32

T47

2113

T42

auto[1]

349428

T32

T47

2181

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174900

T32

T47

1059

T42

auto[0]

auto[1]

175231

T32

T47

1068

T42

auto[1]

auto[0]

174808

T47

1054

T42

T66

1120

auto[1]

174197

T32

T47

1113

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349639

T32

T47

2085

T42

auto[1]

349497

T32

T47

2209

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350010

T32

T47

2131

T42

auto[1]

349126

T32

T47

2163

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174743

T32

T47

1041

T42

auto[0]

auto[1]

174896

T32

T47

1044

T66

1071

auto[1]

auto[0]

175267

T47

1090

T42

T66

1079

auto[1]

174230

T32

T47

1119

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350654

T32

T47

2086

T42

auto[1]

349151

T32

T47

2078

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349795

T32

T47

2021

T42

auto[1]

350010

T32

T47

2143

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175635

T32

T47

1039

T42

auto[0]

auto[1]

175019

T32

T47

1047

T42

auto[1]

auto[0]

174160

T32

T47

982

T42

auto[1]

174991

T32

T47

1096

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349170

T32

T47

2080

T42

auto[1]

350635

T32

T47

2084

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349861

T32

T47

2136

T42

auto[1]

349944

T32

T47

2028

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174652

T47

1059

T42

T66

1054

auto[0]

auto[1]

174518

T32

T47

1021

T42

auto[1]

auto[0]

175209

T32

T47

1077

T42

auto[1]

175426

T32

T47

1007

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349935

T32

T47

2074

T42

auto[1]

349870

T32

T47

2090

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349349

T32

T47

2088

T42

auto[1]

350456

T32

T47

2076

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175090

T32

T47

1047

T42

auto[0]

auto[1]

174845

T32

T47

1027

T42

auto[1]

auto[0]

174259

T32

T47

1041

T42

auto[1]

175611

T32

T47

1049

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350061

T32

T47

2117

T42

auto[1]

349744

T32

T47

2047

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350460

T32

T47

2118

T42

auto[1]

349345

T32

T47

2046

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175211

T32

T47

1089

T42

auto[0]

auto[1]

174850

T32

T47

1028

T42

auto[1]

auto[0]

175249

T32

T47

1029

T42

auto[1]

174495

T47

1018

T42

T66

1100

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349521

T32

T47

2070

T42

auto[1]

350284

T32

T47

2094

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350228

T32

T47

2104

T42

auto[1]

349577

T32

T47

2060

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175316

T32

T47

1030

T42

auto[0]

auto[1]

174205

T32

T47

1040

T42

auto[1]

auto[0]

174912

T32

T47

1074

T42

auto[1]

175372

T32

T47

1020

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350046

T32

T47

2085

T42

auto[1]

349759

T32

T47

2079

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349966

T32

T47

2090

T42

auto[1]

349839

T32

T47

2074

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175167

T47

1067

T42

T66

1086

auto[0]

auto[1]

174879

T32

T47

1018

T42

auto[1]

auto[0]

174799

T32

T47

1023

T42

auto[1]

174960

T32

T47

1056

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350323

T32

T47

2096

T42

auto[1]

349482

T32

T47

2068

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350152

T32

T47

2090

T42

auto[1]

349653

T32

T47

2074

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175308

T32

T47

1047

T42

auto[0]

auto[1]

175015

T32

T47

1049

T42

auto[1]

auto[0]

174844

T32

T47

1043

T42

auto[1]

174638

T32

T47

1025

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349570

T32

T47

2110

T42

auto[1]

350235

T32

T47

2054

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

350183

T32

T47

2114

T42

auto[1]

349622

T32

T47

2050

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174939

T32

T47

1084

T42

auto[0]

auto[1]

174631

T47

1026

T42

T66

1092

auto[1]

auto[0]

175244

T32

T47

1030

T42

auto[1]

174991

T32

T47

1024

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349993

T32

T47

2126

T42

auto[1]

349812

T32

T47

2038

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349796

T32

T47

2060

T42

auto[1]

350009

T32

T47

2104

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175165

T32

T47

1056

T42

auto[0]

auto[1]

174828

T32

T47

1070

T42

auto[1]

auto[0]

174631

T32

T47

1004

T42

auto[1]

175181

T32

T47

1034

T42

Summary for Variable cp_var1

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var1

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349561

T32

T47

2080

T42

auto[1]

350244

T32

T47

2084

T42

Summary for Variable cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_var2

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

349532

T32

T47

2116

T42

auto[1]

350273

T32

T47

2048

T42

Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cp_var1_var2_cross

Bins

cp_var1

cp_var2

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174598

T32

T47

1042

T42

auto[0]

auto[1]

174963

T32

T47

1038

T42

auto[1]

auto[0]

174934

T47

1074

T42

T66

1068

auto[1]

175310

T32

T47

1010

T42