Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12573808 |
1 |
|
|
T23 |
7 |
|
T20 |
1 |
|
T21 |
24 |
auto[1] |
10228259 |
1 |
|
|
T23 |
5 |
|
T20 |
1 |
|
T21 |
6 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
18697710 |
1 |
|
|
T23 |
12 |
|
T20 |
2 |
|
T21 |
30 |
auto[1] |
4104357 |
1 |
|
|
T11 |
3 |
|
T14 |
1 |
|
T15 |
1 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12554547 |
1 |
|
|
T23 |
12 |
|
T20 |
1 |
|
T21 |
30 |
auto[1] |
10247520 |
1 |
|
|
T20 |
1 |
|
T1 |
1 |
|
T11 |
5 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
3085141 |
1 |
|
|
T11 |
1 |
|
T15 |
8 |
|
T74 |
6 |
auto[1] |
auto[0] |
auto[1] |
2060880 |
1 |
|
|
T11 |
2 |
|
T14 |
1 |
|
T15 |
1 |
auto[1] |
auto[1] |
auto[0] |
3058022 |
1 |
|
|
T20 |
1 |
|
T1 |
1 |
|
T11 |
1 |
auto[1] |
auto[1] |
auto[1] |
2043477 |
1 |
|
|
T11 |
1 |
|
T2 |
1 |
|
T9 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |