Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3482325 |
1 |
|
|
T40 |
20 |
|
T41 |
40 |
|
T42 |
148 |
| auto[1] |
3041620 |
1 |
|
|
T40 |
30 |
|
T41 |
42 |
|
T42 |
194 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4101397 |
1 |
|
|
T40 |
25 |
|
T41 |
58 |
|
T42 |
157 |
| auto[1] |
2422548 |
1 |
|
|
T40 |
25 |
|
T41 |
24 |
|
T42 |
185 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2261476 |
1 |
|
|
T40 |
11 |
|
T41 |
31 |
|
T42 |
64 |
| auto[0] |
auto[1] |
1220849 |
1 |
|
|
T40 |
9 |
|
T41 |
9 |
|
T42 |
84 |
| auto[1] |
auto[0] |
1839921 |
1 |
|
|
T40 |
14 |
|
T41 |
27 |
|
T42 |
93 |
| auto[1] |
auto[1] |
1201699 |
1 |
|
|
T40 |
16 |
|
T41 |
15 |
|
T42 |
101 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3485727 |
1 |
|
|
T40 |
26 |
|
T41 |
50 |
|
T42 |
178 |
| auto[1] |
3038218 |
1 |
|
|
T40 |
24 |
|
T41 |
32 |
|
T42 |
164 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4104360 |
1 |
|
|
T40 |
27 |
|
T41 |
42 |
|
T42 |
167 |
| auto[1] |
2419585 |
1 |
|
|
T40 |
23 |
|
T41 |
40 |
|
T42 |
175 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2267813 |
1 |
|
|
T40 |
15 |
|
T41 |
26 |
|
T42 |
78 |
| auto[0] |
auto[1] |
1217914 |
1 |
|
|
T40 |
11 |
|
T41 |
24 |
|
T42 |
100 |
| auto[1] |
auto[0] |
1836547 |
1 |
|
|
T40 |
12 |
|
T41 |
16 |
|
T42 |
89 |
| auto[1] |
auto[1] |
1201671 |
1 |
|
|
T40 |
12 |
|
T41 |
16 |
|
T42 |
75 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3485951 |
1 |
|
|
T40 |
28 |
|
T41 |
42 |
|
T42 |
184 |
| auto[1] |
3037994 |
1 |
|
|
T40 |
22 |
|
T41 |
40 |
|
T42 |
158 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4110296 |
1 |
|
|
T40 |
22 |
|
T41 |
40 |
|
T42 |
159 |
| auto[1] |
2413649 |
1 |
|
|
T40 |
28 |
|
T41 |
42 |
|
T42 |
183 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2269512 |
1 |
|
|
T40 |
11 |
|
T41 |
22 |
|
T42 |
78 |
| auto[0] |
auto[1] |
1216439 |
1 |
|
|
T40 |
17 |
|
T41 |
20 |
|
T42 |
106 |
| auto[1] |
auto[0] |
1840784 |
1 |
|
|
T40 |
11 |
|
T41 |
18 |
|
T42 |
81 |
| auto[1] |
auto[1] |
1197210 |
1 |
|
|
T40 |
11 |
|
T41 |
22 |
|
T42 |
77 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3480817 |
1 |
|
|
T40 |
18 |
|
T41 |
44 |
|
T42 |
162 |
| auto[1] |
3043128 |
1 |
|
|
T40 |
32 |
|
T41 |
38 |
|
T42 |
180 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4102633 |
1 |
|
|
T40 |
20 |
|
T41 |
50 |
|
T42 |
187 |
| auto[1] |
2421312 |
1 |
|
|
T40 |
30 |
|
T41 |
32 |
|
T42 |
155 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2263016 |
1 |
|
|
T40 |
7 |
|
T41 |
27 |
|
T42 |
90 |
| auto[0] |
auto[1] |
1217801 |
1 |
|
|
T40 |
11 |
|
T41 |
17 |
|
T42 |
72 |
| auto[1] |
auto[0] |
1839617 |
1 |
|
|
T40 |
13 |
|
T41 |
23 |
|
T42 |
97 |
| auto[1] |
auto[1] |
1203511 |
1 |
|
|
T40 |
19 |
|
T41 |
15 |
|
T42 |
83 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3477932 |
1 |
|
|
T40 |
24 |
|
T41 |
34 |
|
T42 |
178 |
| auto[1] |
3046013 |
1 |
|
|
T40 |
26 |
|
T41 |
48 |
|
T42 |
164 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4105752 |
1 |
|
|
T40 |
17 |
|
T41 |
40 |
|
T42 |
174 |
| auto[1] |
2418193 |
1 |
|
|
T40 |
33 |
|
T41 |
42 |
|
T42 |
168 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2259601 |
1 |
|
|
T40 |
8 |
|
T41 |
19 |
|
T42 |
91 |
| auto[0] |
auto[1] |
1218331 |
1 |
|
|
T40 |
16 |
|
T41 |
15 |
|
T42 |
87 |
| auto[1] |
auto[0] |
1846151 |
1 |
|
|
T40 |
9 |
|
T41 |
21 |
|
T42 |
83 |
| auto[1] |
auto[1] |
1199862 |
1 |
|
|
T40 |
17 |
|
T41 |
27 |
|
T42 |
81 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3487883 |
1 |
|
|
T40 |
26 |
|
T41 |
46 |
|
T42 |
160 |
| auto[1] |
3036062 |
1 |
|
|
T40 |
24 |
|
T41 |
36 |
|
T42 |
182 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4107740 |
1 |
|
|
T40 |
21 |
|
T41 |
44 |
|
T42 |
164 |
| auto[1] |
2416205 |
1 |
|
|
T40 |
29 |
|
T41 |
38 |
|
T42 |
178 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2270581 |
1 |
|
|
T40 |
12 |
|
T41 |
24 |
|
T42 |
80 |
| auto[0] |
auto[1] |
1217302 |
1 |
|
|
T40 |
14 |
|
T41 |
22 |
|
T42 |
80 |
| auto[1] |
auto[0] |
1837159 |
1 |
|
|
T40 |
9 |
|
T41 |
20 |
|
T42 |
84 |
| auto[1] |
auto[1] |
1198903 |
1 |
|
|
T40 |
15 |
|
T41 |
16 |
|
T42 |
98 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3483809 |
1 |
|
|
T40 |
24 |
|
T41 |
40 |
|
T42 |
170 |
| auto[1] |
3040136 |
1 |
|
|
T40 |
26 |
|
T41 |
42 |
|
T42 |
172 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4108493 |
1 |
|
|
T40 |
27 |
|
T41 |
38 |
|
T42 |
177 |
| auto[1] |
2415452 |
1 |
|
|
T40 |
23 |
|
T41 |
44 |
|
T42 |
165 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2266776 |
1 |
|
|
T40 |
10 |
|
T41 |
15 |
|
T42 |
86 |
| auto[0] |
auto[1] |
1217033 |
1 |
|
|
T40 |
14 |
|
T41 |
25 |
|
T42 |
84 |
| auto[1] |
auto[0] |
1841717 |
1 |
|
|
T40 |
17 |
|
T41 |
23 |
|
T42 |
91 |
| auto[1] |
auto[1] |
1198419 |
1 |
|
|
T40 |
9 |
|
T41 |
19 |
|
T42 |
81 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3484722 |
1 |
|
|
T40 |
12 |
|
T41 |
36 |
|
T42 |
184 |
| auto[1] |
3039223 |
1 |
|
|
T40 |
38 |
|
T41 |
46 |
|
T42 |
158 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4103637 |
1 |
|
|
T40 |
26 |
|
T41 |
40 |
|
T42 |
165 |
| auto[1] |
2420308 |
1 |
|
|
T40 |
24 |
|
T41 |
42 |
|
T42 |
177 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2266298 |
1 |
|
|
T40 |
8 |
|
T41 |
13 |
|
T42 |
88 |
| auto[0] |
auto[1] |
1218424 |
1 |
|
|
T40 |
4 |
|
T41 |
23 |
|
T42 |
96 |
| auto[1] |
auto[0] |
1837339 |
1 |
|
|
T40 |
18 |
|
T41 |
27 |
|
T42 |
77 |
| auto[1] |
auto[1] |
1201884 |
1 |
|
|
T40 |
20 |
|
T41 |
19 |
|
T42 |
81 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3482563 |
1 |
|
|
T40 |
22 |
|
T41 |
42 |
|
T42 |
176 |
| auto[1] |
3041382 |
1 |
|
|
T40 |
28 |
|
T41 |
40 |
|
T42 |
166 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4120871 |
1 |
|
|
T40 |
21 |
|
T41 |
35 |
|
T42 |
172 |
| auto[1] |
2403074 |
1 |
|
|
T40 |
29 |
|
T41 |
47 |
|
T42 |
170 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2273564 |
1 |
|
|
T40 |
13 |
|
T41 |
14 |
|
T42 |
82 |
| auto[0] |
auto[1] |
1208999 |
1 |
|
|
T40 |
9 |
|
T41 |
28 |
|
T42 |
94 |
| auto[1] |
auto[0] |
1847307 |
1 |
|
|
T40 |
8 |
|
T41 |
21 |
|
T42 |
90 |
| auto[1] |
auto[1] |
1194075 |
1 |
|
|
T40 |
20 |
|
T41 |
19 |
|
T42 |
76 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3486017 |
1 |
|
|
T40 |
26 |
|
T41 |
44 |
|
T42 |
170 |
| auto[1] |
3037928 |
1 |
|
|
T40 |
24 |
|
T41 |
38 |
|
T42 |
172 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4115951 |
1 |
|
|
T40 |
22 |
|
T41 |
45 |
|
T42 |
162 |
| auto[1] |
2407994 |
1 |
|
|
T40 |
28 |
|
T41 |
37 |
|
T42 |
180 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2272653 |
1 |
|
|
T40 |
13 |
|
T41 |
26 |
|
T42 |
82 |
| auto[0] |
auto[1] |
1213364 |
1 |
|
|
T40 |
13 |
|
T41 |
18 |
|
T42 |
88 |
| auto[1] |
auto[0] |
1843298 |
1 |
|
|
T40 |
9 |
|
T41 |
19 |
|
T42 |
80 |
| auto[1] |
auto[1] |
1194630 |
1 |
|
|
T40 |
15 |
|
T41 |
19 |
|
T42 |
92 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3482987 |
1 |
|
|
T40 |
28 |
|
T41 |
42 |
|
T42 |
164 |
| auto[1] |
3040958 |
1 |
|
|
T40 |
22 |
|
T41 |
40 |
|
T42 |
178 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4111632 |
1 |
|
|
T40 |
38 |
|
T41 |
42 |
|
T42 |
187 |
| auto[1] |
2412313 |
1 |
|
|
T40 |
12 |
|
T41 |
40 |
|
T42 |
155 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2269306 |
1 |
|
|
T40 |
21 |
|
T41 |
24 |
|
T42 |
89 |
| auto[0] |
auto[1] |
1213681 |
1 |
|
|
T40 |
7 |
|
T41 |
18 |
|
T42 |
75 |
| auto[1] |
auto[0] |
1842326 |
1 |
|
|
T40 |
17 |
|
T41 |
18 |
|
T42 |
98 |
| auto[1] |
auto[1] |
1198632 |
1 |
|
|
T40 |
5 |
|
T41 |
22 |
|
T42 |
80 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3485916 |
1 |
|
|
T40 |
24 |
|
T41 |
30 |
|
T42 |
160 |
| auto[1] |
3038029 |
1 |
|
|
T40 |
26 |
|
T41 |
52 |
|
T42 |
182 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4118236 |
1 |
|
|
T40 |
29 |
|
T41 |
33 |
|
T42 |
185 |
| auto[1] |
2405709 |
1 |
|
|
T40 |
21 |
|
T41 |
49 |
|
T42 |
157 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2275878 |
1 |
|
|
T40 |
15 |
|
T41 |
12 |
|
T42 |
83 |
| auto[0] |
auto[1] |
1210038 |
1 |
|
|
T40 |
9 |
|
T41 |
18 |
|
T42 |
77 |
| auto[1] |
auto[0] |
1842358 |
1 |
|
|
T40 |
14 |
|
T41 |
21 |
|
T42 |
102 |
| auto[1] |
auto[1] |
1195671 |
1 |
|
|
T40 |
12 |
|
T41 |
31 |
|
T42 |
80 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3484184 |
1 |
|
|
T40 |
14 |
|
T41 |
42 |
|
T42 |
168 |
| auto[1] |
3039761 |
1 |
|
|
T40 |
36 |
|
T41 |
40 |
|
T42 |
174 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4103488 |
1 |
|
|
T40 |
27 |
|
T41 |
37 |
|
T42 |
160 |
| auto[1] |
2420457 |
1 |
|
|
T40 |
23 |
|
T41 |
45 |
|
T42 |
182 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2266118 |
1 |
|
|
T40 |
7 |
|
T41 |
20 |
|
T42 |
77 |
| auto[0] |
auto[1] |
1218066 |
1 |
|
|
T40 |
7 |
|
T41 |
22 |
|
T42 |
91 |
| auto[1] |
auto[0] |
1837370 |
1 |
|
|
T40 |
20 |
|
T41 |
17 |
|
T42 |
83 |
| auto[1] |
auto[1] |
1202391 |
1 |
|
|
T40 |
16 |
|
T41 |
23 |
|
T42 |
91 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3478853 |
1 |
|
|
T40 |
26 |
|
T41 |
36 |
|
T42 |
170 |
| auto[1] |
3045092 |
1 |
|
|
T40 |
24 |
|
T41 |
46 |
|
T42 |
172 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4115245 |
1 |
|
|
T40 |
22 |
|
T41 |
46 |
|
T42 |
151 |
| auto[1] |
2408700 |
1 |
|
|
T40 |
28 |
|
T41 |
36 |
|
T42 |
191 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2268381 |
1 |
|
|
T40 |
11 |
|
T41 |
22 |
|
T42 |
76 |
| auto[0] |
auto[1] |
1210472 |
1 |
|
|
T40 |
15 |
|
T41 |
14 |
|
T42 |
94 |
| auto[1] |
auto[0] |
1846864 |
1 |
|
|
T40 |
11 |
|
T41 |
24 |
|
T42 |
75 |
| auto[1] |
auto[1] |
1198228 |
1 |
|
|
T40 |
13 |
|
T41 |
22 |
|
T42 |
97 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3481419 |
1 |
|
|
T40 |
26 |
|
T41 |
36 |
|
T42 |
190 |
| auto[1] |
3042526 |
1 |
|
|
T40 |
24 |
|
T41 |
46 |
|
T42 |
152 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4115749 |
1 |
|
|
T40 |
29 |
|
T41 |
41 |
|
T42 |
149 |
| auto[1] |
2408196 |
1 |
|
|
T40 |
21 |
|
T41 |
41 |
|
T42 |
193 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2270389 |
1 |
|
|
T40 |
19 |
|
T41 |
20 |
|
T42 |
88 |
| auto[0] |
auto[1] |
1211030 |
1 |
|
|
T40 |
7 |
|
T41 |
16 |
|
T42 |
102 |
| auto[1] |
auto[0] |
1845360 |
1 |
|
|
T40 |
10 |
|
T41 |
21 |
|
T42 |
61 |
| auto[1] |
auto[1] |
1197166 |
1 |
|
|
T40 |
14 |
|
T41 |
25 |
|
T42 |
91 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3486738 |
1 |
|
|
T40 |
20 |
|
T41 |
40 |
|
T42 |
170 |
| auto[1] |
3037207 |
1 |
|
|
T40 |
30 |
|
T41 |
42 |
|
T42 |
172 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4116499 |
1 |
|
|
T40 |
29 |
|
T41 |
46 |
|
T42 |
189 |
| auto[1] |
2407446 |
1 |
|
|
T40 |
21 |
|
T41 |
36 |
|
T42 |
153 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2272865 |
1 |
|
|
T40 |
12 |
|
T41 |
21 |
|
T42 |
91 |
| auto[0] |
auto[1] |
1213873 |
1 |
|
|
T40 |
8 |
|
T41 |
19 |
|
T42 |
79 |
| auto[1] |
auto[0] |
1843634 |
1 |
|
|
T40 |
17 |
|
T41 |
25 |
|
T42 |
98 |
| auto[1] |
auto[1] |
1193573 |
1 |
|
|
T40 |
13 |
|
T41 |
17 |
|
T42 |
74 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3484493 |
1 |
|
|
T40 |
18 |
|
T41 |
46 |
|
T42 |
186 |
| auto[1] |
3039452 |
1 |
|
|
T40 |
32 |
|
T41 |
36 |
|
T42 |
156 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4118145 |
1 |
|
|
T40 |
27 |
|
T41 |
44 |
|
T42 |
166 |
| auto[1] |
2405800 |
1 |
|
|
T40 |
23 |
|
T41 |
38 |
|
T42 |
176 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2272649 |
1 |
|
|
T40 |
12 |
|
T41 |
25 |
|
T42 |
87 |
| auto[0] |
auto[1] |
1211844 |
1 |
|
|
T40 |
6 |
|
T41 |
21 |
|
T42 |
99 |
| auto[1] |
auto[0] |
1845496 |
1 |
|
|
T40 |
15 |
|
T41 |
19 |
|
T42 |
79 |
| auto[1] |
auto[1] |
1193956 |
1 |
|
|
T40 |
17 |
|
T41 |
17 |
|
T42 |
77 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3480451 |
1 |
|
|
T40 |
26 |
|
T41 |
36 |
|
T42 |
190 |
| auto[1] |
3043494 |
1 |
|
|
T40 |
24 |
|
T41 |
46 |
|
T42 |
152 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4118548 |
1 |
|
|
T40 |
27 |
|
T41 |
41 |
|
T42 |
188 |
| auto[1] |
2405397 |
1 |
|
|
T40 |
23 |
|
T41 |
41 |
|
T42 |
154 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2270345 |
1 |
|
|
T40 |
15 |
|
T41 |
22 |
|
T42 |
106 |
| auto[0] |
auto[1] |
1210106 |
1 |
|
|
T40 |
11 |
|
T41 |
14 |
|
T42 |
84 |
| auto[1] |
auto[0] |
1848203 |
1 |
|
|
T40 |
12 |
|
T41 |
19 |
|
T42 |
82 |
| auto[1] |
auto[1] |
1195291 |
1 |
|
|
T40 |
12 |
|
T41 |
27 |
|
T42 |
70 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3483372 |
1 |
|
|
T40 |
22 |
|
T41 |
28 |
|
T42 |
154 |
| auto[1] |
3040573 |
1 |
|
|
T40 |
28 |
|
T41 |
54 |
|
T42 |
188 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4116863 |
1 |
|
|
T40 |
13 |
|
T41 |
29 |
|
T42 |
179 |
| auto[1] |
2407082 |
1 |
|
|
T40 |
37 |
|
T41 |
53 |
|
T42 |
163 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2272049 |
1 |
|
|
T40 |
6 |
|
T41 |
12 |
|
T42 |
87 |
| auto[0] |
auto[1] |
1211323 |
1 |
|
|
T40 |
16 |
|
T41 |
16 |
|
T42 |
67 |
| auto[1] |
auto[0] |
1844814 |
1 |
|
|
T40 |
7 |
|
T41 |
17 |
|
T42 |
92 |
| auto[1] |
auto[1] |
1195759 |
1 |
|
|
T40 |
21 |
|
T41 |
37 |
|
T42 |
96 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3485948 |
1 |
|
|
T40 |
28 |
|
T41 |
50 |
|
T42 |
176 |
| auto[1] |
3037997 |
1 |
|
|
T40 |
22 |
|
T41 |
32 |
|
T42 |
166 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4119291 |
1 |
|
|
T40 |
28 |
|
T41 |
31 |
|
T42 |
161 |
| auto[1] |
2404654 |
1 |
|
|
T40 |
22 |
|
T41 |
51 |
|
T42 |
181 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2273817 |
1 |
|
|
T40 |
17 |
|
T41 |
17 |
|
T42 |
80 |
| auto[0] |
auto[1] |
1212131 |
1 |
|
|
T40 |
11 |
|
T41 |
33 |
|
T42 |
96 |
| auto[1] |
auto[0] |
1845474 |
1 |
|
|
T40 |
11 |
|
T41 |
14 |
|
T42 |
81 |
| auto[1] |
auto[1] |
1192523 |
1 |
|
|
T40 |
11 |
|
T41 |
18 |
|
T42 |
85 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3480993 |
1 |
|
|
T40 |
24 |
|
T41 |
42 |
|
T42 |
188 |
| auto[1] |
3042952 |
1 |
|
|
T40 |
26 |
|
T41 |
40 |
|
T42 |
154 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4117791 |
1 |
|
|
T40 |
20 |
|
T41 |
39 |
|
T42 |
180 |
| auto[1] |
2406154 |
1 |
|
|
T40 |
30 |
|
T41 |
43 |
|
T42 |
162 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2270929 |
1 |
|
|
T40 |
11 |
|
T41 |
17 |
|
T42 |
94 |
| auto[0] |
auto[1] |
1210064 |
1 |
|
|
T40 |
13 |
|
T41 |
25 |
|
T42 |
94 |
| auto[1] |
auto[0] |
1846862 |
1 |
|
|
T40 |
9 |
|
T41 |
22 |
|
T42 |
86 |
| auto[1] |
auto[1] |
1196090 |
1 |
|
|
T40 |
17 |
|
T41 |
18 |
|
T42 |
68 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3480512 |
1 |
|
|
T40 |
16 |
|
T41 |
38 |
|
T42 |
160 |
| auto[1] |
3043433 |
1 |
|
|
T40 |
34 |
|
T41 |
44 |
|
T42 |
182 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4119318 |
1 |
|
|
T40 |
22 |
|
T41 |
46 |
|
T42 |
190 |
| auto[1] |
2404627 |
1 |
|
|
T40 |
28 |
|
T41 |
36 |
|
T42 |
152 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2272490 |
1 |
|
|
T40 |
9 |
|
T41 |
21 |
|
T42 |
82 |
| auto[0] |
auto[1] |
1208022 |
1 |
|
|
T40 |
7 |
|
T41 |
17 |
|
T42 |
78 |
| auto[1] |
auto[0] |
1846828 |
1 |
|
|
T40 |
13 |
|
T41 |
25 |
|
T42 |
108 |
| auto[1] |
auto[1] |
1196605 |
1 |
|
|
T40 |
21 |
|
T41 |
19 |
|
T42 |
74 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3482541 |
1 |
|
|
T40 |
26 |
|
T41 |
48 |
|
T42 |
156 |
| auto[1] |
3041404 |
1 |
|
|
T40 |
24 |
|
T41 |
34 |
|
T42 |
186 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4118974 |
1 |
|
|
T40 |
29 |
|
T41 |
50 |
|
T42 |
177 |
| auto[1] |
2404971 |
1 |
|
|
T40 |
21 |
|
T41 |
32 |
|
T42 |
165 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2273013 |
1 |
|
|
T40 |
13 |
|
T41 |
27 |
|
T42 |
84 |
| auto[0] |
auto[1] |
1209528 |
1 |
|
|
T40 |
13 |
|
T41 |
21 |
|
T42 |
72 |
| auto[1] |
auto[0] |
1845961 |
1 |
|
|
T40 |
16 |
|
T41 |
23 |
|
T42 |
93 |
| auto[1] |
auto[1] |
1195443 |
1 |
|
|
T40 |
8 |
|
T41 |
11 |
|
T42 |
93 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3488248 |
1 |
|
|
T40 |
28 |
|
T41 |
46 |
|
T42 |
178 |
| auto[1] |
3035697 |
1 |
|
|
T40 |
22 |
|
T41 |
36 |
|
T42 |
164 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4107707 |
1 |
|
|
T40 |
23 |
|
T41 |
38 |
|
T42 |
167 |
| auto[1] |
2416238 |
1 |
|
|
T40 |
27 |
|
T41 |
44 |
|
T42 |
175 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2271760 |
1 |
|
|
T40 |
12 |
|
T41 |
22 |
|
T42 |
84 |
| auto[0] |
auto[1] |
1216488 |
1 |
|
|
T40 |
16 |
|
T41 |
24 |
|
T42 |
94 |
| auto[1] |
auto[0] |
1835947 |
1 |
|
|
T40 |
11 |
|
T41 |
16 |
|
T42 |
83 |
| auto[1] |
auto[1] |
1199750 |
1 |
|
|
T40 |
11 |
|
T41 |
20 |
|
T42 |
81 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3488893 |
1 |
|
|
T40 |
18 |
|
T41 |
36 |
|
T42 |
140 |
| auto[1] |
3035052 |
1 |
|
|
T40 |
32 |
|
T41 |
46 |
|
T42 |
202 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4118119 |
1 |
|
|
T40 |
21 |
|
T41 |
43 |
|
T42 |
177 |
| auto[1] |
2405826 |
1 |
|
|
T40 |
29 |
|
T41 |
39 |
|
T42 |
165 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2275819 |
1 |
|
|
T40 |
5 |
|
T41 |
22 |
|
T42 |
69 |
| auto[0] |
auto[1] |
1213074 |
1 |
|
|
T40 |
13 |
|
T41 |
14 |
|
T42 |
71 |
| auto[1] |
auto[0] |
1842300 |
1 |
|
|
T40 |
16 |
|
T41 |
21 |
|
T42 |
108 |
| auto[1] |
auto[1] |
1192752 |
1 |
|
|
T40 |
16 |
|
T41 |
25 |
|
T42 |
94 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3481225 |
1 |
|
|
T40 |
34 |
|
T41 |
50 |
|
T42 |
174 |
| auto[1] |
3042720 |
1 |
|
|
T40 |
16 |
|
T41 |
32 |
|
T42 |
168 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4117623 |
1 |
|
|
T40 |
33 |
|
T41 |
40 |
|
T42 |
152 |
| auto[1] |
2406322 |
1 |
|
|
T40 |
17 |
|
T41 |
42 |
|
T42 |
190 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
2270014 |
1 |
|
|
T40 |
24 |
|
T41 |
25 |
|
T42 |
74 |
| auto[0] |
auto[1] |
1211211 |
1 |
|
|
T40 |
10 |
|
T41 |
25 |
|
T42 |
100 |
| auto[1] |
auto[0] |
1847609 |
1 |
|
|
T40 |
9 |
|
T41 |
15 |
|
T42 |
78 |
| auto[1] |
auto[1] |
1195111 |
1 |
|
|
T40 |
7 |
|
T41 |
17 |
|
T42 |
90 |