Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11669876 |
1 |
|
|
T16 |
4 |
|
T1 |
12 |
|
T11 |
1 |
auto[1] |
9462762 |
1 |
|
|
T16 |
4 |
|
T2 |
11 |
|
T4 |
2 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
19915253 |
1 |
|
|
T16 |
8 |
|
T1 |
12 |
|
T11 |
1 |
auto[1] |
1217385 |
1 |
|
|
T72 |
1 |
|
T88 |
2 |
|
T92 |
7 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11713981 |
1 |
|
|
T16 |
8 |
|
T1 |
7 |
|
T11 |
1 |
auto[1] |
9418657 |
1 |
|
|
T1 |
5 |
|
T2 |
10 |
|
T5 |
1 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
4110242 |
1 |
|
|
T1 |
5 |
|
T2 |
7 |
|
T5 |
1 |
auto[1] |
auto[0] |
auto[1] |
610518 |
1 |
|
|
T92 |
4 |
|
T93 |
7 |
|
T96 |
3 |
auto[1] |
auto[1] |
auto[0] |
4091030 |
1 |
|
|
T2 |
3 |
|
T67 |
1 |
|
T19 |
2 |
auto[1] |
auto[1] |
auto[1] |
606867 |
1 |
|
|
T72 |
1 |
|
T88 |
2 |
|
T92 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |