cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61625 |
1 |
|
|
T52 |
1733 |
|
T120 |
826 |
|
T121 |
646 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48266 |
1 |
|
|
T52 |
525 |
|
T120 |
951 |
|
T121 |
1143 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59756 |
1 |
|
|
T52 |
2556 |
|
T120 |
1897 |
|
T121 |
870 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45287 |
1 |
|
|
T52 |
552 |
|
T120 |
1158 |
|
T121 |
437 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T52 |
33 |
|
T120 |
49 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T52 |
34 |
|
T120 |
49 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T52 |
32 |
|
T120 |
49 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T52 |
34 |
|
T120 |
49 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T52 |
32 |
|
T120 |
47 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T52 |
33 |
|
T120 |
48 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T52 |
32 |
|
T120 |
45 |
|
T121 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T52 |
33 |
|
T120 |
47 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T52 |
32 |
|
T120 |
44 |
|
T121 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T52 |
33 |
|
T120 |
47 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T52 |
32 |
|
T120 |
42 |
|
T121 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T52 |
32 |
|
T120 |
47 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T52 |
32 |
|
T120 |
39 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T52 |
31 |
|
T120 |
46 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T52 |
29 |
|
T120 |
37 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T52 |
30 |
|
T120 |
46 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T52 |
29 |
|
T120 |
36 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T52 |
30 |
|
T120 |
45 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T52 |
29 |
|
T120 |
36 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T52 |
29 |
|
T120 |
44 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T52 |
29 |
|
T120 |
35 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T52 |
28 |
|
T120 |
44 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T52 |
27 |
|
T120 |
35 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T52 |
27 |
|
T120 |
43 |
|
T121 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T52 |
27 |
|
T120 |
35 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T52 |
25 |
|
T120 |
41 |
|
T121 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T52 |
27 |
|
T120 |
34 |
|
T121 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T52 |
23 |
|
T120 |
40 |
|
T121 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T52 |
24 |
|
T120 |
33 |
|
T121 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
20 |
|
T120 |
14 |
|
T121 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T52 |
23 |
|
T120 |
38 |
|
T121 |
12 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60818 |
1 |
|
|
T52 |
1605 |
|
T120 |
1292 |
|
T121 |
1697 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45000 |
1 |
|
|
T52 |
606 |
|
T120 |
908 |
|
T121 |
259 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63275 |
1 |
|
|
T52 |
1349 |
|
T120 |
1168 |
|
T121 |
823 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46780 |
1 |
|
|
T52 |
1876 |
|
T120 |
1663 |
|
T121 |
201 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T52 |
32 |
|
T120 |
33 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T52 |
36 |
|
T120 |
36 |
|
T121 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T52 |
32 |
|
T120 |
33 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T52 |
36 |
|
T120 |
35 |
|
T121 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T52 |
31 |
|
T120 |
31 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T52 |
36 |
|
T120 |
35 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T52 |
31 |
|
T120 |
30 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T52 |
36 |
|
T120 |
34 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T52 |
31 |
|
T120 |
29 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T52 |
34 |
|
T120 |
31 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T52 |
30 |
|
T120 |
29 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
17 |
|
T120 |
20 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T52 |
33 |
|
T120 |
31 |
|
T121 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T52 |
30 |
|
T120 |
29 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T52 |
33 |
|
T120 |
31 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T52 |
29 |
|
T120 |
29 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T52 |
32 |
|
T120 |
28 |
|
T121 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T52 |
28 |
|
T120 |
29 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T52 |
31 |
|
T120 |
28 |
|
T121 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T52 |
26 |
|
T120 |
29 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T52 |
29 |
|
T120 |
28 |
|
T121 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T52 |
24 |
|
T120 |
28 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T52 |
29 |
|
T120 |
28 |
|
T121 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T52 |
24 |
|
T120 |
27 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T52 |
28 |
|
T120 |
27 |
|
T121 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T52 |
22 |
|
T120 |
26 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T52 |
28 |
|
T120 |
26 |
|
T121 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T52 |
28 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T52 |
19 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
17 |
|
T120 |
19 |
|
T121 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T52 |
28 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64891 |
1 |
|
|
T52 |
2453 |
|
T120 |
1930 |
|
T121 |
509 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46810 |
1 |
|
|
T52 |
924 |
|
T120 |
960 |
|
T121 |
381 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53680 |
1 |
|
|
T52 |
1218 |
|
T120 |
866 |
|
T121 |
863 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49462 |
1 |
|
|
T52 |
630 |
|
T120 |
974 |
|
T121 |
1337 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1776 |
1 |
|
|
T52 |
42 |
|
T120 |
49 |
|
T121 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T52 |
39 |
|
T120 |
49 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T52 |
42 |
|
T120 |
46 |
|
T121 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T52 |
38 |
|
T120 |
48 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T52 |
42 |
|
T120 |
45 |
|
T121 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T52 |
37 |
|
T120 |
48 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T52 |
41 |
|
T120 |
43 |
|
T121 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T52 |
37 |
|
T120 |
47 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T52 |
41 |
|
T120 |
43 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T52 |
34 |
|
T120 |
47 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T52 |
40 |
|
T120 |
43 |
|
T121 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T52 |
40 |
|
T120 |
43 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T52 |
38 |
|
T120 |
43 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T52 |
31 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T52 |
38 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T52 |
38 |
|
T120 |
41 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T52 |
38 |
|
T120 |
41 |
|
T121 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T52 |
29 |
|
T120 |
40 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T52 |
37 |
|
T120 |
41 |
|
T121 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T52 |
29 |
|
T120 |
37 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T52 |
36 |
|
T120 |
40 |
|
T121 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T52 |
29 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T52 |
36 |
|
T120 |
40 |
|
T121 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T52 |
29 |
|
T120 |
36 |
|
T121 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T52 |
35 |
|
T120 |
38 |
|
T121 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T52 |
24 |
|
T120 |
35 |
|
T121 |
15 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57220 |
1 |
|
|
T52 |
997 |
|
T120 |
1071 |
|
T121 |
1400 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53037 |
1 |
|
|
T52 |
1098 |
|
T120 |
2036 |
|
T121 |
267 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59652 |
1 |
|
|
T52 |
1867 |
|
T120 |
1161 |
|
T121 |
910 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44541 |
1 |
|
|
T52 |
1179 |
|
T120 |
684 |
|
T121 |
437 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T52 |
55 |
|
T120 |
41 |
|
T121 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T52 |
51 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T52 |
55 |
|
T120 |
41 |
|
T121 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T52 |
50 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T52 |
55 |
|
T120 |
41 |
|
T121 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T52 |
50 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T52 |
53 |
|
T120 |
41 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T52 |
47 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T52 |
49 |
|
T120 |
39 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T52 |
47 |
|
T120 |
34 |
|
T121 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T52 |
48 |
|
T120 |
39 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T52 |
45 |
|
T120 |
34 |
|
T121 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T52 |
48 |
|
T120 |
38 |
|
T121 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T52 |
45 |
|
T120 |
32 |
|
T121 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T52 |
46 |
|
T120 |
38 |
|
T121 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T52 |
44 |
|
T120 |
31 |
|
T121 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T52 |
45 |
|
T120 |
37 |
|
T121 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T52 |
45 |
|
T120 |
36 |
|
T121 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T52 |
45 |
|
T120 |
35 |
|
T121 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T52 |
44 |
|
T120 |
35 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T52 |
42 |
|
T120 |
35 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T52 |
41 |
|
T120 |
33 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
10 |
|
T120 |
16 |
|
T121 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T52 |
41 |
|
T120 |
32 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
14 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T52 |
36 |
|
T120 |
26 |
|
T121 |
15 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55051 |
1 |
|
|
T52 |
662 |
|
T120 |
1219 |
|
T121 |
1122 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55176 |
1 |
|
|
T52 |
2112 |
|
T120 |
1736 |
|
T121 |
596 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54832 |
1 |
|
|
T52 |
1080 |
|
T120 |
1291 |
|
T121 |
571 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48958 |
1 |
|
|
T52 |
1128 |
|
T120 |
664 |
|
T121 |
453 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1798 |
1 |
|
|
T52 |
58 |
|
T120 |
41 |
|
T121 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1798 |
1 |
|
|
T52 |
58 |
|
T120 |
36 |
|
T121 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T52 |
58 |
|
T120 |
41 |
|
T121 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T52 |
57 |
|
T120 |
35 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T52 |
58 |
|
T120 |
40 |
|
T121 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T52 |
56 |
|
T120 |
34 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T52 |
56 |
|
T120 |
39 |
|
T121 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T52 |
56 |
|
T120 |
34 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T52 |
55 |
|
T120 |
37 |
|
T121 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T52 |
55 |
|
T120 |
33 |
|
T121 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T52 |
55 |
|
T120 |
37 |
|
T121 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T52 |
12 |
|
T120 |
23 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T52 |
54 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T52 |
55 |
|
T120 |
35 |
|
T121 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T52 |
53 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T52 |
55 |
|
T120 |
33 |
|
T121 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T52 |
51 |
|
T120 |
32 |
|
T121 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T52 |
54 |
|
T120 |
33 |
|
T121 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T52 |
48 |
|
T120 |
32 |
|
T121 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T52 |
53 |
|
T120 |
33 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T52 |
46 |
|
T120 |
31 |
|
T121 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T52 |
52 |
|
T120 |
33 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T52 |
50 |
|
T120 |
33 |
|
T121 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T52 |
42 |
|
T120 |
31 |
|
T121 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T52 |
48 |
|
T120 |
33 |
|
T121 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T52 |
41 |
|
T120 |
31 |
|
T121 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T52 |
46 |
|
T120 |
31 |
|
T121 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T52 |
40 |
|
T120 |
30 |
|
T121 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
12 |
|
T120 |
18 |
|
T121 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T52 |
45 |
|
T120 |
30 |
|
T121 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T52 |
38 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56215 |
1 |
|
|
T52 |
778 |
|
T120 |
1245 |
|
T121 |
855 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50665 |
1 |
|
|
T52 |
926 |
|
T120 |
567 |
|
T121 |
462 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57048 |
1 |
|
|
T52 |
1304 |
|
T120 |
2736 |
|
T121 |
1307 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51900 |
1 |
|
|
T52 |
2074 |
|
T120 |
532 |
|
T121 |
268 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T52 |
46 |
|
T120 |
31 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T52 |
45 |
|
T120 |
31 |
|
T121 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T52 |
46 |
|
T120 |
31 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T52 |
44 |
|
T120 |
30 |
|
T121 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T52 |
44 |
|
T120 |
30 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T52 |
44 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T52 |
43 |
|
T120 |
30 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T52 |
43 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T52 |
42 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T52 |
43 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T52 |
41 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T52 |
40 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T52 |
41 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T52 |
40 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T52 |
40 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T52 |
40 |
|
T120 |
25 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T52 |
39 |
|
T120 |
26 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T52 |
40 |
|
T120 |
24 |
|
T121 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T52 |
37 |
|
T120 |
26 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T52 |
39 |
|
T120 |
23 |
|
T121 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T52 |
37 |
|
T120 |
26 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T52 |
38 |
|
T120 |
22 |
|
T121 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T52 |
36 |
|
T120 |
25 |
|
T121 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T52 |
37 |
|
T120 |
21 |
|
T121 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T52 |
35 |
|
T120 |
24 |
|
T121 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T52 |
36 |
|
T120 |
19 |
|
T121 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T52 |
34 |
|
T120 |
23 |
|
T121 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T52 |
36 |
|
T120 |
19 |
|
T121 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
19 |
|
T120 |
22 |
|
T121 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T52 |
34 |
|
T120 |
23 |
|
T121 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
21 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T52 |
36 |
|
T120 |
19 |
|
T121 |
13 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56281 |
1 |
|
|
T52 |
1769 |
|
T120 |
1611 |
|
T121 |
1186 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49471 |
1 |
|
|
T52 |
1608 |
|
T120 |
591 |
|
T121 |
435 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56035 |
1 |
|
|
T52 |
878 |
|
T120 |
1191 |
|
T121 |
636 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53189 |
1 |
|
|
T52 |
979 |
|
T120 |
1662 |
|
T121 |
667 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1790 |
1 |
|
|
T52 |
39 |
|
T120 |
31 |
|
T121 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T52 |
40 |
|
T120 |
27 |
|
T121 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T52 |
39 |
|
T120 |
31 |
|
T121 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T52 |
40 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T52 |
39 |
|
T120 |
30 |
|
T121 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T52 |
40 |
|
T120 |
26 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T52 |
37 |
|
T120 |
30 |
|
T121 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T52 |
39 |
|
T120 |
26 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T52 |
36 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T52 |
39 |
|
T120 |
24 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T52 |
36 |
|
T120 |
28 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T52 |
19 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T52 |
39 |
|
T120 |
23 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T52 |
35 |
|
T120 |
28 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T52 |
38 |
|
T120 |
23 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T52 |
34 |
|
T120 |
26 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T52 |
36 |
|
T120 |
22 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T52 |
34 |
|
T120 |
26 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T52 |
35 |
|
T120 |
22 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T52 |
33 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T52 |
35 |
|
T120 |
22 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T52 |
32 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T52 |
35 |
|
T120 |
21 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T52 |
31 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T52 |
35 |
|
T120 |
21 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T52 |
31 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T52 |
35 |
|
T120 |
20 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T52 |
31 |
|
T120 |
22 |
|
T121 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T52 |
35 |
|
T120 |
20 |
|
T121 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T52 |
28 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
27 |
|
T121 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T52 |
32 |
|
T120 |
20 |
|
T121 |
19 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57911 |
1 |
|
|
T52 |
2346 |
|
T120 |
840 |
|
T121 |
541 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47136 |
1 |
|
|
T52 |
817 |
|
T120 |
994 |
|
T121 |
498 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59090 |
1 |
|
|
T52 |
1373 |
|
T120 |
2096 |
|
T121 |
366 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49821 |
1 |
|
|
T52 |
706 |
|
T120 |
950 |
|
T121 |
1404 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1774 |
1 |
|
|
T52 |
38 |
|
T120 |
45 |
|
T121 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T52 |
35 |
|
T120 |
47 |
|
T121 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T52 |
38 |
|
T120 |
44 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T52 |
35 |
|
T120 |
47 |
|
T121 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T52 |
38 |
|
T120 |
44 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T52 |
35 |
|
T120 |
46 |
|
T121 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T52 |
37 |
|
T120 |
43 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T52 |
34 |
|
T120 |
46 |
|
T121 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T52 |
37 |
|
T120 |
42 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T52 |
34 |
|
T120 |
46 |
|
T121 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T52 |
37 |
|
T120 |
41 |
|
T121 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T52 |
34 |
|
T120 |
46 |
|
T121 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T52 |
37 |
|
T120 |
41 |
|
T121 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T52 |
32 |
|
T120 |
46 |
|
T121 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T52 |
32 |
|
T120 |
45 |
|
T121 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T52 |
33 |
|
T120 |
39 |
|
T121 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T52 |
30 |
|
T120 |
45 |
|
T121 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T52 |
32 |
|
T120 |
38 |
|
T121 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T52 |
30 |
|
T120 |
43 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T52 |
32 |
|
T120 |
38 |
|
T121 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T52 |
28 |
|
T120 |
41 |
|
T121 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T52 |
31 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T52 |
28 |
|
T120 |
41 |
|
T121 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T52 |
28 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T52 |
27 |
|
T120 |
39 |
|
T121 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T52 |
27 |
|
T120 |
34 |
|
T121 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T52 |
27 |
|
T120 |
33 |
|
T121 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
23 |
|
T120 |
13 |
|
T121 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
25 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55057 |
1 |
|
|
T52 |
2043 |
|
T120 |
1056 |
|
T121 |
987 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50520 |
1 |
|
|
T52 |
740 |
|
T120 |
1977 |
|
T121 |
213 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61568 |
1 |
|
|
T52 |
1508 |
|
T120 |
1059 |
|
T121 |
1605 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47620 |
1 |
|
|
T52 |
976 |
|
T120 |
727 |
|
T121 |
250 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1793 |
1 |
|
|
T52 |
37 |
|
T120 |
47 |
|
T121 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T52 |
39 |
|
T120 |
45 |
|
T121 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T52 |
35 |
|
T120 |
46 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T52 |
39 |
|
T120 |
45 |
|
T121 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T52 |
35 |
|
T120 |
46 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T52 |
38 |
|
T120 |
44 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T52 |
35 |
|
T120 |
46 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T52 |
38 |
|
T120 |
44 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T52 |
37 |
|
T120 |
44 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T52 |
37 |
|
T120 |
43 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T52 |
33 |
|
T120 |
42 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T52 |
36 |
|
T120 |
41 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T52 |
32 |
|
T120 |
42 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T52 |
36 |
|
T120 |
40 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T52 |
31 |
|
T120 |
42 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
36 |
|
T120 |
39 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T52 |
29 |
|
T120 |
42 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T52 |
36 |
|
T120 |
37 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T52 |
29 |
|
T120 |
42 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T52 |
35 |
|
T120 |
37 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T52 |
29 |
|
T120 |
39 |
|
T121 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T52 |
35 |
|
T120 |
36 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T52 |
27 |
|
T120 |
39 |
|
T121 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T52 |
34 |
|
T120 |
36 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T52 |
34 |
|
T120 |
36 |
|
T121 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T52 |
24 |
|
T120 |
35 |
|
T121 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T52 |
32 |
|
T120 |
31 |
|
T121 |
8 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64294 |
1 |
|
|
T52 |
1004 |
|
T120 |
1402 |
|
T121 |
789 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41556 |
1 |
|
|
T52 |
837 |
|
T120 |
658 |
|
T121 |
1250 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62495 |
1 |
|
|
T52 |
1320 |
|
T120 |
2429 |
|
T121 |
536 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47533 |
1 |
|
|
T52 |
2066 |
|
T120 |
568 |
|
T121 |
422 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T52 |
39 |
|
T120 |
28 |
|
T121 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T52 |
37 |
|
T120 |
26 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T52 |
35 |
|
T120 |
26 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T52 |
37 |
|
T120 |
27 |
|
T121 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T52 |
33 |
|
T120 |
26 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T52 |
36 |
|
T120 |
27 |
|
T121 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T52 |
33 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T52 |
36 |
|
T120 |
27 |
|
T121 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T52 |
33 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
36 |
|
T120 |
27 |
|
T121 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T52 |
32 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T52 |
35 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T52 |
32 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T52 |
35 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T52 |
31 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T52 |
35 |
|
T120 |
24 |
|
T121 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T52 |
31 |
|
T120 |
22 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T52 |
34 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T52 |
31 |
|
T120 |
21 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T52 |
34 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T52 |
30 |
|
T120 |
21 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T52 |
34 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T52 |
29 |
|
T120 |
21 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T52 |
34 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T52 |
27 |
|
T120 |
21 |
|
T121 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T52 |
31 |
|
T120 |
20 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
25 |
|
T121 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T52 |
27 |
|
T120 |
21 |
|
T121 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
22 |
|
T120 |
25 |
|
T121 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T52 |
31 |
|
T120 |
20 |
|
T121 |
11 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64083 |
1 |
|
|
T52 |
973 |
|
T120 |
1005 |
|
T121 |
490 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46742 |
1 |
|
|
T52 |
1035 |
|
T120 |
829 |
|
T121 |
611 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57331 |
1 |
|
|
T52 |
1890 |
|
T120 |
1132 |
|
T121 |
721 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46652 |
1 |
|
|
T52 |
1248 |
|
T120 |
1883 |
|
T121 |
1280 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1770 |
1 |
|
|
T52 |
51 |
|
T120 |
48 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1783 |
1 |
|
|
T52 |
54 |
|
T120 |
46 |
|
T121 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T52 |
49 |
|
T120 |
47 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T52 |
54 |
|
T120 |
45 |
|
T121 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T52 |
48 |
|
T120 |
47 |
|
T121 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T52 |
54 |
|
T120 |
45 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T52 |
45 |
|
T120 |
44 |
|
T121 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T52 |
54 |
|
T120 |
44 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T52 |
45 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T52 |
54 |
|
T120 |
43 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T52 |
43 |
|
T120 |
39 |
|
T121 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
10 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T52 |
53 |
|
T120 |
42 |
|
T121 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T52 |
42 |
|
T120 |
37 |
|
T121 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T52 |
52 |
|
T120 |
42 |
|
T121 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T52 |
42 |
|
T120 |
37 |
|
T121 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T52 |
51 |
|
T120 |
41 |
|
T121 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T52 |
41 |
|
T120 |
36 |
|
T121 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
51 |
|
T120 |
40 |
|
T121 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T52 |
41 |
|
T120 |
36 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T52 |
50 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T52 |
41 |
|
T120 |
34 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T52 |
50 |
|
T120 |
37 |
|
T121 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T52 |
41 |
|
T120 |
34 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T52 |
49 |
|
T120 |
37 |
|
T121 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T52 |
40 |
|
T120 |
33 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T52 |
47 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T52 |
39 |
|
T120 |
33 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T52 |
46 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
12 |
|
T120 |
15 |
|
T121 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T52 |
38 |
|
T120 |
32 |
|
T121 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T52 |
9 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
16 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58458 |
1 |
|
|
T52 |
1612 |
|
T120 |
1023 |
|
T121 |
883 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51994 |
1 |
|
|
T52 |
1701 |
|
T120 |
1736 |
|
T121 |
1090 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55887 |
1 |
|
|
T52 |
1317 |
|
T120 |
1234 |
|
T121 |
757 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46909 |
1 |
|
|
T52 |
849 |
|
T120 |
904 |
|
T121 |
256 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1840 |
1 |
|
|
T52 |
33 |
|
T120 |
38 |
|
T121 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1848 |
1 |
|
|
T52 |
33 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T52 |
31 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T52 |
32 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T52 |
32 |
|
T120 |
37 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T52 |
30 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T52 |
32 |
|
T120 |
37 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T52 |
30 |
|
T120 |
33 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T52 |
31 |
|
T120 |
36 |
|
T121 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T52 |
29 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T52 |
26 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T52 |
28 |
|
T120 |
34 |
|
T121 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T52 |
24 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T52 |
28 |
|
T120 |
33 |
|
T121 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T52 |
23 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T52 |
27 |
|
T120 |
33 |
|
T121 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T52 |
22 |
|
T120 |
31 |
|
T121 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
26 |
|
T120 |
31 |
|
T121 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T52 |
21 |
|
T120 |
29 |
|
T121 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T52 |
26 |
|
T120 |
31 |
|
T121 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T52 |
20 |
|
T120 |
28 |
|
T121 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T52 |
26 |
|
T120 |
31 |
|
T121 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T52 |
20 |
|
T120 |
28 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T52 |
26 |
|
T120 |
30 |
|
T121 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T52 |
20 |
|
T120 |
28 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T52 |
26 |
|
T120 |
30 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T52 |
20 |
|
T120 |
28 |
|
T121 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T52 |
26 |
|
T120 |
29 |
|
T121 |
9 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62408 |
1 |
|
|
T52 |
1121 |
|
T120 |
2059 |
|
T121 |
1410 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42068 |
1 |
|
|
T52 |
1039 |
|
T120 |
727 |
|
T121 |
228 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63535 |
1 |
|
|
T52 |
2118 |
|
T120 |
1232 |
|
T121 |
777 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47761 |
1 |
|
|
T52 |
994 |
|
T120 |
984 |
|
T121 |
471 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T52 |
45 |
|
T120 |
40 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T52 |
45 |
|
T120 |
40 |
|
T121 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T52 |
44 |
|
T120 |
40 |
|
T121 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T52 |
41 |
|
T120 |
31 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T52 |
42 |
|
T120 |
39 |
|
T121 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T52 |
41 |
|
T120 |
30 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T52 |
39 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T52 |
39 |
|
T120 |
37 |
|
T121 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
17 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T52 |
38 |
|
T120 |
34 |
|
T121 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T52 |
36 |
|
T120 |
34 |
|
T121 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T52 |
40 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T52 |
36 |
|
T120 |
33 |
|
T121 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T52 |
39 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T52 |
36 |
|
T120 |
33 |
|
T121 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T52 |
38 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T52 |
34 |
|
T120 |
33 |
|
T121 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T52 |
38 |
|
T120 |
26 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T52 |
34 |
|
T120 |
32 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T52 |
36 |
|
T120 |
25 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T52 |
33 |
|
T120 |
32 |
|
T121 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T52 |
35 |
|
T120 |
24 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T52 |
33 |
|
T120 |
28 |
|
T121 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T52 |
33 |
|
T120 |
23 |
|
T121 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
14 |
|
T120 |
16 |
|
T121 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T52 |
33 |
|
T120 |
28 |
|
T121 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
16 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T52 |
33 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58624 |
1 |
|
|
T52 |
847 |
|
T120 |
1105 |
|
T121 |
365 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46903 |
1 |
|
|
T52 |
1024 |
|
T120 |
1825 |
|
T121 |
645 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59976 |
1 |
|
|
T52 |
2056 |
|
T120 |
1316 |
|
T121 |
353 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49154 |
1 |
|
|
T52 |
1157 |
|
T120 |
880 |
|
T121 |
1348 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T52 |
54 |
|
T120 |
39 |
|
T121 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T52 |
50 |
|
T120 |
34 |
|
T121 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T52 |
52 |
|
T120 |
38 |
|
T121 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T52 |
50 |
|
T120 |
38 |
|
T121 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T52 |
50 |
|
T120 |
36 |
|
T121 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T52 |
43 |
|
T120 |
33 |
|
T121 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T52 |
49 |
|
T120 |
36 |
|
T121 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T52 |
48 |
|
T120 |
36 |
|
T121 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T52 |
42 |
|
T120 |
32 |
|
T121 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T52 |
40 |
|
T120 |
32 |
|
T121 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T52 |
39 |
|
T120 |
32 |
|
T121 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T52 |
45 |
|
T120 |
34 |
|
T121 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T52 |
39 |
|
T120 |
30 |
|
T121 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T52 |
39 |
|
T120 |
30 |
|
T121 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T52 |
41 |
|
T120 |
32 |
|
T121 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T52 |
39 |
|
T120 |
30 |
|
T121 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T52 |
40 |
|
T120 |
32 |
|
T121 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T52 |
39 |
|
T120 |
29 |
|
T121 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T52 |
40 |
|
T120 |
32 |
|
T121 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T52 |
39 |
|
T120 |
28 |
|
T121 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T52 |
39 |
|
T120 |
31 |
|
T121 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T52 |
39 |
|
T120 |
26 |
|
T121 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
14 |
|
T120 |
12 |
|
T121 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T52 |
36 |
|
T120 |
31 |
|
T121 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
19 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T52 |
37 |
|
T120 |
25 |
|
T121 |
23 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58477 |
1 |
|
|
T52 |
972 |
|
T120 |
1290 |
|
T121 |
364 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50195 |
1 |
|
|
T52 |
962 |
|
T120 |
655 |
|
T121 |
459 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57354 |
1 |
|
|
T52 |
2200 |
|
T120 |
1245 |
|
T121 |
778 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48948 |
1 |
|
|
T52 |
979 |
|
T120 |
1759 |
|
T121 |
1365 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T52 |
46 |
|
T120 |
39 |
|
T121 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T52 |
45 |
|
T120 |
42 |
|
T121 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T52 |
46 |
|
T120 |
39 |
|
T121 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T52 |
45 |
|
T120 |
39 |
|
T121 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T52 |
44 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T52 |
45 |
|
T120 |
39 |
|
T121 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T52 |
42 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T52 |
43 |
|
T120 |
37 |
|
T121 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T52 |
41 |
|
T120 |
40 |
|
T121 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T52 |
42 |
|
T120 |
36 |
|
T121 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T52 |
39 |
|
T120 |
40 |
|
T121 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T52 |
42 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T52 |
39 |
|
T120 |
38 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T52 |
42 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T52 |
39 |
|
T120 |
38 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T52 |
42 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T52 |
39 |
|
T120 |
38 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T52 |
40 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T52 |
38 |
|
T120 |
36 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T52 |
40 |
|
T120 |
33 |
|
T121 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T52 |
36 |
|
T120 |
36 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T52 |
38 |
|
T120 |
31 |
|
T121 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T52 |
36 |
|
T120 |
35 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T52 |
38 |
|
T120 |
29 |
|
T121 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T52 |
36 |
|
T120 |
35 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T52 |
37 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T52 |
34 |
|
T120 |
31 |
|
T121 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T52 |
18 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T52 |
35 |
|
T120 |
27 |
|
T121 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T52 |
31 |
|
T120 |
31 |
|
T121 |
19 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63181 |
1 |
|
|
T52 |
1030 |
|
T120 |
1045 |
|
T121 |
1310 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51226 |
1 |
|
|
T52 |
769 |
|
T120 |
688 |
|
T121 |
529 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55850 |
1 |
|
|
T52 |
1366 |
|
T120 |
1543 |
|
T121 |
634 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44067 |
1 |
|
|
T52 |
1965 |
|
T120 |
1873 |
|
T121 |
459 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1806 |
1 |
|
|
T52 |
46 |
|
T120 |
35 |
|
T121 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T52 |
45 |
|
T120 |
35 |
|
T121 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T52 |
44 |
|
T120 |
35 |
|
T121 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T52 |
44 |
|
T120 |
34 |
|
T121 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T52 |
44 |
|
T120 |
35 |
|
T121 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T52 |
43 |
|
T120 |
33 |
|
T121 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T52 |
44 |
|
T120 |
35 |
|
T121 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T52 |
42 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T52 |
43 |
|
T120 |
33 |
|
T121 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T52 |
42 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T52 |
41 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T52 |
41 |
|
T120 |
27 |
|
T121 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T52 |
43 |
|
T120 |
29 |
|
T121 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T52 |
38 |
|
T120 |
27 |
|
T121 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T52 |
36 |
|
T120 |
26 |
|
T121 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T52 |
41 |
|
T120 |
29 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T52 |
32 |
|
T120 |
25 |
|
T121 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T52 |
40 |
|
T120 |
29 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T52 |
31 |
|
T120 |
25 |
|
T121 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T52 |
39 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T52 |
31 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T52 |
38 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T52 |
26 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T52 |
38 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T52 |
24 |
|
T120 |
23 |
|
T121 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T52 |
38 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62019 |
1 |
|
|
T52 |
1701 |
|
T120 |
1499 |
|
T121 |
763 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45145 |
1 |
|
|
T52 |
933 |
|
T120 |
608 |
|
T121 |
321 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62542 |
1 |
|
|
T52 |
1251 |
|
T120 |
2177 |
|
T121 |
696 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47490 |
1 |
|
|
T52 |
1184 |
|
T120 |
798 |
|
T121 |
1151 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T52 |
52 |
|
T120 |
33 |
|
T121 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T52 |
47 |
|
T120 |
37 |
|
T121 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T52 |
50 |
|
T120 |
30 |
|
T121 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T52 |
46 |
|
T120 |
37 |
|
T121 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T52 |
49 |
|
T120 |
30 |
|
T121 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T52 |
45 |
|
T120 |
37 |
|
T121 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T52 |
48 |
|
T120 |
29 |
|
T121 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T52 |
45 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T52 |
43 |
|
T120 |
29 |
|
T121 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T52 |
44 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T52 |
43 |
|
T120 |
27 |
|
T121 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T52 |
21 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T52 |
43 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T52 |
43 |
|
T120 |
26 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T52 |
42 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T52 |
42 |
|
T120 |
25 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T52 |
40 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T52 |
42 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T52 |
39 |
|
T120 |
33 |
|
T121 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T52 |
41 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T52 |
38 |
|
T120 |
32 |
|
T121 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T52 |
41 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T52 |
37 |
|
T120 |
31 |
|
T121 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T52 |
40 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T52 |
37 |
|
T120 |
29 |
|
T121 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T52 |
40 |
|
T120 |
23 |
|
T121 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T52 |
37 |
|
T120 |
29 |
|
T121 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T52 |
39 |
|
T120 |
22 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T52 |
36 |
|
T120 |
29 |
|
T121 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T52 |
38 |
|
T120 |
20 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T52 |
36 |
|
T120 |
29 |
|
T121 |
17 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54754 |
1 |
|
|
T52 |
938 |
|
T120 |
1177 |
|
T121 |
862 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49013 |
1 |
|
|
T52 |
1188 |
|
T120 |
683 |
|
T121 |
1274 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58219 |
1 |
|
|
T52 |
876 |
|
T120 |
2460 |
|
T121 |
446 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52983 |
1 |
|
|
T52 |
1929 |
|
T120 |
683 |
|
T121 |
377 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T52 |
56 |
|
T120 |
34 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1795 |
1 |
|
|
T52 |
60 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T52 |
56 |
|
T120 |
33 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T52 |
57 |
|
T120 |
35 |
|
T121 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T52 |
55 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T52 |
57 |
|
T120 |
34 |
|
T121 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T52 |
54 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T52 |
56 |
|
T120 |
34 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T52 |
53 |
|
T120 |
31 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T52 |
52 |
|
T120 |
33 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T52 |
53 |
|
T120 |
31 |
|
T121 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T52 |
15 |
|
T120 |
20 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T52 |
50 |
|
T120 |
32 |
|
T121 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T52 |
50 |
|
T120 |
30 |
|
T121 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T52 |
48 |
|
T120 |
32 |
|
T121 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T52 |
50 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T52 |
46 |
|
T120 |
32 |
|
T121 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T52 |
50 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T52 |
44 |
|
T120 |
32 |
|
T121 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T52 |
50 |
|
T120 |
28 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T52 |
49 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T52 |
40 |
|
T120 |
31 |
|
T121 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T52 |
48 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T52 |
38 |
|
T120 |
30 |
|
T121 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T52 |
48 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T52 |
38 |
|
T120 |
30 |
|
T121 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T52 |
46 |
|
T120 |
25 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T52 |
35 |
|
T120 |
29 |
|
T121 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T52 |
18 |
|
T120 |
21 |
|
T121 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T52 |
45 |
|
T120 |
24 |
|
T121 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T52 |
14 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T52 |
34 |
|
T120 |
29 |
|
T121 |
13 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58883 |
1 |
|
|
T52 |
1408 |
|
T120 |
2171 |
|
T121 |
668 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51343 |
1 |
|
|
T52 |
964 |
|
T120 |
718 |
|
T121 |
1237 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59504 |
1 |
|
|
T52 |
2009 |
|
T120 |
1263 |
|
T121 |
566 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45997 |
1 |
|
|
T52 |
772 |
|
T120 |
764 |
|
T121 |
448 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T52 |
42 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T52 |
40 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T52 |
42 |
|
T120 |
32 |
|
T121 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T52 |
40 |
|
T120 |
33 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T52 |
42 |
|
T120 |
28 |
|
T121 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T52 |
39 |
|
T120 |
33 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T52 |
38 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T52 |
37 |
|
T120 |
33 |
|
T121 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T52 |
38 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T52 |
36 |
|
T120 |
32 |
|
T121 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T52 |
37 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T52 |
34 |
|
T120 |
32 |
|
T121 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T52 |
37 |
|
T120 |
27 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T52 |
34 |
|
T120 |
31 |
|
T121 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T52 |
35 |
|
T120 |
26 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T52 |
33 |
|
T120 |
30 |
|
T121 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T52 |
35 |
|
T120 |
26 |
|
T121 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T52 |
30 |
|
T120 |
30 |
|
T121 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T52 |
35 |
|
T120 |
25 |
|
T121 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T52 |
29 |
|
T120 |
28 |
|
T121 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T52 |
34 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T52 |
29 |
|
T120 |
27 |
|
T121 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T52 |
33 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T52 |
28 |
|
T120 |
25 |
|
T121 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T52 |
33 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T52 |
28 |
|
T120 |
24 |
|
T121 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
26 |
|
T121 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T52 |
33 |
|
T120 |
25 |
|
T121 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
23 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T52 |
28 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59583 |
1 |
|
|
T52 |
967 |
|
T120 |
982 |
|
T121 |
313 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45414 |
1 |
|
|
T52 |
746 |
|
T120 |
826 |
|
T121 |
607 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62599 |
1 |
|
|
T52 |
2650 |
|
T120 |
2128 |
|
T121 |
436 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46677 |
1 |
|
|
T52 |
839 |
|
T120 |
874 |
|
T121 |
1375 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1773 |
1 |
|
|
T52 |
37 |
|
T120 |
42 |
|
T121 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T52 |
37 |
|
T120 |
41 |
|
T121 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T52 |
37 |
|
T120 |
42 |
|
T121 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T52 |
36 |
|
T120 |
41 |
|
T121 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T52 |
35 |
|
T120 |
40 |
|
T121 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T52 |
35 |
|
T120 |
41 |
|
T121 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T52 |
35 |
|
T120 |
41 |
|
T121 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T52 |
35 |
|
T120 |
40 |
|
T121 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T52 |
32 |
|
T120 |
39 |
|
T121 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T52 |
35 |
|
T120 |
40 |
|
T121 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T52 |
32 |
|
T120 |
39 |
|
T121 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T52 |
32 |
|
T120 |
39 |
|
T121 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T52 |
32 |
|
T120 |
37 |
|
T121 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T52 |
34 |
|
T120 |
40 |
|
T121 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T52 |
31 |
|
T120 |
37 |
|
T121 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T52 |
34 |
|
T120 |
39 |
|
T121 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T52 |
30 |
|
T120 |
37 |
|
T121 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T52 |
32 |
|
T120 |
38 |
|
T121 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T52 |
28 |
|
T120 |
37 |
|
T121 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T52 |
29 |
|
T120 |
35 |
|
T121 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T52 |
28 |
|
T120 |
37 |
|
T121 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T52 |
29 |
|
T120 |
34 |
|
T121 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T52 |
28 |
|
T120 |
35 |
|
T121 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T52 |
28 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T52 |
28 |
|
T120 |
33 |
|
T121 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T52 |
26 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56190 |
1 |
|
|
T52 |
1119 |
|
T120 |
1182 |
|
T121 |
787 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52721 |
1 |
|
|
T52 |
1525 |
|
T120 |
1699 |
|
T121 |
371 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60921 |
1 |
|
|
T52 |
1803 |
|
T120 |
1234 |
|
T121 |
1368 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45518 |
1 |
|
|
T52 |
866 |
|
T120 |
878 |
|
T121 |
445 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T52 |
36 |
|
T120 |
44 |
|
T121 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T52 |
35 |
|
T120 |
41 |
|
T121 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T52 |
33 |
|
T120 |
39 |
|
T121 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T52 |
33 |
|
T120 |
37 |
|
T121 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T52 |
29 |
|
T120 |
39 |
|
T121 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T52 |
31 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T52 |
29 |
|
T120 |
38 |
|
T121 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T52 |
31 |
|
T120 |
33 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
27 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T52 |
28 |
|
T120 |
38 |
|
T121 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T52 |
30 |
|
T120 |
32 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T52 |
28 |
|
T120 |
38 |
|
T121 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T52 |
30 |
|
T120 |
30 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T52 |
26 |
|
T120 |
38 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T52 |
29 |
|
T120 |
30 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T52 |
26 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T52 |
28 |
|
T120 |
30 |
|
T121 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T52 |
25 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T52 |
27 |
|
T120 |
30 |
|
T121 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T52 |
25 |
|
T120 |
38 |
|
T121 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T52 |
27 |
|
T120 |
29 |
|
T121 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T52 |
26 |
|
T120 |
28 |
|
T121 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T52 |
25 |
|
T120 |
36 |
|
T121 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T52 |
26 |
|
T120 |
28 |
|
T121 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T52 |
25 |
|
T120 |
33 |
|
T121 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T52 |
21 |
|
T120 |
14 |
|
T121 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T52 |
26 |
|
T120 |
26 |
|
T121 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T52 |
25 |
|
T120 |
33 |
|
T121 |
15 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58534 |
1 |
|
|
T52 |
1549 |
|
T120 |
2131 |
|
T121 |
510 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45582 |
1 |
|
|
T52 |
822 |
|
T120 |
923 |
|
T121 |
346 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60516 |
1 |
|
|
T52 |
1138 |
|
T120 |
1113 |
|
T121 |
984 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51701 |
1 |
|
|
T52 |
1906 |
|
T120 |
769 |
|
T121 |
1107 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T52 |
34 |
|
T120 |
44 |
|
T121 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T52 |
33 |
|
T120 |
43 |
|
T121 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T52 |
33 |
|
T120 |
42 |
|
T121 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T52 |
31 |
|
T120 |
42 |
|
T121 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T52 |
32 |
|
T120 |
42 |
|
T121 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T52 |
30 |
|
T120 |
41 |
|
T121 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T52 |
31 |
|
T120 |
40 |
|
T121 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T52 |
29 |
|
T120 |
40 |
|
T121 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T52 |
31 |
|
T120 |
40 |
|
T121 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T52 |
28 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T52 |
30 |
|
T120 |
40 |
|
T121 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T52 |
28 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T52 |
29 |
|
T120 |
38 |
|
T121 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T52 |
28 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T52 |
29 |
|
T120 |
38 |
|
T121 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T52 |
26 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T52 |
28 |
|
T120 |
36 |
|
T121 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T52 |
28 |
|
T120 |
34 |
|
T121 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T52 |
24 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T52 |
28 |
|
T120 |
32 |
|
T121 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T52 |
23 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T52 |
28 |
|
T120 |
32 |
|
T121 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T52 |
23 |
|
T120 |
34 |
|
T121 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T52 |
27 |
|
T120 |
31 |
|
T121 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T52 |
23 |
|
T120 |
34 |
|
T121 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T52 |
26 |
|
T120 |
31 |
|
T121 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
16 |
|
T121 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T52 |
23 |
|
T120 |
33 |
|
T121 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
21 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T52 |
26 |
|
T120 |
30 |
|
T121 |
13 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61123 |
1 |
|
|
T52 |
2128 |
|
T120 |
1024 |
|
T121 |
888 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50977 |
1 |
|
|
T52 |
1109 |
|
T120 |
871 |
|
T121 |
347 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60863 |
1 |
|
|
T52 |
948 |
|
T120 |
2063 |
|
T121 |
531 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42925 |
1 |
|
|
T52 |
900 |
|
T120 |
916 |
|
T121 |
1198 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T52 |
48 |
|
T120 |
43 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T52 |
44 |
|
T120 |
40 |
|
T121 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T52 |
47 |
|
T120 |
42 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T52 |
44 |
|
T120 |
39 |
|
T121 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T52 |
46 |
|
T120 |
42 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T52 |
44 |
|
T120 |
38 |
|
T121 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T52 |
46 |
|
T120 |
42 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T52 |
43 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T52 |
45 |
|
T120 |
41 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T52 |
43 |
|
T120 |
34 |
|
T121 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T52 |
42 |
|
T120 |
34 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T52 |
42 |
|
T120 |
31 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T52 |
41 |
|
T120 |
30 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T52 |
44 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T52 |
41 |
|
T120 |
30 |
|
T121 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T52 |
42 |
|
T120 |
41 |
|
T121 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T52 |
40 |
|
T120 |
30 |
|
T121 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T52 |
40 |
|
T120 |
41 |
|
T121 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T52 |
39 |
|
T120 |
30 |
|
T121 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T52 |
37 |
|
T120 |
39 |
|
T121 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T52 |
38 |
|
T120 |
28 |
|
T121 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T52 |
37 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T52 |
37 |
|
T120 |
28 |
|
T121 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T52 |
35 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T52 |
37 |
|
T120 |
27 |
|
T121 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T52 |
16 |
|
T120 |
18 |
|
T121 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T52 |
35 |
|
T120 |
36 |
|
T121 |
16 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58314 |
1 |
|
|
T52 |
1499 |
|
T120 |
1117 |
|
T121 |
1124 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48653 |
1 |
|
|
T52 |
1811 |
|
T120 |
1901 |
|
T121 |
335 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60176 |
1 |
|
|
T52 |
1362 |
|
T120 |
841 |
|
T121 |
1269 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47833 |
1 |
|
|
T52 |
659 |
|
T120 |
944 |
|
T121 |
390 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T52 |
40 |
|
T120 |
49 |
|
T121 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T52 |
37 |
|
T120 |
47 |
|
T121 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1734 |
1 |
|
|
T52 |
40 |
|
T120 |
49 |
|
T121 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T52 |
37 |
|
T120 |
46 |
|
T121 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T52 |
39 |
|
T120 |
49 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T52 |
36 |
|
T120 |
46 |
|
T121 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T52 |
39 |
|
T120 |
46 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T52 |
35 |
|
T120 |
45 |
|
T121 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T52 |
37 |
|
T120 |
45 |
|
T121 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T52 |
35 |
|
T120 |
44 |
|
T121 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T52 |
37 |
|
T120 |
45 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
20 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T52 |
34 |
|
T120 |
43 |
|
T121 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T52 |
35 |
|
T120 |
43 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T52 |
32 |
|
T120 |
42 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T52 |
35 |
|
T120 |
42 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T52 |
31 |
|
T120 |
40 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T52 |
34 |
|
T120 |
39 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T52 |
29 |
|
T120 |
39 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T52 |
34 |
|
T120 |
38 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T52 |
28 |
|
T120 |
39 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T52 |
34 |
|
T120 |
38 |
|
T121 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T52 |
27 |
|
T120 |
39 |
|
T121 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T52 |
34 |
|
T120 |
37 |
|
T121 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T52 |
27 |
|
T120 |
39 |
|
T121 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T52 |
34 |
|
T120 |
37 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T52 |
26 |
|
T120 |
39 |
|
T121 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T52 |
34 |
|
T120 |
35 |
|
T121 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T52 |
25 |
|
T120 |
38 |
|
T121 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T52 |
17 |
|
T120 |
15 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T52 |
32 |
|
T120 |
32 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T52 |
19 |
|
T120 |
17 |
|
T121 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T52 |
24 |
|
T120 |
35 |
|
T121 |
13 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59018 |
1 |
|
|
T52 |
1376 |
|
T120 |
1986 |
|
T121 |
433 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46974 |
1 |
|
|
T52 |
996 |
|
T120 |
719 |
|
T121 |
512 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56225 |
1 |
|
|
T52 |
1803 |
|
T120 |
1562 |
|
T121 |
622 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52291 |
1 |
|
|
T52 |
888 |
|
T120 |
683 |
|
T121 |
1258 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T52 |
46 |
|
T120 |
39 |
|
T121 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T52 |
49 |
|
T120 |
39 |
|
T121 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T52 |
45 |
|
T120 |
39 |
|
T121 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T52 |
49 |
|
T120 |
38 |
|
T121 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T52 |
45 |
|
T120 |
39 |
|
T121 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T52 |
49 |
|
T120 |
36 |
|
T121 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T52 |
45 |
|
T120 |
38 |
|
T121 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T52 |
47 |
|
T120 |
34 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T52 |
42 |
|
T120 |
38 |
|
T121 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T52 |
46 |
|
T120 |
34 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T52 |
42 |
|
T120 |
38 |
|
T121 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T52 |
45 |
|
T120 |
32 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T52 |
41 |
|
T120 |
36 |
|
T121 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T52 |
40 |
|
T120 |
35 |
|
T121 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T52 |
42 |
|
T120 |
31 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T52 |
39 |
|
T120 |
34 |
|
T121 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T52 |
42 |
|
T120 |
31 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T52 |
39 |
|
T120 |
34 |
|
T121 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T52 |
41 |
|
T120 |
30 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T52 |
39 |
|
T120 |
33 |
|
T121 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T52 |
40 |
|
T120 |
29 |
|
T121 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T52 |
38 |
|
T120 |
33 |
|
T121 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T52 |
39 |
|
T120 |
29 |
|
T121 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T52 |
38 |
|
T120 |
32 |
|
T121 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T52 |
34 |
|
T120 |
29 |
|
T121 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T52 |
37 |
|
T120 |
30 |
|
T121 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T52 |
34 |
|
T120 |
28 |
|
T121 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T52 |
20 |
|
T120 |
19 |
|
T121 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T52 |
36 |
|
T120 |
30 |
|
T121 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T52 |
33 |
|
T120 |
28 |
|
T121 |
24 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59118 |
1 |
|
|
T52 |
2061 |
|
T120 |
2216 |
|
T121 |
1261 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50486 |
1 |
|
|
T52 |
684 |
|
T120 |
554 |
|
T121 |
502 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60314 |
1 |
|
|
T52 |
1728 |
|
T120 |
1178 |
|
T121 |
558 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44555 |
1 |
|
|
T52 |
792 |
|
T120 |
1073 |
|
T121 |
627 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T52 |
41 |
|
T120 |
35 |
|
T121 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T52 |
37 |
|
T120 |
43 |
|
T121 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T52 |
40 |
|
T120 |
32 |
|
T121 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T52 |
36 |
|
T120 |
43 |
|
T121 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T52 |
40 |
|
T120 |
29 |
|
T121 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T52 |
35 |
|
T120 |
41 |
|
T121 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T52 |
37 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T52 |
33 |
|
T120 |
41 |
|
T121 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T52 |
37 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T52 |
33 |
|
T120 |
40 |
|
T121 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T52 |
35 |
|
T120 |
28 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T52 |
24 |
|
T120 |
14 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T52 |
31 |
|
T120 |
39 |
|
T121 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T52 |
34 |
|
T120 |
26 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T52 |
30 |
|
T120 |
39 |
|
T121 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T52 |
33 |
|
T120 |
24 |
|
T121 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T52 |
30 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T52 |
31 |
|
T120 |
24 |
|
T121 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T52 |
29 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T52 |
30 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T52 |
29 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T52 |
30 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T52 |
26 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T52 |
30 |
|
T120 |
21 |
|
T121 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T52 |
26 |
|
T120 |
39 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T52 |
29 |
|
T120 |
21 |
|
T121 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T52 |
25 |
|
T120 |
38 |
|
T121 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T52 |
28 |
|
T120 |
21 |
|
T121 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T52 |
25 |
|
T120 |
37 |
|
T121 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T52 |
20 |
|
T120 |
22 |
|
T121 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T52 |
28 |
|
T120 |
20 |
|
T121 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T52 |
24 |
|
T120 |
13 |
|
T121 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T52 |
25 |
|
T120 |
36 |
|
T121 |
19 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62049 |
1 |
|
|
T52 |
2421 |
|
T120 |
1106 |
|
T121 |
789 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42380 |
1 |
|
|
T52 |
767 |
|
T120 |
660 |
|
T121 |
1170 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57534 |
1 |
|
|
T52 |
1457 |
|
T120 |
2423 |
|
T121 |
508 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52858 |
1 |
|
|
T52 |
740 |
|
T120 |
955 |
|
T121 |
427 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T52 |
31 |
|
T120 |
33 |
|
T121 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T52 |
36 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T52 |
30 |
|
T120 |
32 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T52 |
35 |
|
T120 |
36 |
|
T121 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T52 |
29 |
|
T120 |
31 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T52 |
34 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T52 |
27 |
|
T120 |
31 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T52 |
34 |
|
T120 |
36 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T52 |
26 |
|
T120 |
29 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T52 |
33 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T52 |
26 |
|
T120 |
28 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T52 |
20 |
|
T120 |
15 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T52 |
24 |
|
T120 |
27 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T52 |
24 |
|
T120 |
26 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T52 |
22 |
|
T120 |
24 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T52 |
30 |
|
T120 |
35 |
|
T121 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T52 |
22 |
|
T120 |
23 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T52 |
29 |
|
T120 |
35 |
|
T121 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T52 |
22 |
|
T120 |
23 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T52 |
29 |
|
T120 |
35 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T52 |
22 |
|
T120 |
22 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T52 |
29 |
|
T120 |
34 |
|
T121 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T52 |
19 |
|
T120 |
21 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T52 |
29 |
|
T120 |
34 |
|
T121 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T52 |
19 |
|
T120 |
20 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T52 |
29 |
|
T120 |
34 |
|
T121 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
25 |
|
T120 |
17 |
|
T121 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T52 |
18 |
|
T120 |
19 |
|
T121 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T52 |
19 |
|
T120 |
14 |
|
T121 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T52 |
29 |
|
T120 |
33 |
|
T121 |
15 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61911 |
1 |
|
|
T52 |
1559 |
|
T120 |
1374 |
|
T121 |
854 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46052 |
1 |
|
|
T52 |
1679 |
|
T120 |
317 |
|
T121 |
1012 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63061 |
1 |
|
|
T52 |
1323 |
|
T120 |
2836 |
|
T121 |
778 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45100 |
1 |
|
|
T52 |
663 |
|
T120 |
724 |
|
T121 |
344 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T52 |
36 |
|
T120 |
20 |
|
T121 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T52 |
34 |
|
T120 |
21 |
|
T121 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T52 |
36 |
|
T120 |
20 |
|
T121 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T52 |
34 |
|
T120 |
21 |
|
T121 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T52 |
36 |
|
T120 |
19 |
|
T121 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T52 |
32 |
|
T120 |
21 |
|
T121 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T52 |
34 |
|
T120 |
19 |
|
T121 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T52 |
32 |
|
T120 |
21 |
|
T121 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T52 |
34 |
|
T120 |
19 |
|
T121 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T52 |
30 |
|
T120 |
21 |
|
T121 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T52 |
34 |
|
T120 |
19 |
|
T121 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T52 |
26 |
|
T120 |
24 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T52 |
30 |
|
T120 |
21 |
|
T121 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T52 |
34 |
|
T120 |
19 |
|
T121 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T52 |
30 |
|
T120 |
21 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T52 |
34 |
|
T120 |
18 |
|
T121 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T52 |
28 |
|
T120 |
20 |
|
T121 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T52 |
32 |
|
T120 |
18 |
|
T121 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T52 |
28 |
|
T120 |
20 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T52 |
31 |
|
T120 |
18 |
|
T121 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T52 |
27 |
|
T120 |
20 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T52 |
30 |
|
T120 |
18 |
|
T121 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T52 |
26 |
|
T120 |
18 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T52 |
30 |
|
T120 |
17 |
|
T121 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T52 |
24 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T52 |
30 |
|
T120 |
17 |
|
T121 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T52 |
24 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T52 |
30 |
|
T120 |
15 |
|
T121 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T52 |
23 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T52 |
24 |
|
T120 |
24 |
|
T121 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T52 |
29 |
|
T120 |
13 |
|
T121 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
25 |
|
T120 |
23 |
|
T121 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T52 |
21 |
|
T120 |
18 |
|
T121 |
9 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56230 |
1 |
|
|
T52 |
1359 |
|
T120 |
1208 |
|
T121 |
344 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47015 |
1 |
|
|
T52 |
849 |
|
T120 |
685 |
|
T121 |
489 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59139 |
1 |
|
|
T52 |
742 |
|
T120 |
2292 |
|
T121 |
628 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52450 |
1 |
|
|
T52 |
1898 |
|
T120 |
839 |
|
T121 |
1331 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T52 |
52 |
|
T120 |
34 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T52 |
57 |
|
T120 |
35 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T52 |
47 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T52 |
57 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T52 |
45 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T52 |
55 |
|
T120 |
33 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T52 |
44 |
|
T120 |
33 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T52 |
55 |
|
T120 |
32 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T52 |
43 |
|
T120 |
33 |
|
T121 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T52 |
53 |
|
T120 |
31 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T52 |
41 |
|
T120 |
33 |
|
T121 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T52 |
21 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T52 |
52 |
|
T120 |
31 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T52 |
40 |
|
T120 |
33 |
|
T121 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T52 |
52 |
|
T120 |
30 |
|
T121 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T52 |
38 |
|
T120 |
32 |
|
T121 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T52 |
52 |
|
T120 |
30 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T52 |
38 |
|
T120 |
31 |
|
T121 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T52 |
51 |
|
T120 |
29 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T52 |
35 |
|
T120 |
29 |
|
T121 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T52 |
51 |
|
T120 |
28 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T52 |
35 |
|
T120 |
29 |
|
T121 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T52 |
49 |
|
T120 |
27 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T52 |
31 |
|
T120 |
28 |
|
T121 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T52 |
49 |
|
T120 |
27 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T52 |
30 |
|
T120 |
28 |
|
T121 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T52 |
49 |
|
T120 |
25 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T52 |
29 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T52 |
48 |
|
T120 |
25 |
|
T121 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T52 |
25 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T52 |
27 |
|
T120 |
27 |
|
T121 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T52 |
44 |
|
T120 |
25 |
|
T121 |
24 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65053 |
1 |
|
|
T52 |
2140 |
|
T120 |
2020 |
|
T121 |
669 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44764 |
1 |
|
|
T52 |
928 |
|
T120 |
1551 |
|
T121 |
625 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57223 |
1 |
|
|
T52 |
773 |
|
T120 |
487 |
|
T121 |
430 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48112 |
1 |
|
|
T52 |
1185 |
|
T120 |
777 |
|
T121 |
1210 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T52 |
48 |
|
T120 |
57 |
|
T121 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T52 |
53 |
|
T120 |
55 |
|
T121 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T52 |
46 |
|
T120 |
55 |
|
T121 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T52 |
53 |
|
T120 |
53 |
|
T121 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T52 |
44 |
|
T120 |
54 |
|
T121 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T52 |
53 |
|
T120 |
51 |
|
T121 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T52 |
44 |
|
T120 |
54 |
|
T121 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T52 |
51 |
|
T120 |
50 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T52 |
43 |
|
T120 |
54 |
|
T121 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T52 |
50 |
|
T120 |
49 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T52 |
41 |
|
T120 |
54 |
|
T121 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T52 |
16 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T52 |
50 |
|
T120 |
46 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T52 |
40 |
|
T120 |
54 |
|
T121 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T52 |
48 |
|
T120 |
46 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T52 |
40 |
|
T120 |
51 |
|
T121 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T52 |
47 |
|
T120 |
43 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T52 |
39 |
|
T120 |
51 |
|
T121 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T52 |
47 |
|
T120 |
42 |
|
T121 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T52 |
38 |
|
T120 |
51 |
|
T121 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T52 |
45 |
|
T120 |
38 |
|
T121 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T52 |
38 |
|
T120 |
51 |
|
T121 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T52 |
43 |
|
T120 |
37 |
|
T121 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T52 |
36 |
|
T120 |
50 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T52 |
43 |
|
T120 |
36 |
|
T121 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T52 |
34 |
|
T120 |
48 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T52 |
43 |
|
T120 |
35 |
|
T121 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T52 |
33 |
|
T120 |
48 |
|
T121 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T52 |
42 |
|
T120 |
31 |
|
T121 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T52 |
21 |
|
T120 |
8 |
|
T121 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T52 |
33 |
|
T120 |
48 |
|
T121 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T52 |
15 |
|
T120 |
10 |
|
T121 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T52 |
41 |
|
T120 |
31 |
|
T121 |
18 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55699 |
1 |
|
|
T52 |
1778 |
|
T120 |
852 |
|
T121 |
607 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51094 |
1 |
|
|
T52 |
683 |
|
T120 |
2083 |
|
T121 |
503 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63532 |
1 |
|
|
T52 |
2166 |
|
T120 |
1080 |
|
T121 |
554 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45345 |
1 |
|
|
T52 |
715 |
|
T120 |
853 |
|
T121 |
1144 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T52 |
32 |
|
T120 |
48 |
|
T121 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T52 |
32 |
|
T120 |
52 |
|
T121 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T52 |
30 |
|
T120 |
47 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T52 |
32 |
|
T120 |
50 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T52 |
29 |
|
T120 |
46 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T52 |
31 |
|
T120 |
49 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T52 |
29 |
|
T120 |
44 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T52 |
30 |
|
T120 |
49 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T52 |
29 |
|
T120 |
42 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T52 |
29 |
|
T120 |
47 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T52 |
28 |
|
T120 |
42 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
25 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T52 |
28 |
|
T120 |
47 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T52 |
27 |
|
T120 |
41 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T52 |
27 |
|
T120 |
45 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T52 |
26 |
|
T120 |
41 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T52 |
27 |
|
T120 |
44 |
|
T121 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T52 |
25 |
|
T120 |
40 |
|
T121 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T52 |
27 |
|
T120 |
43 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T52 |
25 |
|
T120 |
38 |
|
T121 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T52 |
27 |
|
T120 |
41 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T52 |
22 |
|
T120 |
38 |
|
T121 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T52 |
26 |
|
T120 |
41 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T52 |
22 |
|
T120 |
38 |
|
T121 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T52 |
26 |
|
T120 |
40 |
|
T121 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T52 |
22 |
|
T120 |
38 |
|
T121 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T52 |
26 |
|
T120 |
37 |
|
T121 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T52 |
22 |
|
T120 |
37 |
|
T121 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T52 |
26 |
|
T120 |
36 |
|
T121 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T52 |
24 |
|
T120 |
15 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T52 |
22 |
|
T120 |
34 |
|
T121 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T52 |
24 |
|
T120 |
11 |
|
T121 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T52 |
26 |
|
T120 |
35 |
|
T121 |
21 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62438 |
1 |
|
|
T52 |
1448 |
|
T120 |
2326 |
|
T121 |
596 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46744 |
1 |
|
|
T52 |
785 |
|
T120 |
692 |
|
T121 |
617 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58549 |
1 |
|
|
T52 |
1093 |
|
T120 |
1236 |
|
T121 |
467 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47899 |
1 |
|
|
T52 |
1891 |
|
T120 |
845 |
|
T121 |
1264 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T52 |
38 |
|
T120 |
33 |
|
T121 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T52 |
43 |
|
T120 |
33 |
|
T121 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T52 |
38 |
|
T120 |
30 |
|
T121 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T52 |
38 |
|
T120 |
30 |
|
T121 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T52 |
38 |
|
T120 |
29 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T52 |
43 |
|
T120 |
32 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T52 |
38 |
|
T120 |
27 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T52 |
43 |
|
T120 |
31 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T52 |
38 |
|
T120 |
26 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T52 |
43 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T52 |
37 |
|
T120 |
25 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T52 |
43 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T52 |
36 |
|
T120 |
25 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T52 |
40 |
|
T120 |
29 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T52 |
35 |
|
T120 |
25 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T52 |
39 |
|
T120 |
28 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T52 |
34 |
|
T120 |
25 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T52 |
38 |
|
T120 |
28 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T52 |
34 |
|
T120 |
25 |
|
T121 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T52 |
36 |
|
T120 |
28 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T52 |
34 |
|
T120 |
24 |
|
T121 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T52 |
35 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T52 |
34 |
|
T120 |
23 |
|
T121 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T52 |
34 |
|
T120 |
27 |
|
T121 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T52 |
32 |
|
T120 |
22 |
|
T121 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T52 |
32 |
|
T120 |
27 |
|
T121 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T52 |
20 |
|
T120 |
20 |
|
T121 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T52 |
31 |
|
T120 |
21 |
|
T121 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T52 |
16 |
|
T120 |
20 |
|
T121 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T52 |
31 |
|
T120 |
27 |
|
T121 |
18 |