Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2004728 |
1 |
|
|
T30 |
40479 |
|
T31 |
136 |
|
T32 |
74 |
| auto[1] |
1752082 |
1 |
|
|
T30 |
34429 |
|
T31 |
123 |
|
T32 |
74 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2362164 |
1 |
|
|
T30 |
47774 |
|
T31 |
201 |
|
T32 |
68 |
| auto[1] |
1394646 |
1 |
|
|
T30 |
27134 |
|
T31 |
58 |
|
T32 |
80 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1302410 |
1 |
|
|
T30 |
26594 |
|
T31 |
109 |
|
T32 |
37 |
| auto[0] |
auto[1] |
702318 |
1 |
|
|
T30 |
13885 |
|
T31 |
27 |
|
T32 |
37 |
| auto[1] |
auto[0] |
1059754 |
1 |
|
|
T30 |
21180 |
|
T31 |
92 |
|
T32 |
31 |
| auto[1] |
auto[1] |
692328 |
1 |
|
|
T30 |
13249 |
|
T31 |
31 |
|
T32 |
43 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1998450 |
1 |
|
|
T30 |
40584 |
|
T31 |
111 |
|
T32 |
88 |
| auto[1] |
1758360 |
1 |
|
|
T30 |
34324 |
|
T31 |
148 |
|
T32 |
60 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2361475 |
1 |
|
|
T30 |
47756 |
|
T31 |
201 |
|
T32 |
73 |
| auto[1] |
1395335 |
1 |
|
|
T30 |
27152 |
|
T31 |
58 |
|
T32 |
75 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1297582 |
1 |
|
|
T30 |
26864 |
|
T31 |
82 |
|
T32 |
43 |
| auto[0] |
auto[1] |
700868 |
1 |
|
|
T30 |
13720 |
|
T31 |
29 |
|
T32 |
45 |
| auto[1] |
auto[0] |
1063893 |
1 |
|
|
T30 |
20892 |
|
T31 |
119 |
|
T32 |
30 |
| auto[1] |
auto[1] |
694467 |
1 |
|
|
T30 |
13432 |
|
T31 |
29 |
|
T32 |
30 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2001911 |
1 |
|
|
T30 |
39899 |
|
T31 |
154 |
|
T32 |
62 |
| auto[1] |
1754899 |
1 |
|
|
T30 |
35009 |
|
T31 |
105 |
|
T32 |
86 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2367720 |
1 |
|
|
T30 |
47614 |
|
T31 |
198 |
|
T32 |
72 |
| auto[1] |
1389090 |
1 |
|
|
T30 |
27294 |
|
T31 |
61 |
|
T32 |
76 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303560 |
1 |
|
|
T30 |
26154 |
|
T31 |
121 |
|
T32 |
25 |
| auto[0] |
auto[1] |
698351 |
1 |
|
|
T30 |
13745 |
|
T31 |
33 |
|
T32 |
37 |
| auto[1] |
auto[0] |
1064160 |
1 |
|
|
T30 |
21460 |
|
T31 |
77 |
|
T32 |
47 |
| auto[1] |
auto[1] |
690739 |
1 |
|
|
T30 |
13549 |
|
T31 |
28 |
|
T32 |
39 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1998708 |
1 |
|
|
T30 |
39913 |
|
T31 |
127 |
|
T32 |
66 |
| auto[1] |
1758102 |
1 |
|
|
T30 |
34995 |
|
T31 |
132 |
|
T32 |
82 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2363238 |
1 |
|
|
T30 |
47930 |
|
T31 |
189 |
|
T32 |
78 |
| auto[1] |
1393572 |
1 |
|
|
T30 |
26978 |
|
T31 |
70 |
|
T32 |
70 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1298518 |
1 |
|
|
T30 |
26457 |
|
T31 |
89 |
|
T32 |
33 |
| auto[0] |
auto[1] |
700190 |
1 |
|
|
T30 |
13456 |
|
T31 |
38 |
|
T32 |
33 |
| auto[1] |
auto[0] |
1064720 |
1 |
|
|
T30 |
21473 |
|
T31 |
100 |
|
T32 |
45 |
| auto[1] |
auto[1] |
693382 |
1 |
|
|
T30 |
13522 |
|
T31 |
32 |
|
T32 |
37 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2003295 |
1 |
|
|
T30 |
40853 |
|
T31 |
103 |
|
T32 |
76 |
| auto[1] |
1753515 |
1 |
|
|
T30 |
34055 |
|
T31 |
156 |
|
T32 |
72 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2360875 |
1 |
|
|
T30 |
47622 |
|
T31 |
179 |
|
T32 |
91 |
| auto[1] |
1395935 |
1 |
|
|
T30 |
27286 |
|
T31 |
80 |
|
T32 |
57 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1301084 |
1 |
|
|
T30 |
26866 |
|
T31 |
72 |
|
T32 |
48 |
| auto[0] |
auto[1] |
702211 |
1 |
|
|
T30 |
13987 |
|
T31 |
31 |
|
T32 |
28 |
| auto[1] |
auto[0] |
1059791 |
1 |
|
|
T30 |
20756 |
|
T31 |
107 |
|
T32 |
43 |
| auto[1] |
auto[1] |
693724 |
1 |
|
|
T30 |
13299 |
|
T31 |
49 |
|
T32 |
29 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2000822 |
1 |
|
|
T30 |
40433 |
|
T31 |
151 |
|
T32 |
66 |
| auto[1] |
1755988 |
1 |
|
|
T30 |
34475 |
|
T31 |
108 |
|
T32 |
82 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2363761 |
1 |
|
|
T30 |
47236 |
|
T31 |
200 |
|
T32 |
86 |
| auto[1] |
1393049 |
1 |
|
|
T30 |
27672 |
|
T31 |
59 |
|
T32 |
62 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1299310 |
1 |
|
|
T30 |
26369 |
|
T31 |
115 |
|
T32 |
39 |
| auto[0] |
auto[1] |
701512 |
1 |
|
|
T30 |
14064 |
|
T31 |
36 |
|
T32 |
27 |
| auto[1] |
auto[0] |
1064451 |
1 |
|
|
T30 |
20867 |
|
T31 |
85 |
|
T32 |
47 |
| auto[1] |
auto[1] |
691537 |
1 |
|
|
T30 |
13608 |
|
T31 |
23 |
|
T32 |
35 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2004814 |
1 |
|
|
T30 |
39759 |
|
T31 |
108 |
|
T32 |
72 |
| auto[1] |
1751996 |
1 |
|
|
T30 |
35149 |
|
T31 |
151 |
|
T32 |
76 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2364362 |
1 |
|
|
T30 |
48142 |
|
T31 |
201 |
|
T32 |
68 |
| auto[1] |
1392448 |
1 |
|
|
T30 |
26766 |
|
T31 |
58 |
|
T32 |
80 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1304416 |
1 |
|
|
T30 |
26434 |
|
T31 |
82 |
|
T32 |
31 |
| auto[0] |
auto[1] |
700398 |
1 |
|
|
T30 |
13325 |
|
T31 |
26 |
|
T32 |
41 |
| auto[1] |
auto[0] |
1059946 |
1 |
|
|
T30 |
21708 |
|
T31 |
119 |
|
T32 |
37 |
| auto[1] |
auto[1] |
692050 |
1 |
|
|
T30 |
13441 |
|
T31 |
32 |
|
T32 |
39 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2007137 |
1 |
|
|
T30 |
40117 |
|
T31 |
107 |
|
T32 |
76 |
| auto[1] |
1749673 |
1 |
|
|
T30 |
34791 |
|
T31 |
152 |
|
T32 |
72 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2363481 |
1 |
|
|
T30 |
47567 |
|
T31 |
174 |
|
T32 |
66 |
| auto[1] |
1393329 |
1 |
|
|
T30 |
27341 |
|
T31 |
85 |
|
T32 |
82 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303599 |
1 |
|
|
T30 |
26338 |
|
T31 |
81 |
|
T32 |
31 |
| auto[0] |
auto[1] |
703538 |
1 |
|
|
T30 |
13779 |
|
T31 |
26 |
|
T32 |
45 |
| auto[1] |
auto[0] |
1059882 |
1 |
|
|
T30 |
21229 |
|
T31 |
93 |
|
T32 |
35 |
| auto[1] |
auto[1] |
689791 |
1 |
|
|
T30 |
13562 |
|
T31 |
59 |
|
T32 |
37 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2006102 |
1 |
|
|
T30 |
40348 |
|
T31 |
116 |
|
T32 |
68 |
| auto[1] |
1750708 |
1 |
|
|
T30 |
34560 |
|
T31 |
143 |
|
T32 |
80 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2369713 |
1 |
|
|
T30 |
47711 |
|
T31 |
167 |
|
T32 |
93 |
| auto[1] |
1387097 |
1 |
|
|
T30 |
27197 |
|
T31 |
92 |
|
T32 |
55 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1307637 |
1 |
|
|
T30 |
26444 |
|
T31 |
75 |
|
T32 |
45 |
| auto[0] |
auto[1] |
698465 |
1 |
|
|
T30 |
13904 |
|
T31 |
41 |
|
T32 |
23 |
| auto[1] |
auto[0] |
1062076 |
1 |
|
|
T30 |
21267 |
|
T31 |
92 |
|
T32 |
48 |
| auto[1] |
auto[1] |
688632 |
1 |
|
|
T30 |
13293 |
|
T31 |
51 |
|
T32 |
32 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2002955 |
1 |
|
|
T30 |
39867 |
|
T31 |
135 |
|
T32 |
62 |
| auto[1] |
1753855 |
1 |
|
|
T30 |
35041 |
|
T31 |
124 |
|
T32 |
86 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2368506 |
1 |
|
|
T30 |
48053 |
|
T31 |
189 |
|
T32 |
78 |
| auto[1] |
1388304 |
1 |
|
|
T30 |
26855 |
|
T31 |
70 |
|
T32 |
70 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303699 |
1 |
|
|
T30 |
26266 |
|
T31 |
94 |
|
T32 |
31 |
| auto[0] |
auto[1] |
699256 |
1 |
|
|
T30 |
13601 |
|
T31 |
41 |
|
T32 |
31 |
| auto[1] |
auto[0] |
1064807 |
1 |
|
|
T30 |
21787 |
|
T31 |
95 |
|
T32 |
47 |
| auto[1] |
auto[1] |
689048 |
1 |
|
|
T30 |
13254 |
|
T31 |
29 |
|
T32 |
39 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2003590 |
1 |
|
|
T30 |
39706 |
|
T31 |
123 |
|
T32 |
86 |
| auto[1] |
1753220 |
1 |
|
|
T30 |
35202 |
|
T31 |
136 |
|
T32 |
62 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2368925 |
1 |
|
|
T30 |
47350 |
|
T31 |
224 |
|
T32 |
83 |
| auto[1] |
1387885 |
1 |
|
|
T30 |
27558 |
|
T31 |
35 |
|
T32 |
65 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1305522 |
1 |
|
|
T30 |
26048 |
|
T31 |
110 |
|
T32 |
49 |
| auto[0] |
auto[1] |
698068 |
1 |
|
|
T30 |
13658 |
|
T31 |
13 |
|
T32 |
37 |
| auto[1] |
auto[0] |
1063403 |
1 |
|
|
T30 |
21302 |
|
T31 |
114 |
|
T32 |
34 |
| auto[1] |
auto[1] |
689817 |
1 |
|
|
T30 |
13900 |
|
T31 |
22 |
|
T32 |
28 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2001461 |
1 |
|
|
T30 |
39250 |
|
T31 |
171 |
|
T32 |
58 |
| auto[1] |
1755349 |
1 |
|
|
T30 |
35658 |
|
T31 |
88 |
|
T32 |
90 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2373527 |
1 |
|
|
T30 |
47935 |
|
T31 |
200 |
|
T32 |
55 |
| auto[1] |
1383283 |
1 |
|
|
T30 |
26973 |
|
T31 |
59 |
|
T32 |
93 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1306916 |
1 |
|
|
T30 |
25919 |
|
T31 |
131 |
|
T32 |
22 |
| auto[0] |
auto[1] |
694545 |
1 |
|
|
T30 |
13331 |
|
T31 |
40 |
|
T32 |
36 |
| auto[1] |
auto[0] |
1066611 |
1 |
|
|
T30 |
22016 |
|
T31 |
69 |
|
T32 |
33 |
| auto[1] |
auto[1] |
688738 |
1 |
|
|
T30 |
13642 |
|
T31 |
19 |
|
T32 |
57 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2004783 |
1 |
|
|
T30 |
39795 |
|
T31 |
146 |
|
T32 |
92 |
| auto[1] |
1752027 |
1 |
|
|
T30 |
35113 |
|
T31 |
113 |
|
T32 |
56 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2365104 |
1 |
|
|
T30 |
47818 |
|
T31 |
219 |
|
T32 |
77 |
| auto[1] |
1391706 |
1 |
|
|
T30 |
27090 |
|
T31 |
40 |
|
T32 |
71 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303875 |
1 |
|
|
T30 |
26330 |
|
T31 |
117 |
|
T32 |
47 |
| auto[0] |
auto[1] |
700908 |
1 |
|
|
T30 |
13465 |
|
T31 |
29 |
|
T32 |
45 |
| auto[1] |
auto[0] |
1061229 |
1 |
|
|
T30 |
21488 |
|
T31 |
102 |
|
T32 |
30 |
| auto[1] |
auto[1] |
690798 |
1 |
|
|
T30 |
13625 |
|
T31 |
11 |
|
T32 |
26 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1999462 |
1 |
|
|
T30 |
39983 |
|
T31 |
114 |
|
T32 |
70 |
| auto[1] |
1757348 |
1 |
|
|
T30 |
34925 |
|
T31 |
145 |
|
T32 |
78 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2369522 |
1 |
|
|
T30 |
48003 |
|
T31 |
194 |
|
T32 |
82 |
| auto[1] |
1387288 |
1 |
|
|
T30 |
26905 |
|
T31 |
65 |
|
T32 |
66 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303273 |
1 |
|
|
T30 |
26517 |
|
T31 |
93 |
|
T32 |
41 |
| auto[0] |
auto[1] |
696189 |
1 |
|
|
T30 |
13466 |
|
T31 |
21 |
|
T32 |
29 |
| auto[1] |
auto[0] |
1066249 |
1 |
|
|
T30 |
21486 |
|
T31 |
101 |
|
T32 |
41 |
| auto[1] |
auto[1] |
691099 |
1 |
|
|
T30 |
13439 |
|
T31 |
44 |
|
T32 |
37 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2003935 |
1 |
|
|
T30 |
39832 |
|
T31 |
91 |
|
T32 |
80 |
| auto[1] |
1752875 |
1 |
|
|
T30 |
35076 |
|
T31 |
168 |
|
T32 |
68 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2370291 |
1 |
|
|
T30 |
47732 |
|
T31 |
185 |
|
T32 |
52 |
| auto[1] |
1386519 |
1 |
|
|
T30 |
27176 |
|
T31 |
74 |
|
T32 |
96 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1305383 |
1 |
|
|
T30 |
26329 |
|
T31 |
62 |
|
T32 |
24 |
| auto[0] |
auto[1] |
698552 |
1 |
|
|
T30 |
13503 |
|
T31 |
29 |
|
T32 |
56 |
| auto[1] |
auto[0] |
1064908 |
1 |
|
|
T30 |
21403 |
|
T31 |
123 |
|
T32 |
28 |
| auto[1] |
auto[1] |
687967 |
1 |
|
|
T30 |
13673 |
|
T31 |
45 |
|
T32 |
40 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2005624 |
1 |
|
|
T30 |
40657 |
|
T31 |
107 |
|
T32 |
64 |
| auto[1] |
1751186 |
1 |
|
|
T30 |
34251 |
|
T31 |
152 |
|
T32 |
84 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2371223 |
1 |
|
|
T30 |
47779 |
|
T31 |
208 |
|
T32 |
70 |
| auto[1] |
1385587 |
1 |
|
|
T30 |
27129 |
|
T31 |
51 |
|
T32 |
78 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1306799 |
1 |
|
|
T30 |
26927 |
|
T31 |
93 |
|
T32 |
28 |
| auto[0] |
auto[1] |
698825 |
1 |
|
|
T30 |
13730 |
|
T31 |
14 |
|
T32 |
36 |
| auto[1] |
auto[0] |
1064424 |
1 |
|
|
T30 |
20852 |
|
T31 |
115 |
|
T32 |
42 |
| auto[1] |
auto[1] |
686762 |
1 |
|
|
T30 |
13399 |
|
T31 |
37 |
|
T32 |
42 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2003379 |
1 |
|
|
T30 |
39989 |
|
T31 |
143 |
|
T32 |
72 |
| auto[1] |
1753431 |
1 |
|
|
T30 |
34919 |
|
T31 |
116 |
|
T32 |
76 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2371616 |
1 |
|
|
T30 |
48050 |
|
T31 |
187 |
|
T32 |
69 |
| auto[1] |
1385194 |
1 |
|
|
T30 |
26858 |
|
T31 |
72 |
|
T32 |
79 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1305987 |
1 |
|
|
T30 |
26421 |
|
T31 |
106 |
|
T32 |
37 |
| auto[0] |
auto[1] |
697392 |
1 |
|
|
T30 |
13568 |
|
T31 |
37 |
|
T32 |
35 |
| auto[1] |
auto[0] |
1065629 |
1 |
|
|
T30 |
21629 |
|
T31 |
81 |
|
T32 |
32 |
| auto[1] |
auto[1] |
687802 |
1 |
|
|
T30 |
13290 |
|
T31 |
35 |
|
T32 |
44 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2000915 |
1 |
|
|
T30 |
40379 |
|
T31 |
135 |
|
T32 |
98 |
| auto[1] |
1755895 |
1 |
|
|
T30 |
34529 |
|
T31 |
124 |
|
T32 |
50 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2370732 |
1 |
|
|
T30 |
47874 |
|
T31 |
198 |
|
T32 |
73 |
| auto[1] |
1386078 |
1 |
|
|
T30 |
27034 |
|
T31 |
61 |
|
T32 |
75 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1304421 |
1 |
|
|
T30 |
26676 |
|
T31 |
100 |
|
T32 |
49 |
| auto[0] |
auto[1] |
696494 |
1 |
|
|
T30 |
13703 |
|
T31 |
35 |
|
T32 |
49 |
| auto[1] |
auto[0] |
1066311 |
1 |
|
|
T30 |
21198 |
|
T31 |
98 |
|
T32 |
24 |
| auto[1] |
auto[1] |
689584 |
1 |
|
|
T30 |
13331 |
|
T31 |
26 |
|
T32 |
26 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2001310 |
1 |
|
|
T30 |
39607 |
|
T31 |
110 |
|
T32 |
70 |
| auto[1] |
1755500 |
1 |
|
|
T30 |
35301 |
|
T31 |
149 |
|
T32 |
78 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2369359 |
1 |
|
|
T30 |
47580 |
|
T31 |
208 |
|
T32 |
53 |
| auto[1] |
1387451 |
1 |
|
|
T30 |
27328 |
|
T31 |
51 |
|
T32 |
95 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1303677 |
1 |
|
|
T30 |
25947 |
|
T31 |
93 |
|
T32 |
27 |
| auto[0] |
auto[1] |
697633 |
1 |
|
|
T30 |
13660 |
|
T31 |
17 |
|
T32 |
43 |
| auto[1] |
auto[0] |
1065682 |
1 |
|
|
T30 |
21633 |
|
T31 |
115 |
|
T32 |
26 |
| auto[1] |
auto[1] |
689818 |
1 |
|
|
T30 |
13668 |
|
T31 |
34 |
|
T32 |
52 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2007473 |
1 |
|
|
T30 |
40003 |
|
T31 |
132 |
|
T32 |
80 |
| auto[1] |
1749337 |
1 |
|
|
T30 |
34905 |
|
T31 |
127 |
|
T32 |
68 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2368940 |
1 |
|
|
T30 |
48197 |
|
T31 |
190 |
|
T32 |
61 |
| auto[1] |
1387870 |
1 |
|
|
T30 |
26711 |
|
T31 |
69 |
|
T32 |
87 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1307085 |
1 |
|
|
T30 |
26544 |
|
T31 |
102 |
|
T32 |
34 |
| auto[0] |
auto[1] |
700388 |
1 |
|
|
T30 |
13459 |
|
T31 |
30 |
|
T32 |
46 |
| auto[1] |
auto[0] |
1061855 |
1 |
|
|
T30 |
21653 |
|
T31 |
88 |
|
T32 |
27 |
| auto[1] |
auto[1] |
687482 |
1 |
|
|
T30 |
13252 |
|
T31 |
39 |
|
T32 |
41 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2002781 |
1 |
|
|
T30 |
39607 |
|
T31 |
145 |
|
T32 |
64 |
| auto[1] |
1754029 |
1 |
|
|
T30 |
35301 |
|
T31 |
114 |
|
T32 |
84 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2369889 |
1 |
|
|
T30 |
47790 |
|
T31 |
190 |
|
T32 |
86 |
| auto[1] |
1386921 |
1 |
|
|
T30 |
27118 |
|
T31 |
69 |
|
T32 |
62 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1305210 |
1 |
|
|
T30 |
26127 |
|
T31 |
98 |
|
T32 |
35 |
| auto[0] |
auto[1] |
697571 |
1 |
|
|
T30 |
13480 |
|
T31 |
47 |
|
T32 |
29 |
| auto[1] |
auto[0] |
1064679 |
1 |
|
|
T30 |
21663 |
|
T31 |
92 |
|
T32 |
51 |
| auto[1] |
auto[1] |
689350 |
1 |
|
|
T30 |
13638 |
|
T31 |
22 |
|
T32 |
33 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2006681 |
1 |
|
|
T30 |
40358 |
|
T31 |
146 |
|
T32 |
64 |
| auto[1] |
1750129 |
1 |
|
|
T30 |
34550 |
|
T31 |
113 |
|
T32 |
84 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2373818 |
1 |
|
|
T30 |
48292 |
|
T31 |
178 |
|
T32 |
87 |
| auto[1] |
1382992 |
1 |
|
|
T30 |
26616 |
|
T31 |
81 |
|
T32 |
61 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1309629 |
1 |
|
|
T30 |
26868 |
|
T31 |
103 |
|
T32 |
35 |
| auto[0] |
auto[1] |
697052 |
1 |
|
|
T30 |
13490 |
|
T31 |
43 |
|
T32 |
29 |
| auto[1] |
auto[0] |
1064189 |
1 |
|
|
T30 |
21424 |
|
T31 |
75 |
|
T32 |
52 |
| auto[1] |
auto[1] |
685940 |
1 |
|
|
T30 |
13126 |
|
T31 |
38 |
|
T32 |
32 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2007588 |
1 |
|
|
T30 |
39759 |
|
T31 |
155 |
|
T32 |
88 |
| auto[1] |
1749222 |
1 |
|
|
T30 |
35149 |
|
T31 |
104 |
|
T32 |
60 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2372073 |
1 |
|
|
T30 |
47799 |
|
T31 |
183 |
|
T32 |
91 |
| auto[1] |
1384737 |
1 |
|
|
T30 |
27109 |
|
T31 |
76 |
|
T32 |
57 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1310393 |
1 |
|
|
T30 |
26194 |
|
T31 |
98 |
|
T32 |
61 |
| auto[0] |
auto[1] |
697195 |
1 |
|
|
T30 |
13565 |
|
T31 |
57 |
|
T32 |
27 |
| auto[1] |
auto[0] |
1061680 |
1 |
|
|
T30 |
21605 |
|
T31 |
85 |
|
T32 |
30 |
| auto[1] |
auto[1] |
687542 |
1 |
|
|
T30 |
13544 |
|
T31 |
19 |
|
T32 |
30 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2000162 |
1 |
|
|
T30 |
40884 |
|
T31 |
121 |
|
T32 |
74 |
| auto[1] |
1756648 |
1 |
|
|
T30 |
34024 |
|
T31 |
138 |
|
T32 |
74 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2359375 |
1 |
|
|
T30 |
47372 |
|
T31 |
203 |
|
T32 |
59 |
| auto[1] |
1397435 |
1 |
|
|
T30 |
27536 |
|
T31 |
56 |
|
T32 |
89 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1298842 |
1 |
|
|
T30 |
26818 |
|
T31 |
93 |
|
T32 |
30 |
| auto[0] |
auto[1] |
701320 |
1 |
|
|
T30 |
14066 |
|
T31 |
28 |
|
T32 |
44 |
| auto[1] |
auto[0] |
1060533 |
1 |
|
|
T30 |
20554 |
|
T31 |
110 |
|
T32 |
29 |
| auto[1] |
auto[1] |
696115 |
1 |
|
|
T30 |
13470 |
|
T31 |
28 |
|
T32 |
45 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2008878 |
1 |
|
|
T30 |
39840 |
|
T31 |
160 |
|
T32 |
68 |
| auto[1] |
1747932 |
1 |
|
|
T30 |
35068 |
|
T31 |
99 |
|
T32 |
80 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2368715 |
1 |
|
|
T30 |
48185 |
|
T31 |
201 |
|
T32 |
65 |
| auto[1] |
1388095 |
1 |
|
|
T30 |
26723 |
|
T31 |
58 |
|
T32 |
83 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1309166 |
1 |
|
|
T30 |
26442 |
|
T31 |
138 |
|
T32 |
28 |
| auto[0] |
auto[1] |
699712 |
1 |
|
|
T30 |
13398 |
|
T31 |
22 |
|
T32 |
40 |
| auto[1] |
auto[0] |
1059549 |
1 |
|
|
T30 |
21743 |
|
T31 |
63 |
|
T32 |
37 |
| auto[1] |
auto[1] |
688383 |
1 |
|
|
T30 |
13325 |
|
T31 |
36 |
|
T32 |
43 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2009472 |
1 |
|
|
T30 |
40228 |
|
T31 |
145 |
|
T32 |
74 |
| auto[1] |
1747338 |
1 |
|
|
T30 |
34680 |
|
T31 |
114 |
|
T32 |
74 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2370845 |
1 |
|
|
T30 |
47776 |
|
T31 |
194 |
|
T32 |
77 |
| auto[1] |
1385965 |
1 |
|
|
T30 |
27132 |
|
T31 |
65 |
|
T32 |
71 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1310039 |
1 |
|
|
T30 |
26497 |
|
T31 |
116 |
|
T32 |
37 |
| auto[0] |
auto[1] |
699433 |
1 |
|
|
T30 |
13731 |
|
T31 |
29 |
|
T32 |
37 |
| auto[1] |
auto[0] |
1060806 |
1 |
|
|
T30 |
21279 |
|
T31 |
78 |
|
T32 |
40 |
| auto[1] |
auto[1] |
686532 |
1 |
|
|
T30 |
13401 |
|
T31 |
36 |
|
T32 |
34 |