Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7927946 |
1 |
|
|
T30 |
124545 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5816577 |
1 |
|
|
T30 |
122276 |
|
T33 |
1229 |
|
T20 |
8 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11391249 |
1 |
|
|
T30 |
199747 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
2353274 |
1 |
|
|
T30 |
47074 |
|
T33 |
398 |
|
T20 |
14 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7876245 |
1 |
|
|
T30 |
123593 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5868278 |
1 |
|
|
T30 |
123228 |
|
T33 |
796 |
|
T20 |
17 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1774865 |
1 |
|
|
T30 |
38801 |
|
T33 |
181 |
|
T20 |
3 |
| auto[1] |
auto[0] |
auto[1] |
1185082 |
1 |
|
|
T30 |
24247 |
|
T33 |
164 |
|
T20 |
11 |
| auto[1] |
auto[1] |
auto[0] |
1740139 |
1 |
|
|
T30 |
37353 |
|
T33 |
217 |
|
T25 |
58 |
| auto[1] |
auto[1] |
auto[1] |
1168192 |
1 |
|
|
T30 |
22827 |
|
T33 |
234 |
|
T20 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |