Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7932368 |
1 |
|
|
T30 |
124076 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5812155 |
1 |
|
|
T30 |
122745 |
|
T33 |
1294 |
|
T20 |
9 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11411267 |
1 |
|
|
T30 |
198954 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
2333256 |
1 |
|
|
T30 |
47867 |
|
T33 |
704 |
|
T25 |
225 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7937121 |
1 |
|
|
T30 |
118732 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5807402 |
1 |
|
|
T30 |
128089 |
|
T33 |
1383 |
|
T20 |
13 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1738851 |
1 |
|
|
T30 |
41620 |
|
T33 |
326 |
|
T20 |
13 |
| auto[1] |
auto[0] |
auto[1] |
1173504 |
1 |
|
|
T30 |
24423 |
|
T33 |
333 |
|
T25 |
98 |
| auto[1] |
auto[1] |
auto[0] |
1735295 |
1 |
|
|
T30 |
38602 |
|
T33 |
353 |
|
T25 |
127 |
| auto[1] |
auto[1] |
auto[1] |
1159752 |
1 |
|
|
T30 |
23444 |
|
T33 |
371 |
|
T25 |
127 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |