Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7882290 |
1 |
|
|
T30 |
125417 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5862233 |
1 |
|
|
T30 |
121404 |
|
T33 |
1139 |
|
T20 |
15 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11396940 |
1 |
|
|
T30 |
198857 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
2347583 |
1 |
|
|
T30 |
47964 |
|
T33 |
572 |
|
T25 |
218 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7903205 |
1 |
|
|
T30 |
120506 |
|
T31 |
276 |
|
T32 |
268 |
| auto[1] |
5841318 |
1 |
|
|
T30 |
126315 |
|
T33 |
1100 |
|
T20 |
15 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1745906 |
1 |
|
|
T30 |
39590 |
|
T33 |
300 |
|
T20 |
15 |
| auto[1] |
auto[0] |
auto[1] |
1171865 |
1 |
|
|
T30 |
24207 |
|
T33 |
327 |
|
T25 |
133 |
| auto[1] |
auto[1] |
auto[0] |
1747829 |
1 |
|
|
T30 |
38761 |
|
T33 |
228 |
|
T25 |
86 |
| auto[1] |
auto[1] |
auto[1] |
1175718 |
1 |
|
|
T30 |
23757 |
|
T33 |
245 |
|
T25 |
85 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |