Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7550018 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
107 |
| auto[1] |
5626604 |
1 |
|
|
T24 |
99 |
|
T25 |
352862 |
|
T1 |
342 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10814361 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
177 |
| auto[1] |
2362261 |
1 |
|
|
T24 |
29 |
|
T25 |
134304 |
|
T1 |
389 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7547195 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
119 |
| auto[1] |
5629427 |
1 |
|
|
T24 |
87 |
|
T25 |
348388 |
|
T1 |
466 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1642605 |
1 |
|
|
T24 |
43 |
|
T25 |
104902 |
|
T1 |
44 |
| auto[1] |
auto[0] |
auto[1] |
1192993 |
1 |
|
|
T24 |
14 |
|
T25 |
66676 |
|
T1 |
220 |
| auto[1] |
auto[1] |
auto[0] |
1624561 |
1 |
|
|
T24 |
15 |
|
T25 |
109182 |
|
T1 |
33 |
| auto[1] |
auto[1] |
auto[1] |
1169268 |
1 |
|
|
T24 |
15 |
|
T25 |
67628 |
|
T1 |
169 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |