Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7511127 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
99 |
| auto[1] |
5665495 |
1 |
|
|
T24 |
107 |
|
T25 |
338270 |
|
T1 |
304 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10809592 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
160 |
| auto[1] |
2367030 |
1 |
|
|
T24 |
46 |
|
T25 |
130752 |
|
T1 |
306 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7555718 |
1 |
|
|
T22 |
31 |
|
T23 |
671 |
|
T24 |
118 |
| auto[1] |
5620904 |
1 |
|
|
T24 |
88 |
|
T25 |
338425 |
|
T1 |
369 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1626292 |
1 |
|
|
T24 |
22 |
|
T25 |
105149 |
|
T1 |
47 |
| auto[1] |
auto[0] |
auto[1] |
1186180 |
1 |
|
|
T24 |
23 |
|
T25 |
66399 |
|
T1 |
129 |
| auto[1] |
auto[1] |
auto[0] |
1627582 |
1 |
|
|
T24 |
20 |
|
T25 |
102524 |
|
T1 |
16 |
| auto[1] |
auto[1] |
auto[1] |
1180850 |
1 |
|
|
T24 |
23 |
|
T25 |
64353 |
|
T1 |
177 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |