Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7904192 |
1 |
|
|
T21 |
46 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
5858906 |
1 |
|
|
T21 |
36 |
|
T1 |
56 |
|
T12 |
338903 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11383305 |
1 |
|
|
T21 |
73 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
2379793 |
1 |
|
|
T21 |
9 |
|
T1 |
55 |
|
T12 |
125711 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7922160 |
1 |
|
|
T21 |
63 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
5840938 |
1 |
|
|
T21 |
19 |
|
T1 |
95 |
|
T12 |
342339 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1735771 |
1 |
|
|
T21 |
10 |
|
T1 |
29 |
|
T12 |
113903 |
| auto[1] |
auto[0] |
auto[1] |
1198816 |
1 |
|
|
T1 |
54 |
|
T12 |
65532 |
|
T13 |
9853 |
| auto[1] |
auto[1] |
auto[0] |
1725374 |
1 |
|
|
T1 |
11 |
|
T12 |
102725 |
|
T13 |
17043 |
| auto[1] |
auto[1] |
auto[1] |
1180977 |
1 |
|
|
T21 |
9 |
|
T1 |
1 |
|
T12 |
60179 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |