Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7904218 |
1 |
|
|
T21 |
52 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
5858880 |
1 |
|
|
T21 |
30 |
|
T1 |
77 |
|
T12 |
342985 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13009454 |
1 |
|
|
T21 |
82 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
753644 |
1 |
|
|
T12 |
42787 |
|
T13 |
6344 |
|
T15 |
35055 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7913972 |
1 |
|
|
T21 |
61 |
|
T24 |
1 |
|
T25 |
23163 |
| auto[1] |
5849126 |
1 |
|
|
T21 |
21 |
|
T1 |
11 |
|
T12 |
342666 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2549385 |
1 |
|
|
T21 |
12 |
|
T12 |
152532 |
|
T13 |
25254 |
| auto[1] |
auto[0] |
auto[1] |
376261 |
1 |
|
|
T12 |
21631 |
|
T13 |
3375 |
|
T15 |
17211 |
| auto[1] |
auto[1] |
auto[0] |
2546097 |
1 |
|
|
T21 |
9 |
|
T1 |
11 |
|
T12 |
147347 |
| auto[1] |
auto[1] |
auto[1] |
377383 |
1 |
|
|
T12 |
21156 |
|
T13 |
2969 |
|
T15 |
17844 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |