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Group Instance : masked_out_upper_mask_data_cov_obj_pin7
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin7

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin7
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin7
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin8
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin8

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin8
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin8
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin9
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin9

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin9
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin9
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0

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Group Instances:
masked_out_upper_mask_data_cov_obj_pin7
masked_out_upper_mask_data_cov_obj_pin8
masked_out_upper_mask_data_cov_obj_pin9

Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179004 1 T23 6 T24 10 T45 3
auto[1] 179593 1 T23 4 T24 13 T29 1


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179107 1 T23 5 T24 11 T45 4
auto[1] 179490 1 T23 5 T24 12 T29 1


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89255 1 T23 2 T24 5 T45 3
auto[0] auto[1] 89749 1 T23 4 T24 5 T31 5
auto[1] auto[0] 89852 1 T23 3 T24 6 T45 1
auto[1] auto[1] 89741 1 T23 1 T24 7 T29 1


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179467 1 T23 6 T24 14 T29 1
auto[1] 179130 1 T23 4 T24 9 T45 1


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178911 1 T23 7 T24 10 T29 1
auto[1] 179686 1 T23 3 T24 13 T45 2


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89463 1 T23 5 T24 5 T29 1
auto[0] auto[1] 90004 1 T23 1 T24 9 T45 2
auto[1] auto[0] 89448 1 T23 2 T24 5 T45 1
auto[1] auto[1] 89682 1 T23 2 T24 4 T31 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179234 1 T23 6 T24 10 T29 1
auto[1] 179363 1 T23 4 T24 13 T45 3


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179376 1 T23 8 T24 10 T45 2
auto[1] 179221 1 T23 2 T24 13 T29 1


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89774 1 T23 5 T24 6 T45 1
auto[0] auto[1] 89460 1 T23 1 T24 4 T29 1
auto[1] auto[0] 89602 1 T23 3 T24 4 T45 1
auto[1] auto[1] 89761 1 T23 1 T24 9 T45 2

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