Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12533367	1			T21	56149		T22	486		T23	69
all_values[1]	12533367	1			T21	56149		T22	486		T23	69
all_values[2]	12533367	1			T21	56149		T22	486		T23	69
all_values[3]	12533367	1			T21	56149		T22	486		T23	69
all_values[4]	12533367	1			T21	56149		T22	486		T23	69
all_values[5]	12533367	1			T21	56149		T22	486		T23	69
all_values[6]	12533367	1			T21	56149		T22	486		T23	69
all_values[7]	12533367	1			T21	56149		T22	486		T23	69
all_values[8]	12533367	1			T21	56149		T22	486		T23	69
all_values[9]	12533367	1			T21	56149		T22	486		T23	69
all_values[10]	12533367	1			T21	56149		T22	486		T23	69
all_values[11]	12533367	1			T21	56149		T22	486		T23	69
all_values[12]	12533367	1			T21	56149		T22	486		T23	69
all_values[13]	12533367	1			T21	56149		T22	486		T23	69
all_values[14]	12533367	1			T21	56149		T22	486		T23	69
all_values[15]	12533367	1			T21	56149		T22	486		T23	69
all_values[16]	12533367	1			T21	56149		T22	486		T23	69
all_values[17]	12533367	1			T21	56149		T22	486		T23	69
all_values[18]	12533367	1			T21	56149		T22	486		T23	69
all_values[19]	12533367	1			T21	56149		T22	486		T23	69
all_values[20]	12533367	1			T21	56149		T22	486		T23	69
all_values[21]	12533367	1			T21	56149		T22	486		T23	69
all_values[22]	12533367	1			T21	56149		T22	486		T23	69
all_values[23]	12533367	1			T21	56149		T22	486		T23	69
all_values[24]	12533367	1			T21	56149		T22	486		T23	69
all_values[25]	12533367	1			T21	56149		T22	486		T23	69
all_values[26]	12533367	1			T21	56149		T22	486		T23	69
all_values[27]	12533367	1			T21	56149		T22	486		T23	69
all_values[28]	12533367	1			T21	56149		T22	486		T23	69
all_values[29]	12533367	1			T21	56149		T22	486		T23	69
all_values[30]	12533367	1			T21	56149		T22	486		T23	69
all_values[31]	12533367	1			T21	56149		T22	486		T23	69

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

237181567

1

T21

179676

T22

15552

T23

2208

auto[1]

163886177

1

T24

1104

T25

38850

T27

1272

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

104545173

1

T21

179676

T22

15552

T23

2208

auto[1]

296522571

1

T24

1159

T25

69641

T27

1927

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

396812667

1

T21

179676

T22

15552

T23

2208

auto[1]

4255077

1

T24

222

T31

198

T44

2219

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2772228	1			T21	56149		T22	486		T23	69
all_values[0]	auto[0]	auto[0]	auto[1]	4584341	1			T24	17		T25	1086		T27	41
all_values[0]	auto[0]	auto[1]	auto[0]	489175	1			T24	18		T25	86		T27	5
all_values[0]	auto[0]	auto[1]	auto[1]	4554964	1			T24	15		T25	1129		T27	25
all_values[0]	auto[1]	auto[0]	auto[1]	66228	1			T24	3		T31	2		T44	26
all_values[0]	auto[1]	auto[1]	auto[1]	66431	1			T24	2		T31	1		T44	39
all_values[1]	auto[0]	auto[0]	auto[0]	2762022	1			T21	56149		T22	486		T23	69
all_values[1]	auto[0]	auto[0]	auto[1]	4562723	1			T24	30		T25	1001		T27	37
all_values[1]	auto[0]	auto[1]	auto[0]	496383	1			T24	6		T25	101		T27	3
all_values[1]	auto[0]	auto[1]	auto[1]	4579219	1			T24	2		T25	1171		T27	28
all_values[1]	auto[1]	auto[0]	auto[1]	66524	1			T24	7		T31	1		T44	29
all_values[1]	auto[1]	auto[1]	auto[1]	66496	1			T31	4		T44	47		T105	16
all_values[2]	auto[0]	auto[0]	auto[0]	2761742	1			T21	56149		T22	486		T23	69
all_values[2]	auto[0]	auto[0]	auto[1]	4577547	1			T24	16		T25	1069		T27	17
all_values[2]	auto[0]	auto[1]	auto[0]	502250	1			T24	31		T25	105		T27	14
all_values[2]	auto[0]	auto[1]	auto[1]	4558749	1			T24	10		T25	1083		T27	28
all_values[2]	auto[1]	auto[0]	auto[1]	66674	1			T24	2		T31	5		T44	29
all_values[2]	auto[1]	auto[1]	auto[1]	66405	1			T24	3		T31	1		T44	45
all_values[3]	auto[0]	auto[0]	auto[0]	2771665	1			T21	56149		T22	486		T23	69
all_values[3]	auto[0]	auto[0]	auto[1]	4572957	1			T24	21		T25	1129		T27	48
all_values[3]	auto[0]	auto[1]	auto[0]	495426	1			T24	28		T25	123		T27	5
all_values[3]	auto[0]	auto[1]	auto[1]	4560016	1			T24	10		T25	1030		T27	24
all_values[3]	auto[1]	auto[0]	auto[1]	67007	1			T24	5		T31	6		T44	26
all_values[3]	auto[1]	auto[1]	auto[1]	66296	1			T24	3		T31	2		T44	40
all_values[4]	auto[0]	auto[0]	auto[0]	2769403	1			T21	56149		T22	486		T23	69
all_values[4]	auto[0]	auto[0]	auto[1]	4625904	1			T24	24		T25	965		T27	29
all_values[4]	auto[0]	auto[1]	auto[0]	495041	1			T24	31		T25	87		T27	11
all_values[4]	auto[0]	auto[1]	auto[1]	4510231	1			T24	7		T25	1228		T27	29
all_values[4]	auto[1]	auto[0]	auto[1]	66875	1			T24	7		T31	2		T44	45
all_values[4]	auto[1]	auto[1]	auto[1]	65913	1			T24	2		T31	3		T44	29
all_values[5]	auto[0]	auto[0]	auto[0]	2766200	1			T21	56149		T22	486		T23	69
all_values[5]	auto[0]	auto[0]	auto[1]	4585122	1			T24	25		T25	1045		T27	30
all_values[5]	auto[0]	auto[1]	auto[0]	492721	1			T24	22		T25	163		T27	17
all_values[5]	auto[0]	auto[1]	auto[1]	4555847	1			T24	6		T25	1088		T27	23
all_values[5]	auto[1]	auto[0]	auto[1]	66785	1			T24	8		T31	7		T44	27
all_values[5]	auto[1]	auto[1]	auto[1]	66692	1			T24	3		T31	1		T44	40
all_values[6]	auto[0]	auto[0]	auto[0]	2769408	1			T21	56149		T22	486		T23	69
all_values[6]	auto[0]	auto[0]	auto[1]	4568770	1			T24	18		T25	1287		T27	35
all_values[6]	auto[0]	auto[1]	auto[0]	499404	1			T24	23		T25	87		T27	15
all_values[6]	auto[0]	auto[1]	auto[1]	4562418	1			T24	10		T25	897		T27	24
all_values[6]	auto[1]	auto[0]	auto[1]	67011	1			T24	2		T31	3		T44	30
all_values[6]	auto[1]	auto[1]	auto[1]	66356	1			T24	2		T31	2		T44	43
all_values[7]	auto[0]	auto[0]	auto[0]	2775617	1			T21	56149		T22	486		T23	69
all_values[7]	auto[0]	auto[0]	auto[1]	4568125	1			T24	11		T25	1135		T27	26
all_values[7]	auto[0]	auto[1]	auto[0]	499637	1			T24	38		T25	136		T27	17
all_values[7]	auto[0]	auto[1]	auto[1]	4556967	1			T24	12		T25	994		T27	31
all_values[7]	auto[1]	auto[0]	auto[1]	66909	1			T24	4		T31	6		T44	43
all_values[7]	auto[1]	auto[1]	auto[1]	66112	1			T24	4		T31	3		T44	34
all_values[8]	auto[0]	auto[0]	auto[0]	2775202	1			T21	56149		T22	486		T23	69
all_values[8]	auto[0]	auto[0]	auto[1]	4551259	1			T24	29		T25	1201		T27	12
all_values[8]	auto[0]	auto[1]	auto[0]	497940	1			T24	14		T25	95		T27	17
all_values[8]	auto[0]	auto[1]	auto[1]	4575895	1			T25	996		T27	35		T30	16
all_values[8]	auto[1]	auto[0]	auto[1]	66695	1			T24	7		T31	5		T44	35
all_values[8]	auto[1]	auto[1]	auto[1]	66376	1			T31	1		T44	36		T105	9
all_values[9]	auto[0]	auto[0]	auto[0]	2768683	1			T21	56149		T22	486		T23	69
all_values[9]	auto[0]	auto[0]	auto[1]	4581748	1			T24	13		T25	1143		T27	22
all_values[9]	auto[0]	auto[1]	auto[0]	498021	1			T24	31		T25	93		T27	7
all_values[9]	auto[0]	auto[1]	auto[1]	4551563	1			T24	10		T25	1015		T27	49
all_values[9]	auto[1]	auto[0]	auto[1]	67124	1			T24	5		T31	5		T44	31
all_values[9]	auto[1]	auto[1]	auto[1]	66228	1			T24	1		T31	4		T44	35
all_values[10]	auto[0]	auto[0]	auto[0]	2767955	1			T21	56149		T22	486		T23	69
all_values[10]	auto[0]	auto[0]	auto[1]	4603918	1			T24	21		T25	999		T27	32
all_values[10]	auto[0]	auto[1]	auto[0]	495982	1			T24	22		T25	126		T27	20
all_values[10]	auto[0]	auto[1]	auto[1]	4532966	1			T24	11		T25	1166		T27	23
all_values[10]	auto[1]	auto[0]	auto[1]	66501	1			T24	5		T31	3		T44	35
all_values[10]	auto[1]	auto[1]	auto[1]	66045	1			T24	2		T31	3		T44	38
all_values[11]	auto[0]	auto[0]	auto[0]	2770761	1			T21	56149		T22	486		T23	69
all_values[11]	auto[0]	auto[0]	auto[1]	4540000	1			T24	19		T25	1329		T27	42
all_values[11]	auto[0]	auto[1]	auto[0]	503548	1			T24	32		T25	185		T27	5
all_values[11]	auto[0]	auto[1]	auto[1]	4586334	1			T24	10		T25	791		T27	19
all_values[11]	auto[1]	auto[0]	auto[1]	66437	1			T24	6		T31	5		T44	26
all_values[11]	auto[1]	auto[1]	auto[1]	66287	1			T24	2		T31	2		T44	35
all_values[12]	auto[0]	auto[0]	auto[0]	2767598	1			T21	56149		T22	486		T23	69
all_values[12]	auto[0]	auto[0]	auto[1]	4569412	1			T24	15		T25	982		T27	19
all_values[12]	auto[0]	auto[1]	auto[0]	494879	1			T24	22		T25	123		T27	19
all_values[12]	auto[0]	auto[1]	auto[1]	4568383	1			T24	3		T25	1135		T27	30
all_values[12]	auto[1]	auto[0]	auto[1]	66489	1			T24	6		T31	3		T44	32
all_values[12]	auto[1]	auto[1]	auto[1]	66606	1			T24	1		T31	3		T44	34
all_values[13]	auto[0]	auto[0]	auto[0]	2769204	1			T21	56149		T22	486		T23	69
all_values[13]	auto[0]	auto[0]	auto[1]	4580361	1			T24	21		T25	1240		T27	34
all_values[13]	auto[0]	auto[1]	auto[0]	495517	1			T24	18		T25	97		T27	7
all_values[13]	auto[0]	auto[1]	auto[1]	4555610	1			T24	7		T25	939		T27	24
all_values[13]	auto[1]	auto[0]	auto[1]	66409	1			T24	7		T31	3		T44	31
all_values[13]	auto[1]	auto[1]	auto[1]	66266	1			T24	3		T31	1		T44	41
all_values[14]	auto[0]	auto[0]	auto[0]	2775223	1			T21	56149		T22	486		T23	69
all_values[14]	auto[0]	auto[0]	auto[1]	4575536	1			T24	23		T25	1034		T27	28
all_values[14]	auto[0]	auto[1]	auto[0]	498450	1			T24	18		T25	137		T27	15
all_values[14]	auto[0]	auto[1]	auto[1]	4551310	1			T24	11		T25	1109		T27	29
all_values[14]	auto[1]	auto[0]	auto[1]	66641	1			T24	5		T31	3		T44	35
all_values[14]	auto[1]	auto[1]	auto[1]	66207	1			T24	1		T31	3		T44	34
all_values[15]	auto[0]	auto[0]	auto[0]	2774174	1			T21	56149		T22	486		T23	69
all_values[15]	auto[0]	auto[0]	auto[1]	4585041	1			T24	23		T25	1395		T27	38
all_values[15]	auto[0]	auto[1]	auto[0]	503038	1			T24	30		T25	102		T27	12
all_values[15]	auto[0]	auto[1]	auto[1]	4538251	1			T24	7		T25	825		T27	19
all_values[15]	auto[1]	auto[0]	auto[1]	66621	1			T24	7		T31	3		T44	44
all_values[15]	auto[1]	auto[1]	auto[1]	66242	1			T24	2		T31	2		T44	31
all_values[16]	auto[0]	auto[0]	auto[0]	2779470	1			T21	56149		T22	486		T23	69
all_values[16]	auto[0]	auto[0]	auto[1]	4584086	1			T24	23		T25	1061		T27	45
all_values[16]	auto[0]	auto[1]	auto[0]	496964	1			T24	17		T25	80		T27	7
all_values[16]	auto[0]	auto[1]	auto[1]	4539912	1			T24	9		T25	1156		T27	23
all_values[16]	auto[1]	auto[0]	auto[1]	67087	1			T24	8		T31	6		T44	34
all_values[16]	auto[1]	auto[1]	auto[1]	65848	1			T24	1		T31	2		T44	26
all_values[17]	auto[0]	auto[0]	auto[0]	2771375	1			T21	56149		T22	486		T23	69
all_values[17]	auto[0]	auto[0]	auto[1]	4560373	1			T24	13		T25	1020		T27	24
all_values[17]	auto[0]	auto[1]	auto[0]	489263	1			T24	26		T25	136		T27	15
all_values[17]	auto[0]	auto[1]	auto[1]	4579430	1			T24	12		T25	1093		T27	25
all_values[17]	auto[1]	auto[0]	auto[1]	66638	1			T24	2		T31	4		T44	32
all_values[17]	auto[1]	auto[1]	auto[1]	66288	1			T24	5		T31	3		T44	33
all_values[18]	auto[0]	auto[0]	auto[0]	2765604	1			T21	56149		T22	486		T23	69
all_values[18]	auto[0]	auto[0]	auto[1]	4570727	1			T24	23		T25	982		T27	8
all_values[18]	auto[0]	auto[1]	auto[0]	500899	1			T24	24		T25	89		T27	3
all_values[18]	auto[0]	auto[1]	auto[1]	4563043	1			T24	7		T25	1203		T27	67
all_values[18]	auto[1]	auto[0]	auto[1]	66888	1			T24	4		T31	4		T44	46
all_values[18]	auto[1]	auto[1]	auto[1]	66206	1			T24	2		T31	2		T44	30
all_values[19]	auto[0]	auto[0]	auto[0]	2770481	1			T21	56149		T22	486		T23	69
all_values[19]	auto[0]	auto[0]	auto[1]	4571461	1			T24	29		T25	1113		T27	16
all_values[19]	auto[0]	auto[1]	auto[0]	496009	1			T24	20		T25	125		T27	12
all_values[19]	auto[0]	auto[1]	auto[1]	4562661	1			T25	1007		T27	45		T30	24
all_values[19]	auto[1]	auto[0]	auto[1]	66506	1			T24	5		T31	4		T44	34
all_values[19]	auto[1]	auto[1]	auto[1]	66249	1			T31	3		T44	32		T105	8
all_values[20]	auto[0]	auto[0]	auto[0]	2769683	1			T21	56149		T22	486		T23	69
all_values[20]	auto[0]	auto[0]	auto[1]	4561825	1			T24	8		T25	752		T27	34
all_values[20]	auto[0]	auto[1]	auto[0]	500381	1			T24	30		T25	89		T27	23
all_values[20]	auto[0]	auto[1]	auto[1]	4568802	1			T24	16		T25	1479		T27	20
all_values[20]	auto[1]	auto[0]	auto[1]	66801	1			T24	3		T31	4		T44	40
all_values[20]	auto[1]	auto[1]	auto[1]	65875	1			T24	3		T31	3		T44	29
all_values[21]	auto[0]	auto[0]	auto[0]	2770063	1			T21	56149		T22	486		T23	69
all_values[21]	auto[0]	auto[0]	auto[1]	4577066	1			T24	23		T25	1174		T27	27
all_values[21]	auto[0]	auto[1]	auto[0]	498454	1			T24	20		T25	69		T27	8
all_values[21]	auto[0]	auto[1]	auto[1]	4554346	1			T24	15		T25	1052		T27	23
all_values[21]	auto[1]	auto[0]	auto[1]	66907	1			T24	6		T31	4		T44	28
all_values[21]	auto[1]	auto[1]	auto[1]	66531	1			T24	1		T31	3		T44	39
all_values[22]	auto[0]	auto[0]	auto[0]	2772262	1			T21	56149		T22	486		T23	69
all_values[22]	auto[0]	auto[0]	auto[1]	4559476	1			T24	25		T25	1053		T27	50
all_values[22]	auto[0]	auto[1]	auto[0]	492536	1			T24	26		T25	99		T27	1
all_values[22]	auto[0]	auto[1]	auto[1]	4576209	1			T24	13		T25	1113		T27	25
all_values[22]	auto[1]	auto[0]	auto[1]	67345	1			T24	5		T31	2		T44	45
all_values[22]	auto[1]	auto[1]	auto[1]	65539	1			T24	4		T31	4		T44	28
all_values[23]	auto[0]	auto[0]	auto[0]	2776559	1			T21	56149		T22	486		T23	69
all_values[23]	auto[0]	auto[0]	auto[1]	4583566	1			T24	12		T25	920		T27	36
all_values[23]	auto[0]	auto[1]	auto[0]	490689	1			T24	28		T25	82		T27	12
all_values[23]	auto[0]	auto[1]	auto[1]	4549367	1			T24	15		T25	1314		T27	26
all_values[23]	auto[1]	auto[0]	auto[1]	67323	1			T24	1		T31	4		T44	27
all_values[23]	auto[1]	auto[1]	auto[1]	65863	1			T24	2		T31	4		T44	45
all_values[24]	auto[0]	auto[0]	auto[0]	2763619	1			T21	56149		T22	486		T23	69
all_values[24]	auto[0]	auto[0]	auto[1]	4592696	1			T24	10		T25	739		T27	32
all_values[24]	auto[0]	auto[1]	auto[0]	497188	1			T24	21		T25	138		T61	38
all_values[24]	auto[0]	auto[1]	auto[1]	4547001	1			T24	12		T25	1309		T27	46
all_values[24]	auto[1]	auto[0]	auto[1]	66530	1			T24	2		T31	2		T44	43
all_values[24]	auto[1]	auto[1]	auto[1]	66333	1			T24	3		T31	3		T44	35
all_values[25]	auto[0]	auto[0]	auto[0]	2772478	1			T21	56149		T22	486		T23	69
all_values[25]	auto[0]	auto[0]	auto[1]	4547474	1			T24	28		T25	1158		T27	45
all_values[25]	auto[0]	auto[1]	auto[0]	496512	1			T24	8		T25	127		T27	9
all_values[25]	auto[0]	auto[1]	auto[1]	4584295	1			T24	10		T25	1051		T27	24
all_values[25]	auto[1]	auto[0]	auto[1]	66461	1			T24	9		T31	4		T44	33
all_values[25]	auto[1]	auto[1]	auto[1]	66147	1			T24	1		T31	3		T44	35
all_values[26]	auto[0]	auto[0]	auto[0]	2769039	1			T21	56149		T22	486		T23	69
all_values[26]	auto[0]	auto[0]	auto[1]	4547322	1			T24	17		T25	927		T27	20
all_values[26]	auto[0]	auto[1]	auto[0]	498708	1			T24	27		T25	89		T27	32
all_values[26]	auto[0]	auto[1]	auto[1]	4584716	1			T24	21		T25	1294		T27	13
all_values[26]	auto[1]	auto[0]	auto[1]	67051	1			T24	3		T31	3		T44	34
all_values[26]	auto[1]	auto[1]	auto[1]	66531	1			T24	2		T31	2		T44	34
all_values[27]	auto[0]	auto[0]	auto[0]	2766039	1			T21	56149		T22	486		T23	69
all_values[27]	auto[0]	auto[0]	auto[1]	4598214	1			T24	23		T25	998		T27	41
all_values[27]	auto[0]	auto[1]	auto[0]	495107	1			T24	26		T25	62		T27	3
all_values[27]	auto[0]	auto[1]	auto[1]	4541097	1			T24	15		T25	1229		T27	32
all_values[27]	auto[1]	auto[0]	auto[1]	66922	1			T24	5		T31	4		T44	41
all_values[27]	auto[1]	auto[1]	auto[1]	65988	1			T24	3		T31	3		T44	20
all_values[28]	auto[0]	auto[0]	auto[0]	2771604	1			T21	56149		T22	486		T23	69
all_values[28]	auto[0]	auto[0]	auto[1]	4568265	1			T24	26		T25	1085		T27	40
all_values[28]	auto[0]	auto[1]	auto[0]	496685	1			T24	12		T25	55		T27	6
all_values[28]	auto[0]	auto[1]	auto[1]	4563887	1			T24	8		T25	1141		T27	32
all_values[28]	auto[1]	auto[0]	auto[1]	66847	1			T24	7		T31	2		T44	31
all_values[28]	auto[1]	auto[1]	auto[1]	66079	1			T24	1		T31	2		T44	36
all_values[29]	auto[0]	auto[0]	auto[0]	2774845	1			T21	56149		T22	486		T23	69
all_values[29]	auto[0]	auto[0]	auto[1]	4557585	1			T24	2		T25	1024		T27	50
all_values[29]	auto[0]	auto[1]	auto[0]	492935	1			T24	23		T25	58		T27	3
all_values[29]	auto[0]	auto[1]	auto[1]	4575410	1			T24	11		T25	1236		T27	18
all_values[29]	auto[1]	auto[0]	auto[1]	66841	1			T24	3		T31	4		T44	43
all_values[29]	auto[1]	auto[1]	auto[1]	65751	1			T24	3		T31	2		T44	24
all_values[30]	auto[0]	auto[0]	auto[0]	2769643	1			T21	56149		T22	486		T23	69
all_values[30]	auto[0]	auto[0]	auto[1]	4573678	1			T24	16		T25	1153		T27	20
all_values[30]	auto[0]	auto[1]	auto[0]	502291	1			T24	34		T25	114		T27	28
all_values[30]	auto[0]	auto[1]	auto[1]	4555084	1			T24	6		T25	1016		T27	26
all_values[30]	auto[1]	auto[0]	auto[1]	66598	1			T24	6		T31	6		T44	37
all_values[30]	auto[1]	auto[1]	auto[1]	66073	1			T44	35		T105	6		T1	6
all_values[31]	auto[0]	auto[0]	auto[0]	2770696	1			T21	56149		T22	486		T23	69
all_values[31]	auto[0]	auto[0]	auto[1]	4607340	1			T24	29		T25	990		T27	38
all_values[31]	auto[0]	auto[1]	auto[0]	492595	1			T24	12		T25	140		T27	10
all_values[31]	auto[0]	auto[1]	auto[1]	4529593	1			T24	3		T25	1163		T27	26
all_values[31]	auto[1]	auto[0]	auto[1]	67429	1			T24	5		T31	1		T44	36
all_values[31]	auto[1]	auto[1]	auto[1]	65714	1			T31	3		T44	29		T105	9

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal