Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2216882 |
1 |
|
|
T24 |
11 |
|
T25 |
457 |
|
T27 |
19 |
| auto[1] |
auto[0] |
auto[1] |
326802 |
1 |
|
|
T25 |
123 |
|
T61 |
100 |
|
T31 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2250853 |
1 |
|
|
T24 |
22 |
|
T25 |
508 |
|
T27 |
17 |
| auto[1] |
auto[1] |
auto[1] |
332078 |
1 |
|
|
T24 |
1 |
|
T25 |
135 |
|
T61 |
45 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |