Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	17465001	1			T21	806		T22	265		T23	6151
all_values[1]	17465001	1			T21	806		T22	265		T23	6151
all_values[2]	17465001	1			T21	806		T22	265		T23	6151
all_values[3]	17465001	1			T21	806		T22	265		T23	6151
all_values[4]	17465001	1			T21	806		T22	265		T23	6151
all_values[5]	17465001	1			T21	806		T22	265		T23	6151
all_values[6]	17465001	1			T21	806		T22	265		T23	6151
all_values[7]	17465001	1			T21	806		T22	265		T23	6151
all_values[8]	17465001	1			T21	806		T22	265		T23	6151
all_values[9]	17465001	1			T21	806		T22	265		T23	6151
all_values[10]	17465001	1			T21	806		T22	265		T23	6151
all_values[11]	17465001	1			T21	806		T22	265		T23	6151
all_values[12]	17465001	1			T21	806		T22	265		T23	6151
all_values[13]	17465001	1			T21	806		T22	265		T23	6151
all_values[14]	17465001	1			T21	806		T22	265		T23	6151
all_values[15]	17465001	1			T21	806		T22	265		T23	6151
all_values[16]	17465001	1			T21	806		T22	265		T23	6151
all_values[17]	17465001	1			T21	806		T22	265		T23	6151
all_values[18]	17465001	1			T21	806		T22	265		T23	6151
all_values[19]	17465001	1			T21	806		T22	265		T23	6151
all_values[20]	17465001	1			T21	806		T22	265		T23	6151
all_values[21]	17465001	1			T21	806		T22	265		T23	6151
all_values[22]	17465001	1			T21	806		T22	265		T23	6151
all_values[23]	17465001	1			T21	806		T22	265		T23	6151
all_values[24]	17465001	1			T21	806		T22	265		T23	6151
all_values[25]	17465001	1			T21	806		T22	265		T23	6151
all_values[26]	17465001	1			T21	806		T22	265		T23	6151
all_values[27]	17465001	1			T21	806		T22	265		T23	6151
all_values[28]	17465001	1			T21	806		T22	265		T23	6151
all_values[29]	17465001	1			T21	806		T22	265		T23	6151
all_values[30]	17465001	1			T21	806		T22	265		T23	6151
all_values[31]	17465001	1			T21	806		T22	265		T23	6151

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

318342026

1

T21

25792

T22

8480

T23

196832

auto[1]

240538006

1

T24

14832

T29

42837

T31

462478

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

124273389

1

T21

25792

T22

8480

T23

196832

auto[1]

434606643

1

T24

27055

T29

75737

T31

838594

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

552518892

1

T21

25792

T22

8480

T23

196832

auto[1]

6361140

1

T29

3124

T31

131732

T32

6554

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	3153225	1			T21	806		T22	265		T23	6151
all_values[0]	auto[0]	auto[0]	auto[1]	6672911	1			T24	600		T29	1058		T31	127327
all_values[0]	auto[0]	auto[1]	auto[0]	732377	1			T24	83		T29	153		T31	12831
all_values[0]	auto[0]	auto[1]	auto[1]	6707905	1			T24	208		T29	1226		T31	131411
all_values[0]	auto[1]	auto[0]	auto[1]	99361	1			T29	56		T31	2172		T32	87
all_values[0]	auto[1]	auto[1]	auto[1]	99222	1			T29	44		T31	2037		T32	112
all_values[1]	auto[0]	auto[0]	auto[0]	3151380	1			T21	806		T22	265		T23	6151
all_values[1]	auto[0]	auto[0]	auto[1]	6717741	1			T24	492		T29	885		T31	133816
all_values[1]	auto[0]	auto[1]	auto[0]	728858	1			T24	43		T29	133		T31	14460
all_values[1]	auto[0]	auto[1]	auto[1]	6668018	1			T24	368		T29	1396		T31	124530
all_values[1]	auto[1]	auto[0]	auto[1]	99673	1			T29	46		T31	2064		T32	88
all_values[1]	auto[1]	auto[1]	auto[1]	99331	1			T29	50		T31	2013		T32	129
all_values[2]	auto[0]	auto[0]	auto[0]	3145790	1			T21	806		T22	265		T23	6151
all_values[2]	auto[0]	auto[0]	auto[1]	6707404	1			T24	483		T29	1314		T31	132577
all_values[2]	auto[0]	auto[1]	auto[0]	731063	1			T24	18		T29	129		T31	14824
all_values[2]	auto[0]	auto[1]	auto[1]	6682126	1			T24	391		T29	916		T31	124776
all_values[2]	auto[1]	auto[0]	auto[1]	99234	1			T29	50		T31	2012		T32	96
all_values[2]	auto[1]	auto[1]	auto[1]	99384	1			T29	37		T31	2117		T32	81
all_values[3]	auto[0]	auto[0]	auto[0]	3151141	1			T21	806		T22	265		T23	6151
all_values[3]	auto[0]	auto[0]	auto[1]	6682466	1			T24	428		T29	1346		T31	125818
all_values[3]	auto[0]	auto[1]	auto[0]	728172	1			T24	34		T29	184		T31	13345
all_values[3]	auto[0]	auto[1]	auto[1]	6704972	1			T24	439		T29	939		T31	131019
all_values[3]	auto[1]	auto[0]	auto[1]	99065	1			T29	65		T31	2050		T32	80
all_values[3]	auto[1]	auto[1]	auto[1]	99185	1			T29	30		T31	2026		T32	126
all_values[4]	auto[0]	auto[0]	auto[0]	3141159	1			T21	806		T22	265		T23	6151
all_values[4]	auto[0]	auto[0]	auto[1]	6679676	1			T24	540		T29	1024		T31	131668
all_values[4]	auto[0]	auto[1]	auto[0]	740067	1			T24	6		T29	134		T31	13396
all_values[4]	auto[0]	auto[1]	auto[1]	6705824	1			T24	357		T29	1248		T31	127721
all_values[4]	auto[1]	auto[0]	auto[1]	99655	1			T29	41		T31	2048		T32	86
all_values[4]	auto[1]	auto[1]	auto[1]	98620	1			T29	46		T31	2043		T32	110
all_values[5]	auto[0]	auto[0]	auto[0]	3149826	1			T21	806		T22	265		T23	6151
all_values[5]	auto[0]	auto[0]	auto[1]	6660021	1			T24	310		T29	1172		T31	127554
all_values[5]	auto[0]	auto[1]	auto[0]	753362	1			T24	18		T29	175		T31	14870
all_values[5]	auto[0]	auto[1]	auto[1]	6702987	1			T24	524		T29	1144		T31	129108
all_values[5]	auto[1]	auto[0]	auto[1]	99281	1			T29	56		T31	2070		T32	100
all_values[5]	auto[1]	auto[1]	auto[1]	99524	1			T29	57		T31	1992		T32	111
all_values[6]	auto[0]	auto[0]	auto[0]	3145386	1			T21	806		T22	265		T23	6151
all_values[6]	auto[0]	auto[0]	auto[1]	6738605	1			T24	470		T29	1170		T31	133886
all_values[6]	auto[0]	auto[1]	auto[0]	724696	1			T24	37		T29	149		T31	13417
all_values[6]	auto[0]	auto[1]	auto[1]	6657305	1			T24	340		T29	1095		T31	125793
all_values[6]	auto[1]	auto[0]	auto[1]	100545	1			T29	45		T31	2081		T32	102
all_values[6]	auto[1]	auto[1]	auto[1]	98464	1			T29	42		T31	2058		T32	104
all_values[7]	auto[0]	auto[0]	auto[0]	3155673	1			T21	806		T22	265		T23	6151
all_values[7]	auto[0]	auto[0]	auto[1]	6694695	1			T24	383		T29	1178		T31	130150
all_values[7]	auto[0]	auto[1]	auto[0]	734786	1			T24	28		T29	158		T31	15089
all_values[7]	auto[0]	auto[1]	auto[1]	6680691	1			T24	504		T29	1133		T31	127318
all_values[7]	auto[1]	auto[0]	auto[1]	100156	1			T29	59		T31	2084		T32	136
all_values[7]	auto[1]	auto[1]	auto[1]	99000	1			T29	49		T31	2034		T32	72
all_values[8]	auto[0]	auto[0]	auto[0]	3141683	1			T21	806		T22	265		T23	6151
all_values[8]	auto[0]	auto[0]	auto[1]	6702364	1			T24	475		T29	1168		T31	131216
all_values[8]	auto[0]	auto[1]	auto[0]	736655	1			T24	20		T29	91		T31	13986
all_values[8]	auto[0]	auto[1]	auto[1]	6685621	1			T24	346		T29	1179		T31	127331
all_values[8]	auto[1]	auto[0]	auto[1]	99128	1			T29	52		T31	2151		T32	100
all_values[8]	auto[1]	auto[1]	auto[1]	99550	1			T29	54		T31	2016		T32	102
all_values[9]	auto[0]	auto[0]	auto[0]	3153280	1			T21	806		T22	265		T23	6151
all_values[9]	auto[0]	auto[0]	auto[1]	6690646	1			T24	338		T29	1198		T31	127128
all_values[9]	auto[0]	auto[1]	auto[0]	742657	1			T24	87		T29	217		T31	13739
all_values[9]	auto[0]	auto[1]	auto[1]	6679507	1			T24	440		T29	909		T31	131010
all_values[9]	auto[1]	auto[0]	auto[1]	99923	1			T29	58		T31	1966		T32	96
all_values[9]	auto[1]	auto[1]	auto[1]	98988	1			T29	43		T31	2118		T32	103
all_values[10]	auto[0]	auto[0]	auto[0]	3157644	1			T21	806		T22	265		T23	6151
all_values[10]	auto[0]	auto[0]	auto[1]	6720587	1			T24	411		T29	1418		T31	136314
all_values[10]	auto[0]	auto[1]	auto[0]	737292	1			T24	30		T29	121		T31	12795
all_values[10]	auto[0]	auto[1]	auto[1]	6650531	1			T24	457		T29	896		T31	123478
all_values[10]	auto[1]	auto[0]	auto[1]	99444	1			T29	65		T31	2122		T32	119
all_values[10]	auto[1]	auto[1]	auto[1]	99503	1			T29	41		T31	2082		T32	84
all_values[11]	auto[0]	auto[0]	auto[0]	3141942	1			T21	806		T22	265		T23	6151
all_values[11]	auto[0]	auto[0]	auto[1]	6694502	1			T24	462		T29	975		T31	127117
all_values[11]	auto[0]	auto[1]	auto[0]	738022	1			T24	38		T29	149		T31	15555
all_values[11]	auto[0]	auto[1]	auto[1]	6691915	1			T24	350		T29	1295		T31	130167
all_values[11]	auto[1]	auto[0]	auto[1]	99453	1			T29	40		T31	1977		T32	109
all_values[11]	auto[1]	auto[1]	auto[1]	99167	1			T29	61		T31	2128		T32	105
all_values[12]	auto[0]	auto[0]	auto[0]	3153377	1			T21	806		T22	265		T23	6151
all_values[12]	auto[0]	auto[0]	auto[1]	6732054	1			T24	310		T29	920		T31	131480
all_values[12]	auto[0]	auto[1]	auto[0]	732833	1			T24	72		T29	238		T31	13639
all_values[12]	auto[0]	auto[1]	auto[1]	6648041	1			T24	515		T29	1219		T31	127805
all_values[12]	auto[1]	auto[0]	auto[1]	99777	1			T29	40		T31	1990		T32	90
all_values[12]	auto[1]	auto[1]	auto[1]	98919	1			T29	62		T31	2158		T32	107
all_values[13]	auto[0]	auto[0]	auto[0]	3149837	1			T21	806		T22	265		T23	6151
all_values[13]	auto[0]	auto[0]	auto[1]	6657967	1			T24	456		T29	1259		T31	125504
all_values[13]	auto[0]	auto[1]	auto[0]	728066	1			T24	7		T29	213		T31	14492
all_values[13]	auto[0]	auto[1]	auto[1]	6729946	1			T24	415		T29	882		T31	132250
all_values[13]	auto[1]	auto[0]	auto[1]	99895	1			T29	57		T31	2064		T32	116
all_values[13]	auto[1]	auto[1]	auto[1]	99290	1			T29	39		T31	2036		T32	95
all_values[14]	auto[0]	auto[0]	auto[0]	3149090	1			T21	806		T22	265		T23	6151
all_values[14]	auto[0]	auto[0]	auto[1]	6701736	1			T24	197		T29	1199		T31	126872
all_values[14]	auto[0]	auto[1]	auto[0]	728483	1			T24	35		T29	177		T31	13693
all_values[14]	auto[0]	auto[1]	auto[1]	6686789	1			T24	685		T29	1025		T31	131288
all_values[14]	auto[1]	auto[0]	auto[1]	100036	1			T29	52		T31	2064		T32	93
all_values[14]	auto[1]	auto[1]	auto[1]	98867	1			T29	51		T31	2056		T32	113
all_values[15]	auto[0]	auto[0]	auto[0]	3155450	1			T21	806		T22	265		T23	6151
all_values[15]	auto[0]	auto[0]	auto[1]	6697955	1			T24	479		T29	924		T31	125592
all_values[15]	auto[0]	auto[1]	auto[0]	731514	1			T24	48		T29	223		T31	14150
all_values[15]	auto[0]	auto[1]	auto[1]	6681555	1			T24	371		T29	1271		T31	132025
all_values[15]	auto[1]	auto[0]	auto[1]	99618	1			T29	36		T31	2083		T32	114
all_values[15]	auto[1]	auto[1]	auto[1]	98909	1			T29	64		T31	2033		T32	78
all_values[16]	auto[0]	auto[0]	auto[0]	3140809	1			T21	806		T22	265		T23	6151
all_values[16]	auto[0]	auto[0]	auto[1]	6670267	1			T24	461		T29	1139		T31	132073
all_values[16]	auto[0]	auto[1]	auto[0]	745124	1			T24	36		T29	141		T31	15289
all_values[16]	auto[0]	auto[1]	auto[1]	6710096	1			T24	404		T29	1138		T31	125417
all_values[16]	auto[1]	auto[0]	auto[1]	99655	1			T29	29		T31	1986		T32	114
all_values[16]	auto[1]	auto[1]	auto[1]	99050	1			T29	54		T31	2151		T32	113
all_values[17]	auto[0]	auto[0]	auto[0]	3143428	1			T21	806		T22	265		T23	6151
all_values[17]	auto[0]	auto[0]	auto[1]	6689960	1			T24	488		T29	1139		T31	129054
all_values[17]	auto[0]	auto[1]	auto[0]	741651	1			T24	62		T29	136		T31	14515
all_values[17]	auto[0]	auto[1]	auto[1]	6691449	1			T24	363		T29	1127		T31	127646
all_values[17]	auto[1]	auto[0]	auto[1]	100008	1			T29	58		T31	2064		T32	91
all_values[17]	auto[1]	auto[1]	auto[1]	98505	1			T29	50		T31	2055		T32	95
all_values[18]	auto[0]	auto[0]	auto[0]	3163332	1			T21	806		T22	265		T23	6151
all_values[18]	auto[0]	auto[0]	auto[1]	6708548	1			T24	285		T29	1138		T31	127885
all_values[18]	auto[0]	auto[1]	auto[0]	733314	1			T24	62		T29	173		T31	14556
all_values[18]	auto[0]	auto[1]	auto[1]	6661171	1			T24	543		T29	1101		T31	129590
all_values[18]	auto[1]	auto[0]	auto[1]	99016	1			T29	52		T31	1928		T32	116
all_values[18]	auto[1]	auto[1]	auto[1]	99620	1			T29	45		T31	2096		T32	104
all_values[19]	auto[0]	auto[0]	auto[0]	3146421	1			T21	806		T22	265		T23	6151
all_values[19]	auto[0]	auto[0]	auto[1]	6719962	1			T24	412		T29	1336		T31	132713
all_values[19]	auto[0]	auto[1]	auto[0]	729633	1			T24	25		T29	93		T31	13256
all_values[19]	auto[0]	auto[1]	auto[1]	6670108	1			T24	415		T29	1070		T31	126468
all_values[19]	auto[1]	auto[0]	auto[1]	99677	1			T29	44		T31	2058		T32	88
all_values[19]	auto[1]	auto[1]	auto[1]	99200	1			T29	52		T31	2081		T32	107
all_values[20]	auto[0]	auto[0]	auto[0]	3152581	1			T21	806		T22	265		T23	6151
all_values[20]	auto[0]	auto[0]	auto[1]	6725082	1			T24	539		T29	1211		T31	128735
all_values[20]	auto[0]	auto[1]	auto[0]	731605	1			T24	69		T29	152		T31	14637
all_values[20]	auto[0]	auto[1]	auto[1]	6656308	1			T24	281		T29	1096		T31	127389
all_values[20]	auto[1]	auto[0]	auto[1]	99757	1			T29	48		T31	2075		T32	93
all_values[20]	auto[1]	auto[1]	auto[1]	99668	1			T29	55		T31	2120		T32	104
all_values[21]	auto[0]	auto[0]	auto[0]	3142098	1			T21	806		T22	265		T23	6151
all_values[21]	auto[0]	auto[0]	auto[1]	6677493	1			T24	404		T29	1034		T31	134109
all_values[21]	auto[0]	auto[1]	auto[0]	738363	1			T24	54		T29	179		T31	13987
all_values[21]	auto[0]	auto[1]	auto[1]	6708041	1			T24	453		T29	1234		T31	124600
all_values[21]	auto[1]	auto[0]	auto[1]	99852	1			T29	40		T31	2107		T32	84
all_values[21]	auto[1]	auto[1]	auto[1]	99154	1			T29	69		T31	1994		T32	120
all_values[22]	auto[0]	auto[0]	auto[0]	3153627	1			T21	806		T22	265		T23	6151
all_values[22]	auto[0]	auto[0]	auto[1]	6738349	1			T24	447		T29	1275		T31	129994
all_values[22]	auto[0]	auto[1]	auto[0]	733918	1			T24	13		T29	195		T31	14049
all_values[22]	auto[0]	auto[1]	auto[1]	6640253	1			T24	447		T29	1004		T31	126434
all_values[22]	auto[1]	auto[0]	auto[1]	99625	1			T29	46		T31	2066		T32	106
all_values[22]	auto[1]	auto[1]	auto[1]	99229	1			T29	43		T31	2090		T32	103
all_values[23]	auto[0]	auto[0]	auto[0]	3150270	1			T21	806		T22	265		T23	6151
all_values[23]	auto[0]	auto[0]	auto[1]	6702905	1			T24	510		T29	1013		T31	131649
all_values[23]	auto[0]	auto[1]	auto[0]	740478	1			T24	4		T29	154		T31	13325
all_values[23]	auto[0]	auto[1]	auto[1]	6672312	1			T24	377		T29	1315		T31	127587
all_values[23]	auto[1]	auto[0]	auto[1]	99842	1			T29	42		T31	2068		T32	117
all_values[23]	auto[1]	auto[1]	auto[1]	99194	1			T29	48		T31	1995		T32	96
all_values[24]	auto[0]	auto[0]	auto[0]	3158731	1			T21	806		T22	265		T23	6151
all_values[24]	auto[0]	auto[0]	auto[1]	6712236	1			T24	347		T29	1155		T31	123590
all_values[24]	auto[0]	auto[1]	auto[0]	734311	1			T24	66		T29	172		T31	14927
all_values[24]	auto[0]	auto[1]	auto[1]	6660735	1			T24	449		T29	1132		T31	131905
all_values[24]	auto[1]	auto[0]	auto[1]	99843	1			T29	47		T31	2107		T32	102
all_values[24]	auto[1]	auto[1]	auto[1]	99145	1			T29	56		T31	2001		T32	99
all_values[25]	auto[0]	auto[0]	auto[0]	3149847	1			T21	806		T22	265		T23	6151
all_values[25]	auto[0]	auto[0]	auto[1]	6698557	1			T24	424		T29	1165		T31	136416
all_values[25]	auto[0]	auto[1]	auto[0]	738417	1			T24	9		T29	183		T31	14285
all_values[25]	auto[0]	auto[1]	auto[1]	6678834	1			T24	482		T29	1051		T31	122383
all_values[25]	auto[1]	auto[0]	auto[1]	100014	1			T29	52		T31	2103		T32	109
all_values[25]	auto[1]	auto[1]	auto[1]	99332	1			T29	52		T31	2074		T32	96
all_values[26]	auto[0]	auto[0]	auto[0]	3142039	1			T21	806		T22	265		T23	6151
all_values[26]	auto[0]	auto[0]	auto[1]	6739288	1			T24	443		T29	1187		T31	130182
all_values[26]	auto[0]	auto[1]	auto[0]	726679	1			T24	36		T29	169		T31	14616
all_values[26]	auto[0]	auto[1]	auto[1]	6658446	1			T24	393		T29	1142		T31	125211
all_values[26]	auto[1]	auto[0]	auto[1]	99503	1			T29	44		T31	2079		T32	96
all_values[26]	auto[1]	auto[1]	auto[1]	99046	1			T29	38		T31	2037		T32	113
all_values[27]	auto[0]	auto[0]	auto[0]	3132119	1			T21	806		T22	265		T23	6151
all_values[27]	auto[0]	auto[0]	auto[1]	6705041	1			T24	393		T29	996		T31	131789
all_values[27]	auto[0]	auto[1]	auto[0]	732810	1			T24	50		T29	124		T31	15089
all_values[27]	auto[0]	auto[1]	auto[1]	6696359	1			T24	441		T29	1332		T31	126178
all_values[27]	auto[1]	auto[0]	auto[1]	99226	1			T29	51		T31	2088		T32	107
all_values[27]	auto[1]	auto[1]	auto[1]	99446	1			T29	52		T31	2023		T32	96
all_values[28]	auto[0]	auto[0]	auto[0]	3141923	1			T21	806		T22	265		T23	6151
all_values[28]	auto[0]	auto[0]	auto[1]	6690462	1			T24	324		T29	1034		T31	128157
all_values[28]	auto[0]	auto[1]	auto[0]	731293	1			T24	37		T29	132		T31	13608
all_values[28]	auto[0]	auto[1]	auto[1]	6702908	1			T24	542		T29	1273		T31	131324
all_values[28]	auto[1]	auto[0]	auto[1]	99712	1			T29	33		T31	2035		T32	69
all_values[28]	auto[1]	auto[1]	auto[1]	98703	1			T29	53		T31	2016		T32	145
all_values[29]	auto[0]	auto[0]	auto[0]	3145629	1			T21	806		T22	265		T23	6151
all_values[29]	auto[0]	auto[0]	auto[1]	6705425	1			T24	360		T29	1093		T31	131834
all_values[29]	auto[0]	auto[1]	auto[0]	738063	1			T24	100		T29	214		T31	14276
all_values[29]	auto[0]	auto[1]	auto[1]	6677266	1			T24	421		T29	1167		T31	126872
all_values[29]	auto[1]	auto[0]	auto[1]	99605	1			T29	45		T31	2070		T32	95
all_values[29]	auto[1]	auto[1]	auto[1]	99013	1			T29	46		T31	2059		T32	119
all_values[30]	auto[0]	auto[0]	auto[0]	3146164	1			T21	806		T22	265		T23	6151
all_values[30]	auto[0]	auto[0]	auto[1]	6688043	1			T24	362		T29	1190		T31	124544
all_values[30]	auto[0]	auto[1]	auto[0]	740497	1			T24	70		T29	222		T31	14576
all_values[30]	auto[0]	auto[1]	auto[1]	6691175	1			T24	441		T29	1017		T31	133011
all_values[30]	auto[1]	auto[0]	auto[1]	99854	1			T29	51		T31	2059		T32	111
all_values[30]	auto[1]	auto[1]	auto[1]	99268	1			T29	52		T31	2075		T32	91
all_values[31]	auto[0]	auto[0]	auto[0]	3144763	1			T21	806		T22	265		T23	6151
all_values[31]	auto[0]	auto[0]	auto[1]	6680638	1			T24	499		T29	1251		T31	122337
all_values[31]	auto[0]	auto[1]	auto[0]	738666	1			T24	12		T29	127		T31	14551
all_values[31]	auto[0]	auto[1]	auto[1]	6702723	1			T24	361		T29	1077		T31	136083
all_values[31]	auto[1]	auto[0]	auto[1]	99343	1			T29	46		T31	2004		T32	98
all_values[31]	auto[1]	auto[1]	auto[1]	98868	1			T29	43		T31	2023		T32	113

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal