Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9968794 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
7496207 |
1 |
|
|
T24 |
411 |
|
T29 |
1579 |
|
T31 |
141003 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
14407472 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
3057529 |
1 |
|
|
T24 |
145 |
|
T29 |
977 |
|
T31 |
51246 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9958699 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
7506302 |
1 |
|
|
T24 |
364 |
|
T29 |
1353 |
|
T31 |
140073 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2221526 |
1 |
|
|
T24 |
120 |
|
T29 |
156 |
|
T31 |
44484 |
auto[1] |
auto[0] |
auto[1] |
1529587 |
1 |
|
|
T24 |
93 |
|
T29 |
398 |
|
T31 |
26016 |
auto[1] |
auto[1] |
auto[0] |
2227247 |
1 |
|
|
T24 |
99 |
|
T29 |
220 |
|
T31 |
44343 |
auto[1] |
auto[1] |
auto[1] |
1527942 |
1 |
|
|
T24 |
52 |
|
T29 |
579 |
|
T31 |
25230 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |