Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9933396 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
7531605 |
1 |
|
|
T24 |
425 |
|
T29 |
1313 |
|
T31 |
144216 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
14404045 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
3060956 |
1 |
|
|
T24 |
218 |
|
T29 |
1329 |
|
T31 |
52331 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9948956 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
auto[1] |
7516045 |
1 |
|
|
T24 |
479 |
|
T29 |
1671 |
|
T31 |
142184 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2229140 |
1 |
|
|
T24 |
174 |
|
T29 |
172 |
|
T31 |
46070 |
auto[1] |
auto[0] |
auto[1] |
1528628 |
1 |
|
|
T24 |
147 |
|
T29 |
680 |
|
T31 |
25968 |
auto[1] |
auto[1] |
auto[0] |
2225949 |
1 |
|
|
T24 |
87 |
|
T29 |
170 |
|
T31 |
43783 |
auto[1] |
auto[1] |
auto[1] |
1532328 |
1 |
|
|
T24 |
71 |
|
T29 |
649 |
|
T31 |
26363 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |