Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9919443 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7545558 |
1 |
|
|
T24 |
507 |
|
T29 |
1482 |
|
T31 |
140581 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14405239 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
3059762 |
1 |
|
|
T24 |
281 |
|
T29 |
1004 |
|
T31 |
54886 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9952425 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7512576 |
1 |
|
|
T24 |
536 |
|
T29 |
1256 |
|
T31 |
148737 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2219423 |
1 |
|
|
T24 |
123 |
|
T29 |
100 |
|
T31 |
47795 |
| auto[1] |
auto[0] |
auto[1] |
1528713 |
1 |
|
|
T24 |
138 |
|
T29 |
415 |
|
T31 |
27579 |
| auto[1] |
auto[1] |
auto[0] |
2233391 |
1 |
|
|
T24 |
132 |
|
T29 |
152 |
|
T31 |
46056 |
| auto[1] |
auto[1] |
auto[1] |
1531049 |
1 |
|
|
T24 |
143 |
|
T29 |
589 |
|
T31 |
27307 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |