Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9936386 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7528615 |
1 |
|
|
T24 |
491 |
|
T29 |
1508 |
|
T31 |
143290 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
16511698 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
953303 |
1 |
|
|
T24 |
78 |
|
T29 |
49 |
|
T31 |
18129 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9946185 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7518816 |
1 |
|
|
T24 |
356 |
|
T29 |
1400 |
|
T31 |
147597 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3280324 |
1 |
|
|
T24 |
114 |
|
T29 |
620 |
|
T31 |
65082 |
| auto[1] |
auto[0] |
auto[1] |
476046 |
1 |
|
|
T24 |
34 |
|
T29 |
19 |
|
T31 |
9125 |
| auto[1] |
auto[1] |
auto[0] |
3285189 |
1 |
|
|
T24 |
164 |
|
T29 |
731 |
|
T31 |
64386 |
| auto[1] |
auto[1] |
auto[1] |
477257 |
1 |
|
|
T24 |
44 |
|
T29 |
30 |
|
T31 |
9004 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |