Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9953017 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7511984 |
1 |
|
|
T24 |
381 |
|
T29 |
1517 |
|
T31 |
142907 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14386537 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
3078464 |
1 |
|
|
T24 |
344 |
|
T29 |
1065 |
|
T31 |
54336 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9898817 |
1 |
|
|
T21 |
806 |
|
T22 |
265 |
|
T23 |
6151 |
| auto[1] |
7566184 |
1 |
|
|
T24 |
645 |
|
T29 |
1423 |
|
T31 |
147313 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2237649 |
1 |
|
|
T24 |
169 |
|
T29 |
149 |
|
T31 |
48025 |
| auto[1] |
auto[0] |
auto[1] |
1535814 |
1 |
|
|
T24 |
160 |
|
T29 |
497 |
|
T31 |
27966 |
| auto[1] |
auto[1] |
auto[0] |
2250071 |
1 |
|
|
T24 |
132 |
|
T29 |
209 |
|
T31 |
44952 |
| auto[1] |
auto[1] |
auto[1] |
1542650 |
1 |
|
|
T24 |
184 |
|
T29 |
568 |
|
T31 |
26370 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |