Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	16156480	1			T22	957		T1	1669		T11	363
all_values[1]	16156480	1			T22	957		T1	1669		T11	363
all_values[2]	16156480	1			T22	957		T1	1669		T11	363
all_values[3]	16156480	1			T22	957		T1	1669		T11	363
all_values[4]	16156480	1			T22	957		T1	1669		T11	363
all_values[5]	16156480	1			T22	957		T1	1669		T11	363
all_values[6]	16156480	1			T22	957		T1	1669		T11	363
all_values[7]	16156480	1			T22	957		T1	1669		T11	363
all_values[8]	16156480	1			T22	957		T1	1669		T11	363
all_values[9]	16156480	1			T22	957		T1	1669		T11	363
all_values[10]	16156480	1			T22	957		T1	1669		T11	363
all_values[11]	16156480	1			T22	957		T1	1669		T11	363
all_values[12]	16156480	1			T22	957		T1	1669		T11	363
all_values[13]	16156480	1			T22	957		T1	1669		T11	363
all_values[14]	16156480	1			T22	957		T1	1669		T11	363
all_values[15]	16156480	1			T22	957		T1	1669		T11	363
all_values[16]	16156480	1			T22	957		T1	1669		T11	363
all_values[17]	16156480	1			T22	957		T1	1669		T11	363
all_values[18]	16156480	1			T22	957		T1	1669		T11	363
all_values[19]	16156480	1			T22	957		T1	1669		T11	363
all_values[20]	16156480	1			T22	957		T1	1669		T11	363
all_values[21]	16156480	1			T22	957		T1	1669		T11	363
all_values[22]	16156480	1			T22	957		T1	1669		T11	363
all_values[23]	16156480	1			T22	957		T1	1669		T11	363
all_values[24]	16156480	1			T22	957		T1	1669		T11	363
all_values[25]	16156480	1			T22	957		T1	1669		T11	363
all_values[26]	16156480	1			T22	957		T1	1669		T11	363
all_values[27]	16156480	1			T22	957		T1	1669		T11	363
all_values[28]	16156480	1			T22	957		T1	1669		T11	363
all_values[29]	16156480	1			T22	957		T1	1669		T11	363
all_values[30]	16156480	1			T22	957		T1	1669		T11	363
all_values[31]	16156480	1			T22	957		T1	1669		T11	363

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

294266148

1

T22

30624

T1

27499

T11

11616

auto[1]

222741212

1

T1

25909

T12

413241

T14

39180

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

113785445

1

T22

30624

T1

7773

T11

11616

auto[1]

403221915

1

T1

45635

T12

757402

T14

70363

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

511388470

1

T22

30624

T1

51286

T11

11616

auto[1]

5618890

1

T1

2122

T12

90217

T17

2044

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2877293	1			T22	957		T1	127		T11	363
all_values[0]	auto[0]	auto[0]	auto[1]	6224499	1			T1	837		T12	121867		T14	1324
all_values[0]	auto[0]	auto[1]	auto[0]	678729	1			T1	85		T12	13801		T14	88
all_values[0]	auto[0]	auto[1]	auto[1]	6200207	1			T1	548		T12	111253		T14	865
all_values[0]	auto[1]	auto[0]	auto[1]	88418	1			T1	46		T12	1310		T17	26
all_values[0]	auto[1]	auto[1]	auto[1]	87334	1			T1	26		T12	1501		T17	42
all_values[1]	auto[0]	auto[0]	auto[0]	2885023	1			T22	957		T1	122		T11	363
all_values[1]	auto[0]	auto[0]	auto[1]	6229599	1			T1	702		T12	116760		T14	1134
all_values[1]	auto[0]	auto[1]	auto[0]	670108	1			T1	92		T12	11576		T14	81
all_values[1]	auto[0]	auto[1]	auto[1]	6196131	1			T1	685		T12	117662		T14	1077
all_values[1]	auto[1]	auto[0]	auto[1]	87915	1			T1	37		T12	1432		T17	27
all_values[1]	auto[1]	auto[1]	auto[1]	87704	1			T1	31		T12	1352		T17	40
all_values[2]	auto[0]	auto[0]	auto[0]	2887302	1			T22	957		T1	68		T11	363
all_values[2]	auto[0]	auto[0]	auto[1]	6196470	1			T1	728		T12	121897		T14	1245
all_values[2]	auto[0]	auto[1]	auto[0]	669545	1			T1	69		T12	12882		T14	70
all_values[2]	auto[0]	auto[1]	auto[1]	6227679	1			T1	733		T12	112143		T14	1029
all_values[2]	auto[1]	auto[0]	auto[1]	88436	1			T1	33		T12	1414		T17	30
all_values[2]	auto[1]	auto[1]	auto[1]	87048	1			T1	38		T12	1359		T17	37
all_values[3]	auto[0]	auto[0]	auto[0]	2882130	1			T22	957		T1	109		T11	363
all_values[3]	auto[0]	auto[0]	auto[1]	6250687	1			T1	731		T12	118775		T14	1193
all_values[3]	auto[0]	auto[1]	auto[0]	673386	1			T1	88		T12	11465		T14	85
all_values[3]	auto[0]	auto[1]	auto[1]	6174505	1			T1	672		T12	114340		T14	1030
all_values[3]	auto[1]	auto[0]	auto[1]	88092	1			T1	34		T12	1425		T17	27
all_values[3]	auto[1]	auto[1]	auto[1]	87680	1			T1	35		T12	1399		T17	38
all_values[4]	auto[0]	auto[0]	auto[0]	2872993	1			T22	957		T1	77		T11	363
all_values[4]	auto[0]	auto[0]	auto[1]	6217745	1			T1	618		T12	118346		T14	1006
all_values[4]	auto[0]	auto[1]	auto[0]	675950	1			T1	159		T12	12207		T14	188
all_values[4]	auto[0]	auto[1]	auto[1]	6214194	1			T1	745		T12	116093		T14	1144
all_values[4]	auto[1]	auto[0]	auto[1]	88306	1			T1	29		T12	1386		T17	21
all_values[4]	auto[1]	auto[1]	auto[1]	87292	1			T1	41		T12	1425		T17	42
all_values[5]	auto[0]	auto[0]	auto[0]	2889527	1			T22	957		T1	98		T11	363
all_values[5]	auto[0]	auto[0]	auto[1]	6231235	1			T1	803		T12	118395		T14	1046
all_values[5]	auto[0]	auto[1]	auto[0]	673356	1			T1	108		T12	11800		T14	138
all_values[5]	auto[0]	auto[1]	auto[1]	6187179	1			T1	583		T12	115555		T14	1074
all_values[5]	auto[1]	auto[0]	auto[1]	87697	1			T1	48		T12	1409		T17	35
all_values[5]	auto[1]	auto[1]	auto[1]	87486	1			T1	29		T12	1416		T17	29
all_values[6]	auto[0]	auto[0]	auto[0]	2895764	1			T22	957		T1	87		T11	363
all_values[6]	auto[0]	auto[0]	auto[1]	6234366	1			T1	637		T12	128709		T14	1132
all_values[6]	auto[0]	auto[1]	auto[0]	675489	1			T1	229		T12	11372		T14	110
all_values[6]	auto[0]	auto[1]	auto[1]	6175297	1			T1	647		T12	105482		T14	1090
all_values[6]	auto[1]	auto[0]	auto[1]	88370	1			T1	34		T12	1399		T17	28
all_values[6]	auto[1]	auto[1]	auto[1]	87194	1			T1	35		T12	1394		T17	36
all_values[7]	auto[0]	auto[0]	auto[0]	2883281	1			T22	957		T1	109		T11	363
all_values[7]	auto[0]	auto[0]	auto[1]	6224659	1			T1	622		T12	110668		T14	1216
all_values[7]	auto[0]	auto[1]	auto[0]	686106	1			T1	224		T12	16422		T14	58
all_values[7]	auto[0]	auto[1]	auto[1]	6186476	1			T1	646		T12	120209		T14	1065
all_values[7]	auto[1]	auto[0]	auto[1]	88288	1			T1	34		T12	1340		T17	35
all_values[7]	auto[1]	auto[1]	auto[1]	87670	1			T1	34		T12	1523		T17	33
all_values[8]	auto[0]	auto[0]	auto[0]	2882115	1			T22	957		T1	54		T11	363
all_values[8]	auto[0]	auto[0]	auto[1]	6214457	1			T1	698		T12	116658		T14	989
all_values[8]	auto[0]	auto[1]	auto[0]	663628	1			T1	154		T12	12176		T14	91
all_values[8]	auto[0]	auto[1]	auto[1]	6220381	1			T1	692		T12	117390		T14	1187
all_values[8]	auto[1]	auto[0]	auto[1]	88058	1			T1	37		T12	1473		T17	28
all_values[8]	auto[1]	auto[1]	auto[1]	87841	1			T1	34		T12	1420		T17	30
all_values[9]	auto[0]	auto[0]	auto[0]	2894406	1			T22	957		T1	88		T11	363
all_values[9]	auto[0]	auto[0]	auto[1]	6237999	1			T1	604		T12	116919		T14	1122
all_values[9]	auto[0]	auto[1]	auto[0]	665817	1			T1	102		T12	11969		T14	143
all_values[9]	auto[0]	auto[1]	auto[1]	6182954	1			T1	806		T12	117345		T14	1079
all_values[9]	auto[1]	auto[0]	auto[1]	88328	1			T1	36		T12	1384		T17	27
all_values[9]	auto[1]	auto[1]	auto[1]	86976	1			T1	33		T12	1434		T17	41
all_values[10]	auto[0]	auto[0]	auto[0]	2883045	1			T22	957		T1	199		T11	363
all_values[10]	auto[0]	auto[0]	auto[1]	6236337	1			T1	836		T12	118942		T14	1169
all_values[10]	auto[0]	auto[1]	auto[0]	674937	1			T1	130		T12	13044		T14	87
all_values[10]	auto[0]	auto[1]	auto[1]	6186382	1			T1	434		T12	113408		T14	1117
all_values[10]	auto[1]	auto[0]	auto[1]	88361	1			T1	52		T12	1384		T17	31
all_values[10]	auto[1]	auto[1]	auto[1]	87418	1			T1	18		T12	1430		T17	34
all_values[11]	auto[0]	auto[0]	auto[0]	2885368	1			T22	957		T1	94		T11	363
all_values[11]	auto[0]	auto[0]	auto[1]	6220970	1			T1	761		T12	115133		T14	1094
all_values[11]	auto[0]	auto[1]	auto[0]	670193	1			T1	112		T12	12702		T14	95
all_values[11]	auto[0]	auto[1]	auto[1]	6204857	1			T1	644		T12	118017		T14	1108
all_values[11]	auto[1]	auto[0]	auto[1]	87621	1			T1	27		T12	1379		T17	34
all_values[11]	auto[1]	auto[1]	auto[1]	87471	1			T1	31		T12	1424		T17	29
all_values[12]	auto[0]	auto[0]	auto[0]	2879675	1			T22	957		T1	201		T11	363
all_values[12]	auto[0]	auto[0]	auto[1]	6235470	1			T1	692		T12	113016		T14	957
all_values[12]	auto[0]	auto[1]	auto[0]	676298	1			T1	154		T12	12065		T14	105
all_values[12]	auto[0]	auto[1]	auto[1]	6189472	1			T1	556		T12	120998		T14	1274
all_values[12]	auto[1]	auto[0]	auto[1]	88034	1			T1	25		T12	1449		T17	22
all_values[12]	auto[1]	auto[1]	auto[1]	87531	1			T1	41		T12	1427		T17	35
all_values[13]	auto[0]	auto[0]	auto[0]	2888944	1			T22	957		T1	114		T11	363
all_values[13]	auto[0]	auto[0]	auto[1]	6227541	1			T1	648		T12	122560		T14	1128
all_values[13]	auto[0]	auto[1]	auto[0]	666323	1			T1	139		T12	11177		T14	122
all_values[13]	auto[0]	auto[1]	auto[1]	6198276	1			T1	707		T12	112202		T14	1119
all_values[13]	auto[1]	auto[0]	auto[1]	87982	1			T1	28		T12	1358		T17	30
all_values[13]	auto[1]	auto[1]	auto[1]	87414	1			T1	33		T12	1411		T17	33
all_values[14]	auto[0]	auto[0]	auto[0]	2876754	1			T22	957		T1	120		T11	363
all_values[14]	auto[0]	auto[0]	auto[1]	6210318	1			T1	702		T12	122380		T14	1033
all_values[14]	auto[0]	auto[1]	auto[0]	669000	1			T1	111		T12	12823		T14	114
all_values[14]	auto[0]	auto[1]	auto[1]	6225141	1			T1	656		T12	111239		T14	1102
all_values[14]	auto[1]	auto[0]	auto[1]	87704	1			T1	42		T12	1492		T17	33
all_values[14]	auto[1]	auto[1]	auto[1]	87563	1			T1	38		T12	1365		T17	23
all_values[15]	auto[0]	auto[0]	auto[0]	2891001	1			T22	957		T1	102		T11	363
all_values[15]	auto[0]	auto[0]	auto[1]	6238942	1			T1	831		T12	119981		T14	1020
all_values[15]	auto[0]	auto[1]	auto[0]	682668	1			T1	98		T12	11054		T14	117
all_values[15]	auto[0]	auto[1]	auto[1]	6168455	1			T1	571		T12	116016		T14	1177
all_values[15]	auto[1]	auto[0]	auto[1]	88348	1			T1	41		T12	1408		T17	33
all_values[15]	auto[1]	auto[1]	auto[1]	87066	1			T1	26		T12	1358		T17	23
all_values[16]	auto[0]	auto[0]	auto[0]	2888543	1			T22	957		T1	140		T11	363
all_values[16]	auto[0]	auto[0]	auto[1]	6219592	1			T1	736		T12	117927		T14	722
all_values[16]	auto[0]	auto[1]	auto[0]	670438	1			T1	132		T12	13914		T14	103
all_values[16]	auto[0]	auto[1]	auto[1]	6202972	1			T1	591		T12	113008		T14	1444
all_values[16]	auto[1]	auto[0]	auto[1]	87811	1			T1	45		T12	1386		T17	29
all_values[16]	auto[1]	auto[1]	auto[1]	87124	1			T1	25		T12	1421		T17	33
all_values[17]	auto[0]	auto[0]	auto[0]	2874160	1			T22	957		T1	146		T11	363
all_values[17]	auto[0]	auto[0]	auto[1]	6220861	1			T1	631		T12	116829		T14	1174
all_values[17]	auto[0]	auto[1]	auto[0]	671174	1			T1	119		T12	11819		T14	101
all_values[17]	auto[0]	auto[1]	auto[1]	6214817	1			T1	714		T12	117953		T14	1056
all_values[17]	auto[1]	auto[0]	auto[1]	88090	1			T1	32		T12	1506		T17	27
all_values[17]	auto[1]	auto[1]	auto[1]	87378	1			T1	27		T12	1290		T17	32
all_values[18]	auto[0]	auto[0]	auto[0]	2883715	1			T22	957		T1	137		T11	363
all_values[18]	auto[0]	auto[0]	auto[1]	6211069	1			T1	697		T12	118627		T14	1073
all_values[18]	auto[0]	auto[1]	auto[0]	678339	1			T1	141		T12	13056		T14	112
all_values[18]	auto[0]	auto[1]	auto[1]	6206961	1			T1	621		T12	114817		T14	1154
all_values[18]	auto[1]	auto[0]	auto[1]	88383	1			T1	39		T12	1474		T17	49
all_values[18]	auto[1]	auto[1]	auto[1]	88013	1			T1	34		T12	1329		T17	21
all_values[19]	auto[0]	auto[0]	auto[0]	2879936	1			T22	957		T1	134		T11	363
all_values[19]	auto[0]	auto[0]	auto[1]	6267729	1			T1	705		T12	117634		T14	1071
all_values[19]	auto[0]	auto[1]	auto[0]	671068	1			T1	101		T12	11580		T14	133
all_values[19]	auto[0]	auto[1]	auto[1]	6162109	1			T1	673		T12	117653		T14	1104
all_values[19]	auto[1]	auto[0]	auto[1]	88023	1			T1	33		T12	1398		T17	35
all_values[19]	auto[1]	auto[1]	auto[1]	87615	1			T1	23		T12	1432		T17	33
all_values[20]	auto[0]	auto[0]	auto[0]	2886550	1			T22	957		T1	82		T11	363
all_values[20]	auto[0]	auto[0]	auto[1]	6189789	1			T1	639		T12	120763		T14	1032
all_values[20]	auto[0]	auto[1]	auto[0]	675548	1			T1	110		T12	12563		T14	98
all_values[20]	auto[0]	auto[1]	auto[1]	6228090	1			T1	776		T12	113179		T14	1113
all_values[20]	auto[1]	auto[0]	auto[1]	88751	1			T1	24		T12	1408		T17	36
all_values[20]	auto[1]	auto[1]	auto[1]	87752	1			T1	38		T12	1449		T17	27
all_values[21]	auto[0]	auto[0]	auto[0]	2886756	1			T22	957		T1	120		T11	363
all_values[21]	auto[0]	auto[0]	auto[1]	6262813	1			T1	672		T12	117727		T14	1291
all_values[21]	auto[0]	auto[1]	auto[0]	662233	1			T1	93		T12	14125		T14	125
all_values[21]	auto[0]	auto[1]	auto[1]	6168412	1			T1	725		T12	115952		T14	923
all_values[21]	auto[1]	auto[0]	auto[1]	88736	1			T1	32		T12	1375		T17	40
all_values[21]	auto[1]	auto[1]	auto[1]	87530	1			T1	27		T12	1447		T17	24
all_values[22]	auto[0]	auto[0]	auto[0]	2885648	1			T22	957		T1	152		T11	363
all_values[22]	auto[0]	auto[0]	auto[1]	6208886	1			T1	731		T12	119739		T14	820
all_values[22]	auto[0]	auto[1]	auto[0]	671110	1			T1	122		T12	11587		T14	113
all_values[22]	auto[0]	auto[1]	auto[1]	6214959	1			T1	600		T12	115673		T14	1435
all_values[22]	auto[1]	auto[0]	auto[1]	87647	1			T1	33		T12	1340		T17	31
all_values[22]	auto[1]	auto[1]	auto[1]	88230	1			T1	31		T12	1455		T17	27
all_values[23]	auto[0]	auto[0]	auto[0]	2882198	1			T22	957		T1	146		T11	363
all_values[23]	auto[0]	auto[0]	auto[1]	6196014	1			T1	668		T12	121106		T14	951
all_values[23]	auto[0]	auto[1]	auto[0]	674936	1			T1	176		T12	11266		T14	112
all_values[23]	auto[0]	auto[1]	auto[1]	6227944	1			T1	627		T12	113108		T14	1210
all_values[23]	auto[1]	auto[0]	auto[1]	87991	1			T1	29		T12	1407		T17	38
all_values[23]	auto[1]	auto[1]	auto[1]	87397	1			T1	23		T12	1431		T17	27
all_values[24]	auto[0]	auto[0]	auto[0]	2879758	1			T22	957		T1	137		T11	363
all_values[24]	auto[0]	auto[0]	auto[1]	6248702	1			T1	806		T12	120013		T14	1078
all_values[24]	auto[0]	auto[1]	auto[0]	658926	1			T1	79		T12	13808		T14	103
all_values[24]	auto[0]	auto[1]	auto[1]	6193488	1			T1	583		T12	111717		T14	1199
all_values[24]	auto[1]	auto[0]	auto[1]	87817	1			T1	40		T12	1470		T17	33
all_values[24]	auto[1]	auto[1]	auto[1]	87789	1			T1	24		T12	1371		T17	40
all_values[25]	auto[0]	auto[0]	auto[0]	2880769	1			T22	957		T1	130		T11	363
all_values[25]	auto[0]	auto[0]	auto[1]	6200952	1			T1	747		T12	115381		T14	1008
all_values[25]	auto[0]	auto[1]	auto[0]	672881	1			T1	78		T12	12216		T14	179
all_values[25]	auto[0]	auto[1]	auto[1]	6226525	1			T1	646		T12	119368		T14	1115
all_values[25]	auto[1]	auto[0]	auto[1]	87768	1			T1	39		T12	1350		T17	22
all_values[25]	auto[1]	auto[1]	auto[1]	87585	1			T1	29		T12	1447		T17	39
all_values[26]	auto[0]	auto[0]	auto[0]	2887125	1			T22	957		T1	166		T11	363
all_values[26]	auto[0]	auto[0]	auto[1]	6224715	1			T1	753		T12	116911		T14	1173
all_values[26]	auto[0]	auto[1]	auto[0]	669454	1			T1	128		T12	12563		T14	129
all_values[26]	auto[0]	auto[1]	auto[1]	6199446	1			T1	564		T12	117523		T14	983
all_values[26]	auto[1]	auto[0]	auto[1]	88070	1			T1	35		T12	1412		T17	31
all_values[26]	auto[1]	auto[1]	auto[1]	87670	1			T1	23		T12	1410		T17	34
all_values[27]	auto[0]	auto[0]	auto[0]	2876976	1			T22	957		T1	119		T11	363
all_values[27]	auto[0]	auto[0]	auto[1]	6220858	1			T1	773		T12	120495		T14	1221
all_values[27]	auto[0]	auto[1]	auto[0]	676488	1			T1	85		T12	12366		T14	156
all_values[27]	auto[0]	auto[1]	auto[1]	6207084	1			T1	620		T12	113008		T14	909
all_values[27]	auto[1]	auto[0]	auto[1]	87616	1			T1	43		T12	1478		T17	33
all_values[27]	auto[1]	auto[1]	auto[1]	87458	1			T1	29		T12	1308		T17	27
all_values[28]	auto[0]	auto[0]	auto[0]	2885775	1			T22	957		T1	110		T11	363
all_values[28]	auto[0]	auto[0]	auto[1]	6210979	1			T1	535		T12	117032		T14	1205
all_values[28]	auto[0]	auto[1]	auto[0]	678690	1			T1	112		T12	11275		T14	97
all_values[28]	auto[0]	auto[1]	auto[1]	6205589	1			T1	841		T12	118314		T14	997
all_values[28]	auto[1]	auto[0]	auto[1]	87856	1			T1	21		T12	1429		T17	37
all_values[28]	auto[1]	auto[1]	auto[1]	87591	1			T1	50		T12	1446		T17	31
all_values[29]	auto[0]	auto[0]	auto[0]	2876463	1			T22	957		T1	96		T11	363
all_values[29]	auto[0]	auto[0]	auto[1]	6247140	1			T1	557		T12	118566		T14	1052
all_values[29]	auto[0]	auto[1]	auto[0]	676906	1			T1	108		T12	12377		T14	100
all_values[29]	auto[0]	auto[1]	auto[1]	6180623	1			T1	844		T12	114536		T14	1116
all_values[29]	auto[1]	auto[0]	auto[1]	87460	1			T1	30		T12	1369		T17	26
all_values[29]	auto[1]	auto[1]	auto[1]	87888	1			T1	34		T12	1423		T17	37
all_values[30]	auto[0]	auto[0]	auto[0]	2879116	1			T22	957		T1	87		T11	363
all_values[30]	auto[0]	auto[0]	auto[1]	6210671	1			T1	862		T12	119056		T14	963
all_values[30]	auto[0]	auto[1]	auto[0]	662767	1			T1	107		T12	11672		T14	118
all_values[30]	auto[0]	auto[1]	auto[1]	6228474	1			T1	554		T12	115546		T14	1199
all_values[30]	auto[1]	auto[0]	auto[1]	87638	1			T1	36		T12	1481		T17	46
all_values[30]	auto[1]	auto[1]	auto[1]	87814	1			T1	23		T12	1368		T17	29
all_values[31]	auto[0]	auto[0]	auto[0]	2886798	1			T22	957		T1	171		T11	363
all_values[31]	auto[0]	auto[0]	auto[1]	6201640	1			T1	575		T12	114535		T14	1104
all_values[31]	auto[0]	auto[1]	auto[0]	668047	1			T1	186		T12	12165		T14	92
all_values[31]	auto[0]	auto[1]	auto[1]	6224242	1			T1	672		T12	119751		T14	1123
all_values[31]	auto[1]	auto[0]	auto[1]	87922	1			T1	26		T12	1419		T17	44
all_values[31]	auto[1]	auto[1]	auto[1]	87831	1			T1	39		T12	1408		T17	14

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal