Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9190210 |
1 |
|
|
T22 |
957 |
|
T1 |
1010 |
|
T11 |
363 |
auto[1] |
6966270 |
1 |
|
|
T1 |
659 |
|
T12 |
126555 |
|
T14 |
953 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13308366 |
1 |
|
|
T22 |
957 |
|
T1 |
1024 |
|
T11 |
363 |
auto[1] |
2848114 |
1 |
|
|
T1 |
645 |
|
T12 |
48734 |
|
T14 |
531 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9192699 |
1 |
|
|
T22 |
957 |
|
T1 |
855 |
|
T11 |
363 |
auto[1] |
6963781 |
1 |
|
|
T1 |
814 |
|
T12 |
124033 |
|
T14 |
1025 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2054157 |
1 |
|
|
T1 |
119 |
|
T12 |
39837 |
|
T14 |
274 |
auto[1] |
auto[0] |
auto[1] |
1427788 |
1 |
|
|
T1 |
360 |
|
T12 |
25491 |
|
T14 |
323 |
auto[1] |
auto[1] |
auto[0] |
2061510 |
1 |
|
|
T1 |
50 |
|
T12 |
35462 |
|
T14 |
220 |
auto[1] |
auto[1] |
auto[1] |
1420326 |
1 |
|
|
T1 |
285 |
|
T12 |
23243 |
|
T14 |
208 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |