Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9207743 |
1 |
|
|
T22 |
957 |
|
T1 |
1087 |
|
T11 |
363 |
| auto[1] |
6948737 |
1 |
|
|
T1 |
582 |
|
T12 |
127882 |
|
T14 |
1204 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13306372 |
1 |
|
|
T22 |
957 |
|
T1 |
1119 |
|
T11 |
363 |
| auto[1] |
2850108 |
1 |
|
|
T1 |
550 |
|
T12 |
50228 |
|
T14 |
650 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9196248 |
1 |
|
|
T22 |
957 |
|
T1 |
941 |
|
T11 |
363 |
| auto[1] |
6960232 |
1 |
|
|
T1 |
728 |
|
T12 |
129097 |
|
T14 |
1214 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2054590 |
1 |
|
|
T1 |
128 |
|
T12 |
39118 |
|
T14 |
276 |
| auto[1] |
auto[0] |
auto[1] |
1425613 |
1 |
|
|
T1 |
349 |
|
T12 |
24954 |
|
T14 |
293 |
| auto[1] |
auto[1] |
auto[0] |
2055534 |
1 |
|
|
T1 |
50 |
|
T12 |
39751 |
|
T14 |
288 |
| auto[1] |
auto[1] |
auto[1] |
1424495 |
1 |
|
|
T1 |
201 |
|
T12 |
25274 |
|
T14 |
357 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |