Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9165090 |
1 |
|
|
T22 |
957 |
|
T1 |
745 |
|
T11 |
363 |
| auto[1] |
6991390 |
1 |
|
|
T1 |
924 |
|
T12 |
127191 |
|
T14 |
1211 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13309417 |
1 |
|
|
T22 |
957 |
|
T1 |
854 |
|
T11 |
363 |
| auto[1] |
2847063 |
1 |
|
|
T1 |
815 |
|
T12 |
46533 |
|
T14 |
506 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9195930 |
1 |
|
|
T22 |
957 |
|
T1 |
725 |
|
T11 |
363 |
| auto[1] |
6960550 |
1 |
|
|
T1 |
944 |
|
T12 |
118929 |
|
T14 |
1005 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2051015 |
1 |
|
|
T1 |
82 |
|
T12 |
36392 |
|
T14 |
217 |
| auto[1] |
auto[0] |
auto[1] |
1424384 |
1 |
|
|
T1 |
360 |
|
T12 |
23317 |
|
T14 |
204 |
| auto[1] |
auto[1] |
auto[0] |
2062472 |
1 |
|
|
T1 |
47 |
|
T12 |
36004 |
|
T14 |
282 |
| auto[1] |
auto[1] |
auto[1] |
1422679 |
1 |
|
|
T1 |
455 |
|
T12 |
23216 |
|
T14 |
302 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |