Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9182181 |
1 |
|
|
T22 |
957 |
|
T1 |
916 |
|
T11 |
363 |
| auto[1] |
6974299 |
1 |
|
|
T1 |
753 |
|
T12 |
128715 |
|
T14 |
1548 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13315375 |
1 |
|
|
T22 |
957 |
|
T1 |
1010 |
|
T11 |
363 |
| auto[1] |
2841105 |
1 |
|
|
T1 |
659 |
|
T12 |
49809 |
|
T14 |
798 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9215540 |
1 |
|
|
T22 |
957 |
|
T1 |
854 |
|
T11 |
363 |
| auto[1] |
6940940 |
1 |
|
|
T1 |
815 |
|
T12 |
127105 |
|
T14 |
1589 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2053891 |
1 |
|
|
T1 |
113 |
|
T12 |
38459 |
|
T14 |
302 |
| auto[1] |
auto[0] |
auto[1] |
1420336 |
1 |
|
|
T1 |
360 |
|
T12 |
24966 |
|
T14 |
326 |
| auto[1] |
auto[1] |
auto[0] |
2045944 |
1 |
|
|
T1 |
43 |
|
T12 |
38837 |
|
T14 |
489 |
| auto[1] |
auto[1] |
auto[1] |
1420769 |
1 |
|
|
T1 |
299 |
|
T12 |
24843 |
|
T14 |
472 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |