Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7442341 |
1 |
|
|
T21 |
393 |
|
T22 |
330535 |
|
T23 |
65 |
| auto[1] |
5394955 |
1 |
|
|
T22 |
319385 |
|
T26 |
139 |
|
T27 |
107536 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10659020 |
1 |
|
|
T21 |
393 |
|
T22 |
525352 |
|
T23 |
65 |
| auto[1] |
2178276 |
1 |
|
|
T22 |
124568 |
|
T26 |
48 |
|
T27 |
40818 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7455284 |
1 |
|
|
T21 |
393 |
|
T22 |
322985 |
|
T23 |
65 |
| auto[1] |
5382012 |
1 |
|
|
T22 |
326935 |
|
T26 |
155 |
|
T27 |
113256 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1597668 |
1 |
|
|
T22 |
103316 |
|
T26 |
60 |
|
T27 |
34289 |
| auto[1] |
auto[0] |
auto[1] |
1092801 |
1 |
|
|
T22 |
63291 |
|
T26 |
22 |
|
T27 |
20133 |
| auto[1] |
auto[1] |
auto[0] |
1606068 |
1 |
|
|
T22 |
99051 |
|
T26 |
47 |
|
T27 |
38149 |
| auto[1] |
auto[1] |
auto[1] |
1085475 |
1 |
|
|
T22 |
61277 |
|
T26 |
26 |
|
T27 |
20685 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |