Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7466480 |
1 |
|
|
T21 |
393 |
|
T22 |
326185 |
|
T23 |
65 |
| auto[1] |
5370816 |
1 |
|
|
T22 |
323735 |
|
T26 |
95 |
|
T27 |
105899 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10665744 |
1 |
|
|
T21 |
393 |
|
T22 |
529081 |
|
T23 |
65 |
| auto[1] |
2171552 |
1 |
|
|
T22 |
120839 |
|
T26 |
65 |
|
T27 |
39570 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7477058 |
1 |
|
|
T21 |
393 |
|
T22 |
330443 |
|
T23 |
65 |
| auto[1] |
5360238 |
1 |
|
|
T22 |
319477 |
|
T26 |
100 |
|
T27 |
107579 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1598105 |
1 |
|
|
T22 |
99278 |
|
T26 |
22 |
|
T27 |
34748 |
| auto[1] |
auto[0] |
auto[1] |
1089085 |
1 |
|
|
T22 |
60245 |
|
T26 |
48 |
|
T27 |
19735 |
| auto[1] |
auto[1] |
auto[0] |
1590581 |
1 |
|
|
T22 |
99360 |
|
T26 |
13 |
|
T27 |
33261 |
| auto[1] |
auto[1] |
auto[1] |
1082467 |
1 |
|
|
T22 |
60594 |
|
T26 |
17 |
|
T27 |
19835 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |