Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	10181415	1			T26	828		T27	283		T28	1
all_values[1]	10181415	1			T26	828		T27	283		T28	1
all_values[2]	10181415	1			T26	828		T27	283		T28	1
all_values[3]	10181415	1			T26	828		T27	283		T28	1
all_values[4]	10181415	1			T26	828		T27	283		T28	1
all_values[5]	10181415	1			T26	828		T27	283		T28	1
all_values[6]	10181415	1			T26	828		T27	283		T28	1
all_values[7]	10181415	1			T26	828		T27	283		T28	1
all_values[8]	10181415	1			T26	828		T27	283		T28	1
all_values[9]	10181415	1			T26	828		T27	283		T28	1
all_values[10]	10181415	1			T26	828		T27	283		T28	1
all_values[11]	10181415	1			T26	828		T27	283		T28	1
all_values[12]	10181415	1			T26	828		T27	283		T28	1
all_values[13]	10181415	1			T26	828		T27	283		T28	1
all_values[14]	10181415	1			T26	828		T27	283		T28	1
all_values[15]	10181415	1			T26	828		T27	283		T28	1
all_values[16]	10181415	1			T26	828		T27	283		T28	1
all_values[17]	10181415	1			T26	828		T27	283		T28	1
all_values[18]	10181415	1			T26	828		T27	283		T28	1
all_values[19]	10181415	1			T26	828		T27	283		T28	1
all_values[20]	10181415	1			T26	828		T27	283		T28	1
all_values[21]	10181415	1			T26	828		T27	283		T28	1
all_values[22]	10181415	1			T26	828		T27	283		T28	1
all_values[23]	10181415	1			T26	828		T27	283		T28	1
all_values[24]	10181415	1			T26	828		T27	283		T28	1
all_values[25]	10181415	1			T26	828		T27	283		T28	1
all_values[26]	10181415	1			T26	828		T27	283		T28	1
all_values[27]	10181415	1			T26	828		T27	283		T28	1
all_values[28]	10181415	1			T26	828		T27	283		T28	1
all_values[29]	10181415	1			T26	828		T27	283		T28	1
all_values[30]	10181415	1			T26	828		T27	283		T28	1
all_values[31]	10181415	1			T26	828		T27	283		T28	1

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

198291493

1

T26

26496

T27

9056

T28

32

auto[1]

127513787

1

T31

30773

T32

166669

T33

15978

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

95253751

1

T26

26496

T27

9056

T28

32

auto[1]

230551529

1

T31

53924

T32

300664

T33

26988

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2593481	1			T26	828		T27	283		T28	1
all_values[0]	auto[0]	auto[1]	3611132	1			T31	779		T32	47821		T33	380
all_values[0]	auto[1]	auto[0]	392695	1			T31	140		T32	5289		T33	69
all_values[0]	auto[1]	auto[1]	3584107	1			T31	909		T32	45681		T33	446
all_values[1]	auto[0]	auto[0]	2585054	1			T26	828		T27	283		T28	1
all_values[1]	auto[0]	auto[1]	3612317	1			T31	943		T32	46744		T33	372
all_values[1]	auto[1]	auto[0]	386617	1			T31	103		T32	5586		T33	63
all_values[1]	auto[1]	auto[1]	3597427	1			T31	714		T32	47268		T33	505
all_values[2]	auto[0]	auto[0]	2593983	1			T26	828		T27	283		T28	1
all_values[2]	auto[0]	auto[1]	3595681	1			T31	893		T32	48861		T33	504
all_values[2]	auto[1]	auto[0]	387448	1			T31	87		T32	5077		T33	54
all_values[2]	auto[1]	auto[1]	3604303	1			T31	835		T32	45675		T33	369
all_values[3]	auto[0]	auto[0]	2585886	1			T26	828		T27	283		T28	1
all_values[3]	auto[0]	auto[1]	3623164	1			T31	800		T32	47988		T33	343
all_values[3]	auto[1]	auto[0]	382544	1			T31	86		T32	5341		T33	89
all_values[3]	auto[1]	auto[1]	3589821	1			T31	870		T32	45368		T33	390
all_values[4]	auto[0]	auto[0]	2600034	1			T26	828		T27	283		T28	1
all_values[4]	auto[0]	auto[1]	3608506	1			T31	878		T32	45864		T33	382
all_values[4]	auto[1]	auto[0]	389970	1			T31	108		T32	5193		T33	46
all_values[4]	auto[1]	auto[1]	3582905	1			T31	748		T32	48824		T33	475
all_values[5]	auto[0]	auto[0]	2590508	1			T26	828		T27	283		T28	1
all_values[5]	auto[0]	auto[1]	3603747	1			T31	864		T32	46618		T33	523
all_values[5]	auto[1]	auto[0]	388046	1			T31	77		T32	5161		T33	59
all_values[5]	auto[1]	auto[1]	3599114	1			T31	865		T32	47902		T33	322
all_values[6]	auto[0]	auto[0]	2591107	1			T26	828		T27	283		T28	1
all_values[6]	auto[0]	auto[1]	3575797	1			T31	863		T32	48238		T33	392
all_values[6]	auto[1]	auto[0]	382524	1			T31	104		T32	5435		T33	29
all_values[6]	auto[1]	auto[1]	3631987	1			T31	839		T32	45901		T33	520
all_values[7]	auto[0]	auto[0]	2587446	1			T26	828		T27	283		T28	1
all_values[7]	auto[0]	auto[1]	3587525	1			T31	718		T32	47839		T33	458
all_values[7]	auto[1]	auto[0]	392296	1			T31	139		T32	5202		T33	49
all_values[7]	auto[1]	auto[1]	3614148	1			T31	926		T32	46411		T33	417
all_values[8]	auto[0]	auto[0]	2592690	1			T26	828		T27	283		T28	1
all_values[8]	auto[0]	auto[1]	3595453	1			T31	806		T32	45748		T33	519
all_values[8]	auto[1]	auto[0]	385378	1			T31	76		T32	5311		T33	75
all_values[8]	auto[1]	auto[1]	3607894	1			T31	888		T32	48645		T33	335
all_values[9]	auto[0]	auto[0]	2583899	1			T26	828		T27	283		T28	1
all_values[9]	auto[0]	auto[1]	3582539	1			T31	626		T32	46411		T33	470
all_values[9]	auto[1]	auto[0]	396301	1			T31	153		T32	6141		T33	82
all_values[9]	auto[1]	auto[1]	3618676	1			T31	984		T32	46800		T33	321
all_values[10]	auto[0]	auto[0]	2594259	1			T26	828		T27	283		T28	1
all_values[10]	auto[0]	auto[1]	3629141	1			T31	746		T32	46123		T33	423
all_values[10]	auto[1]	auto[0]	386245	1			T31	182		T32	5405		T33	52
all_values[10]	auto[1]	auto[1]	3571770	1			T31	887		T32	47826		T33	440
all_values[11]	auto[0]	auto[0]	2590827	1			T26	828		T27	283		T28	1
all_values[11]	auto[0]	auto[1]	3591999	1			T31	724		T32	48597		T33	513
all_values[11]	auto[1]	auto[0]	385308	1			T31	107		T32	5096		T33	82
all_values[11]	auto[1]	auto[1]	3613281	1			T31	988		T32	44987		T33	296
all_values[12]	auto[0]	auto[0]	2588797	1			T26	828		T27	283		T28	1
all_values[12]	auto[0]	auto[1]	3605341	1			T31	837		T32	46095		T33	340
all_values[12]	auto[1]	auto[0]	386732	1			T31	102		T32	5500		T33	106
all_values[12]	auto[1]	auto[1]	3600545	1			T31	812		T32	47537		T33	414
all_values[13]	auto[0]	auto[0]	2595483	1			T26	828		T27	283		T28	1
all_values[13]	auto[0]	auto[1]	3643010	1			T31	946		T32	49169		T33	474
all_values[13]	auto[1]	auto[0]	392446	1			T31	133		T32	5173		T33	52
all_values[13]	auto[1]	auto[1]	3550476	1			T31	755		T32	45023		T33	392
all_values[14]	auto[0]	auto[0]	2585814	1			T26	828		T27	283		T28	1
all_values[14]	auto[0]	auto[1]	3605092	1			T31	919		T32	46608		T33	343
all_values[14]	auto[1]	auto[0]	387922	1			T31	83		T32	5425		T33	57
all_values[14]	auto[1]	auto[1]	3602587	1			T31	803		T32	47737		T33	516
all_values[15]	auto[0]	auto[0]	2597215	1			T26	828		T27	283		T28	1
all_values[15]	auto[0]	auto[1]	3599653	1			T31	1039		T32	45659		T33	411
all_values[15]	auto[1]	auto[0]	382941	1			T31	106		T32	5354		T33	63
all_values[15]	auto[1]	auto[1]	3601606	1			T31	722		T32	47996		T33	434
all_values[16]	auto[0]	auto[0]	2586968	1			T26	828		T27	283		T28	1
all_values[16]	auto[0]	auto[1]	3609010	1			T31	809		T32	49111		T33	282
all_values[16]	auto[1]	auto[0]	384054	1			T31	134		T32	4978		T33	101
all_values[16]	auto[1]	auto[1]	3601383	1			T31	894		T32	45355		T33	501
all_values[17]	auto[0]	auto[0]	2584220	1			T26	828		T27	283		T28	1
all_values[17]	auto[0]	auto[1]	3592377	1			T31	847		T32	49256		T33	400
all_values[17]	auto[1]	auto[0]	387957	1			T31	74		T32	4994		T33	41
all_values[17]	auto[1]	auto[1]	3616861	1			T31	869		T32	45086		T33	503
all_values[18]	auto[0]	auto[0]	2588820	1			T26	828		T27	283		T28	1
all_values[18]	auto[0]	auto[1]	3601417	1			T31	888		T32	48192		T33	342
all_values[18]	auto[1]	auto[0]	384159	1			T31	129		T32	5152		T33	125
all_values[18]	auto[1]	auto[1]	3607019	1			T31	756		T32	45873		T33	405
all_values[19]	auto[0]	auto[0]	2585278	1			T26	828		T27	283		T28	1
all_values[19]	auto[0]	auto[1]	3586685	1			T31	927		T32	49220		T33	428
all_values[19]	auto[1]	auto[0]	381469	1			T31	59		T32	5042		T33	32
all_values[19]	auto[1]	auto[1]	3627983	1			T31	842		T32	44800		T33	430
all_values[20]	auto[0]	auto[0]	2582920	1			T26	828		T27	283		T28	1
all_values[20]	auto[0]	auto[1]	3604230	1			T31	892		T32	45032		T33	204
all_values[20]	auto[1]	auto[0]	386679	1			T31	89		T32	5358		T33	108
all_values[20]	auto[1]	auto[1]	3607586	1			T31	752		T32	48977		T33	642
all_values[21]	auto[0]	auto[0]	2585282	1			T26	828		T27	283		T28	1
all_values[21]	auto[0]	auto[1]	3604788	1			T31	841		T32	48165		T33	415
all_values[21]	auto[1]	auto[0]	385580	1			T31	83		T32	5009		T33	56
all_values[21]	auto[1]	auto[1]	3605765	1			T31	852		T32	45920		T33	491
all_values[22]	auto[0]	auto[0]	2583412	1			T26	828		T27	283		T28	1
all_values[22]	auto[0]	auto[1]	3610154	1			T31	772		T32	45767		T33	488
all_values[22]	auto[1]	auto[0]	391119	1			T31	205		T32	6380		T33	34
all_values[22]	auto[1]	auto[1]	3596730	1			T31	841		T32	47314		T33	371
all_values[23]	auto[0]	auto[0]	2589661	1			T26	828		T27	283		T28	1
all_values[23]	auto[0]	auto[1]	3614477	1			T31	760		T32	44674		T33	436
all_values[23]	auto[1]	auto[0]	387989	1			T31	120		T32	5402		T33	39
all_values[23]	auto[1]	auto[1]	3589288	1			T31	954		T32	49333		T33	458
all_values[24]	auto[0]	auto[0]	2591361	1			T26	828		T27	283		T28	1
all_values[24]	auto[0]	auto[1]	3624451	1			T31	782		T32	47283		T33	517
all_values[24]	auto[1]	auto[0]	384508	1			T31	88		T32	5289		T33	67
all_values[24]	auto[1]	auto[1]	3581095	1			T31	934		T32	46820		T33	307
all_values[25]	auto[0]	auto[0]	2590612	1			T26	828		T27	283		T28	1
all_values[25]	auto[0]	auto[1]	3613017	1			T31	973		T32	47906		T33	459
all_values[25]	auto[1]	auto[0]	390114	1			T31	104		T32	5720		T33	33
all_values[25]	auto[1]	auto[1]	3587672	1			T31	694		T32	45967		T33	454
all_values[26]	auto[0]	auto[0]	2592286	1			T26	828		T27	283		T28	1
all_values[26]	auto[0]	auto[1]	3597931	1			T31	863		T32	48896		T33	480
all_values[26]	auto[1]	auto[0]	384501	1			T31	109		T32	4952		T33	35
all_values[26]	auto[1]	auto[1]	3606697	1			T31	807		T32	45435		T33	433
all_values[27]	auto[0]	auto[0]	2584972	1			T26	828		T27	283		T28	1
all_values[27]	auto[0]	auto[1]	3668048	1			T31	1012		T32	48013		T33	287
all_values[27]	auto[1]	auto[0]	394124	1			T31	144		T32	5374		T33	139
all_values[27]	auto[1]	auto[1]	3534271	1			T31	609		T32	46009		T33	490
all_values[28]	auto[0]	auto[0]	2590838	1			T26	828		T27	283		T28	1
all_values[28]	auto[0]	auto[1]	3586592	1			T31	633		T32	45600		T33	440
all_values[28]	auto[1]	auto[0]	393824	1			T31	113		T32	5675		T33	42
all_values[28]	auto[1]	auto[1]	3610161	1			T31	1084		T32	48240		T33	439
all_values[29]	auto[0]	auto[0]	2585613	1			T26	828		T27	283		T28	1
all_values[29]	auto[0]	auto[1]	3618440	1			T31	686		T32	46770		T33	308
all_values[29]	auto[1]	auto[0]	381325	1			T31	160		T32	5218		T33	149
all_values[29]	auto[1]	auto[1]	3596037	1			T31	969		T32	46161		T33	471
all_values[30]	auto[0]	auto[0]	2585928	1			T26	828		T27	283		T28	1
all_values[30]	auto[0]	auto[1]	3626746	1			T31	722		T32	45714		T33	455
all_values[30]	auto[1]	auto[0]	385899	1			T31	115		T32	5495		T33	47
all_values[30]	auto[1]	auto[1]	3582842	1			T31	1018		T32	48266		T33	387
all_values[31]	auto[0]	auto[0]	2595692	1			T26	828		T27	283		T28	1
all_values[31]	auto[0]	auto[1]	3602687	1			T31	942		T32	47568		T33	355
all_values[31]	auto[1]	auto[0]	384691	1			T31	67		T32	5865		T33	58
all_values[31]	auto[1]	auto[1]	3598345	1			T31	774		T32	45961		T33	471