cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52787 |
1 |
|
|
T26 |
1625 |
|
T36 |
574 |
|
T72 |
1712 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45112 |
1 |
|
|
T26 |
909 |
|
T36 |
314 |
|
T72 |
925 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52680 |
1 |
|
|
T26 |
675 |
|
T36 |
1076 |
|
T72 |
1895 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46761 |
1 |
|
|
T26 |
479 |
|
T36 |
1044 |
|
T72 |
2643 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T26 |
34 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T26 |
32 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T26 |
34 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T26 |
31 |
|
T36 |
21 |
|
T72 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T26 |
34 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T26 |
31 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T26 |
33 |
|
T36 |
20 |
|
T72 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T26 |
32 |
|
T36 |
20 |
|
T72 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T26 |
28 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T26 |
28 |
|
T36 |
21 |
|
T72 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T26 |
26 |
|
T36 |
21 |
|
T72 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T26 |
31 |
|
T36 |
18 |
|
T72 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T26 |
30 |
|
T36 |
18 |
|
T72 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T26 |
25 |
|
T36 |
20 |
|
T72 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T26 |
29 |
|
T36 |
17 |
|
T72 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T26 |
29 |
|
T36 |
17 |
|
T72 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T26 |
29 |
|
T36 |
16 |
|
T72 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T26 |
29 |
|
T36 |
16 |
|
T72 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T26 |
29 |
|
T36 |
15 |
|
T72 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T26 |
29 |
|
T36 |
15 |
|
T72 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T26 |
12 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T26 |
18 |
|
T36 |
19 |
|
T72 |
41 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55321 |
1 |
|
|
T26 |
956 |
|
T36 |
1074 |
|
T72 |
3214 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43245 |
1 |
|
|
T26 |
1452 |
|
T36 |
584 |
|
T72 |
1303 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53707 |
1 |
|
|
T26 |
765 |
|
T36 |
621 |
|
T72 |
1361 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45291 |
1 |
|
|
T26 |
562 |
|
T36 |
570 |
|
T72 |
1246 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T26 |
28 |
|
T36 |
28 |
|
T72 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T26 |
25 |
|
T36 |
30 |
|
T72 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T26 |
27 |
|
T36 |
28 |
|
T72 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T26 |
24 |
|
T36 |
29 |
|
T72 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T26 |
27 |
|
T36 |
26 |
|
T72 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T26 |
24 |
|
T36 |
28 |
|
T72 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T26 |
27 |
|
T36 |
26 |
|
T72 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T26 |
24 |
|
T36 |
28 |
|
T72 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T26 |
27 |
|
T36 |
25 |
|
T72 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T26 |
23 |
|
T36 |
27 |
|
T72 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T26 |
23 |
|
T36 |
27 |
|
T72 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T26 |
25 |
|
T36 |
24 |
|
T72 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T26 |
25 |
|
T36 |
24 |
|
T72 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T26 |
25 |
|
T36 |
23 |
|
T72 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T26 |
25 |
|
T36 |
23 |
|
T72 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T26 |
24 |
|
T36 |
23 |
|
T72 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T26 |
20 |
|
T36 |
24 |
|
T72 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T26 |
18 |
|
T36 |
23 |
|
T72 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T26 |
17 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51732 |
1 |
|
|
T26 |
522 |
|
T36 |
485 |
|
T72 |
1475 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47048 |
1 |
|
|
T26 |
1625 |
|
T36 |
800 |
|
T72 |
1417 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52691 |
1 |
|
|
T26 |
543 |
|
T36 |
1102 |
|
T72 |
2728 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44293 |
1 |
|
|
T26 |
983 |
|
T36 |
511 |
|
T72 |
1381 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T26 |
35 |
|
T36 |
30 |
|
T72 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T26 |
35 |
|
T36 |
24 |
|
T72 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T26 |
35 |
|
T36 |
29 |
|
T72 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T26 |
35 |
|
T36 |
24 |
|
T72 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T26 |
35 |
|
T36 |
29 |
|
T72 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T26 |
35 |
|
T36 |
21 |
|
T72 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T26 |
35 |
|
T36 |
29 |
|
T72 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T26 |
34 |
|
T36 |
20 |
|
T72 |
63 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T26 |
34 |
|
T36 |
28 |
|
T72 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T26 |
34 |
|
T36 |
20 |
|
T72 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T26 |
33 |
|
T36 |
27 |
|
T72 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T26 |
33 |
|
T36 |
20 |
|
T72 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T26 |
31 |
|
T36 |
27 |
|
T72 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T26 |
33 |
|
T36 |
20 |
|
T72 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T26 |
31 |
|
T36 |
27 |
|
T72 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T26 |
33 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T26 |
30 |
|
T36 |
26 |
|
T72 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T26 |
31 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T26 |
30 |
|
T36 |
26 |
|
T72 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T26 |
31 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T26 |
30 |
|
T36 |
26 |
|
T72 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T26 |
31 |
|
T36 |
20 |
|
T72 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T26 |
27 |
|
T36 |
26 |
|
T72 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T26 |
29 |
|
T36 |
19 |
|
T72 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T26 |
27 |
|
T36 |
26 |
|
T72 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T26 |
29 |
|
T36 |
19 |
|
T72 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T26 |
26 |
|
T36 |
26 |
|
T72 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T26 |
28 |
|
T36 |
19 |
|
T72 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T26 |
28 |
|
T36 |
18 |
|
T72 |
52 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51744 |
1 |
|
|
T26 |
291 |
|
T36 |
1490 |
|
T72 |
1643 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38520 |
1 |
|
|
T26 |
830 |
|
T36 |
535 |
|
T72 |
2065 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65629 |
1 |
|
|
T26 |
1799 |
|
T36 |
421 |
|
T72 |
2333 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41896 |
1 |
|
|
T26 |
789 |
|
T36 |
598 |
|
T72 |
1087 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T26 |
38 |
|
T36 |
23 |
|
T72 |
71 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T26 |
35 |
|
T36 |
24 |
|
T72 |
67 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T26 |
37 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T26 |
33 |
|
T36 |
24 |
|
T72 |
65 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T26 |
35 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T26 |
32 |
|
T36 |
24 |
|
T72 |
64 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T26 |
35 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
32 |
|
T36 |
23 |
|
T72 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T26 |
35 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
32 |
|
T36 |
23 |
|
T72 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
7 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T26 |
34 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T26 |
31 |
|
T36 |
23 |
|
T72 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T26 |
34 |
|
T36 |
23 |
|
T72 |
67 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T26 |
29 |
|
T36 |
23 |
|
T72 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T26 |
34 |
|
T36 |
21 |
|
T72 |
67 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T26 |
27 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T26 |
34 |
|
T36 |
21 |
|
T72 |
66 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T26 |
34 |
|
T36 |
20 |
|
T72 |
64 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T26 |
33 |
|
T36 |
19 |
|
T72 |
64 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T26 |
30 |
|
T36 |
19 |
|
T72 |
64 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T26 |
30 |
|
T36 |
19 |
|
T72 |
63 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T26 |
30 |
|
T36 |
19 |
|
T72 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
6 |
|
T36 |
7 |
|
T72 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1108 |
1 |
|
|
T26 |
30 |
|
T36 |
18 |
|
T72 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1078 |
1 |
|
|
T26 |
22 |
|
T36 |
18 |
|
T72 |
38 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52220 |
1 |
|
|
T26 |
694 |
|
T36 |
573 |
|
T72 |
1653 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39448 |
1 |
|
|
T26 |
671 |
|
T36 |
770 |
|
T72 |
1124 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58814 |
1 |
|
|
T26 |
1866 |
|
T36 |
297 |
|
T72 |
1850 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46682 |
1 |
|
|
T26 |
554 |
|
T36 |
1230 |
|
T72 |
2493 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T26 |
34 |
|
T36 |
26 |
|
T72 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T26 |
32 |
|
T36 |
32 |
|
T72 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T26 |
32 |
|
T36 |
32 |
|
T72 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T26 |
31 |
|
T36 |
31 |
|
T72 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T26 |
30 |
|
T36 |
31 |
|
T72 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T26 |
32 |
|
T36 |
25 |
|
T72 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T26 |
29 |
|
T36 |
30 |
|
T72 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T26 |
7 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T26 |
31 |
|
T36 |
25 |
|
T72 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T26 |
29 |
|
T36 |
30 |
|
T72 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T26 |
30 |
|
T36 |
25 |
|
T72 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T26 |
27 |
|
T36 |
30 |
|
T72 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T26 |
30 |
|
T36 |
24 |
|
T72 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T26 |
27 |
|
T36 |
30 |
|
T72 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T26 |
29 |
|
T36 |
24 |
|
T72 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T26 |
27 |
|
T36 |
29 |
|
T72 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T26 |
28 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T26 |
27 |
|
T36 |
28 |
|
T72 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T26 |
27 |
|
T36 |
23 |
|
T72 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T26 |
26 |
|
T36 |
28 |
|
T72 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T26 |
27 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T26 |
23 |
|
T36 |
28 |
|
T72 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T26 |
27 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T26 |
23 |
|
T36 |
27 |
|
T72 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T26 |
26 |
|
T36 |
21 |
|
T72 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
6 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T26 |
25 |
|
T36 |
21 |
|
T72 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
9 |
|
T36 |
5 |
|
T72 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T26 |
22 |
|
T36 |
25 |
|
T72 |
47 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54778 |
1 |
|
|
T26 |
483 |
|
T36 |
620 |
|
T72 |
2093 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43046 |
1 |
|
|
T26 |
588 |
|
T36 |
508 |
|
T72 |
2084 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55584 |
1 |
|
|
T26 |
890 |
|
T36 |
1135 |
|
T72 |
1535 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42984 |
1 |
|
|
T26 |
1641 |
|
T36 |
584 |
|
T72 |
1462 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T26 |
40 |
|
T36 |
31 |
|
T72 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T26 |
39 |
|
T36 |
32 |
|
T72 |
61 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T26 |
39 |
|
T36 |
30 |
|
T72 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T26 |
37 |
|
T36 |
31 |
|
T72 |
61 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T26 |
38 |
|
T36 |
29 |
|
T72 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T26 |
35 |
|
T36 |
31 |
|
T72 |
59 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T26 |
38 |
|
T36 |
27 |
|
T72 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T26 |
34 |
|
T36 |
30 |
|
T72 |
57 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T26 |
37 |
|
T36 |
27 |
|
T72 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T26 |
34 |
|
T36 |
29 |
|
T72 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T26 |
36 |
|
T36 |
25 |
|
T72 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T26 |
33 |
|
T36 |
27 |
|
T72 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T26 |
33 |
|
T36 |
25 |
|
T72 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
31 |
|
T36 |
27 |
|
T72 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T26 |
33 |
|
T36 |
25 |
|
T72 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T26 |
31 |
|
T36 |
26 |
|
T72 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T26 |
31 |
|
T36 |
25 |
|
T72 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T26 |
29 |
|
T36 |
26 |
|
T72 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T26 |
30 |
|
T36 |
25 |
|
T72 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T26 |
29 |
|
T36 |
25 |
|
T72 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T26 |
29 |
|
T36 |
24 |
|
T72 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T26 |
29 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T26 |
27 |
|
T36 |
23 |
|
T72 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T26 |
29 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T26 |
27 |
|
T36 |
22 |
|
T72 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T26 |
28 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T26 |
27 |
|
T36 |
20 |
|
T72 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T26 |
27 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T26 |
27 |
|
T36 |
20 |
|
T72 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
11 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T26 |
26 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53295 |
1 |
|
|
T26 |
1923 |
|
T36 |
727 |
|
T72 |
3164 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42548 |
1 |
|
|
T26 |
814 |
|
T36 |
448 |
|
T72 |
1104 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56982 |
1 |
|
|
T26 |
427 |
|
T36 |
1202 |
|
T72 |
1827 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44291 |
1 |
|
|
T26 |
566 |
|
T36 |
529 |
|
T72 |
1015 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T26 |
34 |
|
T36 |
26 |
|
T72 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T26 |
35 |
|
T36 |
23 |
|
T72 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T26 |
34 |
|
T36 |
26 |
|
T72 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T26 |
32 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T26 |
32 |
|
T36 |
23 |
|
T72 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T26 |
33 |
|
T36 |
25 |
|
T72 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T26 |
30 |
|
T36 |
23 |
|
T72 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T26 |
33 |
|
T36 |
24 |
|
T72 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T26 |
30 |
|
T36 |
23 |
|
T72 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T26 |
33 |
|
T36 |
22 |
|
T72 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T26 |
30 |
|
T36 |
23 |
|
T72 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T26 |
33 |
|
T36 |
22 |
|
T72 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T26 |
28 |
|
T36 |
23 |
|
T72 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T26 |
33 |
|
T36 |
20 |
|
T72 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T26 |
28 |
|
T36 |
23 |
|
T72 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T26 |
32 |
|
T36 |
20 |
|
T72 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T26 |
28 |
|
T36 |
23 |
|
T72 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T26 |
26 |
|
T36 |
23 |
|
T72 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T26 |
25 |
|
T36 |
22 |
|
T72 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T26 |
31 |
|
T36 |
18 |
|
T72 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T26 |
30 |
|
T36 |
14 |
|
T72 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
7 |
|
T36 |
13 |
|
T72 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1118 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
35 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52230 |
1 |
|
|
T26 |
935 |
|
T36 |
447 |
|
T72 |
1750 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40464 |
1 |
|
|
T26 |
455 |
|
T36 |
572 |
|
T72 |
1319 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55621 |
1 |
|
|
T26 |
1049 |
|
T36 |
519 |
|
T72 |
1234 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49533 |
1 |
|
|
T26 |
1432 |
|
T36 |
1289 |
|
T72 |
2696 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T26 |
21 |
|
T36 |
25 |
|
T72 |
70 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T26 |
19 |
|
T36 |
31 |
|
T72 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T26 |
21 |
|
T36 |
25 |
|
T72 |
67 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T26 |
18 |
|
T36 |
31 |
|
T72 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T26 |
21 |
|
T36 |
25 |
|
T72 |
67 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T26 |
18 |
|
T36 |
28 |
|
T72 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T26 |
20 |
|
T36 |
25 |
|
T72 |
67 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T26 |
17 |
|
T36 |
28 |
|
T72 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T26 |
17 |
|
T36 |
28 |
|
T72 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T26 |
16 |
|
T36 |
28 |
|
T72 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T26 |
16 |
|
T36 |
27 |
|
T72 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T26 |
16 |
|
T36 |
26 |
|
T72 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T26 |
16 |
|
T36 |
26 |
|
T72 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T26 |
18 |
|
T36 |
23 |
|
T72 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T26 |
14 |
|
T36 |
26 |
|
T72 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T26 |
18 |
|
T36 |
23 |
|
T72 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T26 |
14 |
|
T36 |
25 |
|
T72 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T26 |
18 |
|
T36 |
23 |
|
T72 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T26 |
14 |
|
T36 |
24 |
|
T72 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T26 |
18 |
|
T36 |
22 |
|
T72 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T26 |
13 |
|
T36 |
24 |
|
T72 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T26 |
18 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T26 |
12 |
|
T36 |
23 |
|
T72 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
15 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T26 |
18 |
|
T36 |
20 |
|
T72 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
8 |
|
T72 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T26 |
11 |
|
T36 |
23 |
|
T72 |
45 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57876 |
1 |
|
|
T26 |
618 |
|
T36 |
1281 |
|
T72 |
2206 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46239 |
1 |
|
|
T26 |
509 |
|
T36 |
667 |
|
T72 |
2527 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47565 |
1 |
|
|
T26 |
848 |
|
T36 |
621 |
|
T72 |
1286 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45612 |
1 |
|
|
T26 |
1722 |
|
T36 |
378 |
|
T72 |
1157 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T26 |
30 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T26 |
32 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T26 |
28 |
|
T36 |
21 |
|
T72 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T26 |
32 |
|
T36 |
19 |
|
T72 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T26 |
26 |
|
T36 |
21 |
|
T72 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T26 |
31 |
|
T36 |
19 |
|
T72 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T26 |
24 |
|
T36 |
20 |
|
T72 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T26 |
31 |
|
T36 |
19 |
|
T72 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T26 |
24 |
|
T36 |
20 |
|
T72 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T26 |
31 |
|
T36 |
19 |
|
T72 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T26 |
24 |
|
T36 |
20 |
|
T72 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T26 |
31 |
|
T36 |
19 |
|
T72 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T26 |
24 |
|
T36 |
20 |
|
T72 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T26 |
31 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T26 |
31 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T26 |
31 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T26 |
23 |
|
T36 |
19 |
|
T72 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T26 |
22 |
|
T36 |
19 |
|
T72 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T26 |
21 |
|
T36 |
19 |
|
T72 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T26 |
21 |
|
T36 |
19 |
|
T72 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T26 |
29 |
|
T36 |
16 |
|
T72 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T26 |
21 |
|
T36 |
19 |
|
T72 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T26 |
29 |
|
T36 |
16 |
|
T72 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T26 |
21 |
|
T36 |
19 |
|
T72 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T26 |
11 |
|
T36 |
13 |
|
T72 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T26 |
27 |
|
T36 |
16 |
|
T72 |
41 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53184 |
1 |
|
|
T26 |
1426 |
|
T36 |
782 |
|
T72 |
2656 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46791 |
1 |
|
|
T26 |
801 |
|
T36 |
483 |
|
T72 |
1359 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59010 |
1 |
|
|
T26 |
1153 |
|
T36 |
737 |
|
T72 |
1845 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38482 |
1 |
|
|
T26 |
576 |
|
T36 |
934 |
|
T72 |
1170 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T26 |
23 |
|
T36 |
28 |
|
T72 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T26 |
21 |
|
T36 |
28 |
|
T72 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T26 |
21 |
|
T36 |
28 |
|
T72 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T26 |
20 |
|
T36 |
28 |
|
T72 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
11 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T26 |
20 |
|
T36 |
26 |
|
T72 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T26 |
19 |
|
T36 |
26 |
|
T72 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T26 |
19 |
|
T36 |
20 |
|
T72 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T26 |
19 |
|
T36 |
20 |
|
T72 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T26 |
18 |
|
T36 |
17 |
|
T72 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T26 |
17 |
|
T36 |
17 |
|
T72 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T26 |
10 |
|
T36 |
7 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T26 |
17 |
|
T36 |
17 |
|
T72 |
40 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61031 |
1 |
|
|
T26 |
762 |
|
T36 |
1090 |
|
T72 |
2808 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42198 |
1 |
|
|
T26 |
1579 |
|
T36 |
323 |
|
T72 |
1205 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50068 |
1 |
|
|
T26 |
979 |
|
T36 |
1048 |
|
T72 |
1801 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44750 |
1 |
|
|
T26 |
432 |
|
T36 |
485 |
|
T72 |
1278 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T26 |
26 |
|
T36 |
23 |
|
T72 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T26 |
26 |
|
T36 |
25 |
|
T72 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T26 |
24 |
|
T36 |
23 |
|
T72 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T26 |
26 |
|
T36 |
25 |
|
T72 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T26 |
23 |
|
T36 |
24 |
|
T72 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T26 |
20 |
|
T36 |
24 |
|
T72 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T26 |
20 |
|
T36 |
24 |
|
T72 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T26 |
22 |
|
T36 |
17 |
|
T72 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T26 |
22 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T26 |
20 |
|
T36 |
21 |
|
T72 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T26 |
21 |
|
T36 |
15 |
|
T72 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T26 |
19 |
|
T36 |
20 |
|
T72 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T26 |
21 |
|
T36 |
15 |
|
T72 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T26 |
17 |
|
T36 |
20 |
|
T72 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T26 |
21 |
|
T36 |
15 |
|
T72 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T26 |
17 |
|
T36 |
19 |
|
T72 |
38 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56293 |
1 |
|
|
T26 |
539 |
|
T36 |
890 |
|
T72 |
1549 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41513 |
1 |
|
|
T26 |
752 |
|
T36 |
1066 |
|
T72 |
1518 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52950 |
1 |
|
|
T26 |
769 |
|
T36 |
542 |
|
T72 |
1568 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46622 |
1 |
|
|
T26 |
1547 |
|
T36 |
565 |
|
T72 |
2529 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T26 |
39 |
|
T36 |
24 |
|
T72 |
62 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T26 |
36 |
|
T36 |
25 |
|
T72 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T26 |
39 |
|
T36 |
24 |
|
T72 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T26 |
36 |
|
T36 |
25 |
|
T72 |
61 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T26 |
38 |
|
T36 |
24 |
|
T72 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T26 |
35 |
|
T36 |
25 |
|
T72 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T26 |
37 |
|
T36 |
24 |
|
T72 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T26 |
35 |
|
T36 |
23 |
|
T72 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T26 |
35 |
|
T36 |
24 |
|
T72 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T26 |
35 |
|
T36 |
22 |
|
T72 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T26 |
34 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T26 |
35 |
|
T36 |
21 |
|
T72 |
57 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T26 |
33 |
|
T36 |
22 |
|
T72 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T26 |
34 |
|
T36 |
21 |
|
T72 |
57 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T26 |
32 |
|
T36 |
21 |
|
T72 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T26 |
32 |
|
T36 |
20 |
|
T72 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T26 |
32 |
|
T36 |
20 |
|
T72 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T26 |
31 |
|
T36 |
20 |
|
T72 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T26 |
32 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T26 |
31 |
|
T36 |
20 |
|
T72 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T26 |
30 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T26 |
30 |
|
T36 |
19 |
|
T72 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T26 |
29 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T26 |
30 |
|
T36 |
18 |
|
T72 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T26 |
27 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T26 |
27 |
|
T36 |
19 |
|
T72 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
8 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T26 |
26 |
|
T36 |
19 |
|
T72 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
11 |
|
T36 |
6 |
|
T72 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T26 |
29 |
|
T36 |
17 |
|
T72 |
45 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52776 |
1 |
|
|
T26 |
798 |
|
T36 |
1502 |
|
T72 |
1361 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40909 |
1 |
|
|
T26 |
1632 |
|
T36 |
439 |
|
T72 |
1371 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53468 |
1 |
|
|
T26 |
637 |
|
T36 |
888 |
|
T72 |
1480 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50453 |
1 |
|
|
T26 |
612 |
|
T36 |
293 |
|
T72 |
2820 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T26 |
34 |
|
T36 |
19 |
|
T72 |
70 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T26 |
32 |
|
T36 |
15 |
|
T72 |
66 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T26 |
32 |
|
T36 |
19 |
|
T72 |
68 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T26 |
32 |
|
T36 |
15 |
|
T72 |
65 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T26 |
32 |
|
T36 |
19 |
|
T72 |
68 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T26 |
30 |
|
T36 |
14 |
|
T72 |
64 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
65 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T26 |
30 |
|
T36 |
13 |
|
T72 |
62 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T26 |
32 |
|
T36 |
17 |
|
T72 |
65 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T26 |
30 |
|
T36 |
13 |
|
T72 |
62 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
62 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
29 |
|
T36 |
13 |
|
T72 |
61 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
60 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T26 |
28 |
|
T36 |
12 |
|
T72 |
61 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T26 |
25 |
|
T36 |
11 |
|
T72 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T26 |
28 |
|
T36 |
17 |
|
T72 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T26 |
24 |
|
T36 |
10 |
|
T72 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T26 |
27 |
|
T36 |
16 |
|
T72 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T26 |
23 |
|
T36 |
10 |
|
T72 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T26 |
27 |
|
T36 |
15 |
|
T72 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T26 |
21 |
|
T36 |
10 |
|
T72 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T26 |
27 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T26 |
20 |
|
T36 |
10 |
|
T72 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T26 |
27 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
12 |
|
T36 |
13 |
|
T72 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T26 |
20 |
|
T36 |
10 |
|
T72 |
47 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60575 |
1 |
|
|
T26 |
891 |
|
T36 |
1239 |
|
T72 |
2792 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41599 |
1 |
|
|
T26 |
1554 |
|
T36 |
614 |
|
T72 |
1503 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52719 |
1 |
|
|
T26 |
742 |
|
T36 |
603 |
|
T72 |
1472 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42924 |
1 |
|
|
T26 |
610 |
|
T36 |
396 |
|
T72 |
1194 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T26 |
26 |
|
T36 |
27 |
|
T72 |
67 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T26 |
24 |
|
T36 |
25 |
|
T72 |
67 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T26 |
25 |
|
T36 |
27 |
|
T72 |
64 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T26 |
24 |
|
T36 |
24 |
|
T72 |
65 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
63 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T26 |
24 |
|
T36 |
24 |
|
T72 |
63 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T26 |
24 |
|
T36 |
24 |
|
T72 |
63 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T26 |
24 |
|
T36 |
23 |
|
T72 |
62 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T26 |
23 |
|
T36 |
23 |
|
T72 |
62 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T26 |
23 |
|
T36 |
23 |
|
T72 |
60 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T26 |
23 |
|
T36 |
23 |
|
T72 |
59 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T26 |
23 |
|
T36 |
23 |
|
T72 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T26 |
14 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T26 |
23 |
|
T36 |
22 |
|
T72 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T26 |
22 |
|
T36 |
18 |
|
T72 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T26 |
22 |
|
T36 |
16 |
|
T72 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T26 |
20 |
|
T36 |
16 |
|
T72 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T26 |
14 |
|
T36 |
13 |
|
T72 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
44 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55434 |
1 |
|
|
T26 |
759 |
|
T36 |
656 |
|
T72 |
2401 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44473 |
1 |
|
|
T26 |
660 |
|
T36 |
834 |
|
T72 |
1161 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55449 |
1 |
|
|
T26 |
1788 |
|
T36 |
990 |
|
T72 |
1375 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42339 |
1 |
|
|
T26 |
552 |
|
T36 |
481 |
|
T72 |
2297 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T26 |
28 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T26 |
26 |
|
T36 |
22 |
|
T72 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T26 |
28 |
|
T36 |
20 |
|
T72 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T26 |
26 |
|
T36 |
22 |
|
T72 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T26 |
28 |
|
T36 |
20 |
|
T72 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T26 |
25 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T26 |
27 |
|
T36 |
19 |
|
T72 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T26 |
25 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T26 |
26 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T26 |
25 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T26 |
25 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T26 |
24 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T26 |
24 |
|
T36 |
16 |
|
T72 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T26 |
24 |
|
T36 |
22 |
|
T72 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T26 |
24 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T26 |
24 |
|
T36 |
13 |
|
T72 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T26 |
23 |
|
T36 |
12 |
|
T72 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T26 |
21 |
|
T36 |
22 |
|
T72 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T26 |
23 |
|
T36 |
11 |
|
T72 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T26 |
21 |
|
T36 |
22 |
|
T72 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T26 |
22 |
|
T36 |
11 |
|
T72 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1096 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T26 |
21 |
|
T36 |
10 |
|
T72 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1068 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
40 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54888 |
1 |
|
|
T26 |
1785 |
|
T36 |
524 |
|
T72 |
1401 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49939 |
1 |
|
|
T26 |
645 |
|
T36 |
338 |
|
T72 |
2765 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51052 |
1 |
|
|
T26 |
802 |
|
T36 |
1070 |
|
T72 |
1711 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41450 |
1 |
|
|
T26 |
587 |
|
T36 |
1099 |
|
T72 |
1215 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T26 |
26 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T26 |
25 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T26 |
23 |
|
T36 |
19 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T26 |
26 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T26 |
23 |
|
T36 |
18 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T26 |
24 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T26 |
22 |
|
T36 |
18 |
|
T72 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
24 |
|
T36 |
17 |
|
T72 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T26 |
22 |
|
T36 |
18 |
|
T72 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T26 |
23 |
|
T36 |
17 |
|
T72 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T26 |
22 |
|
T36 |
16 |
|
T72 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T26 |
22 |
|
T36 |
17 |
|
T72 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T26 |
21 |
|
T36 |
16 |
|
T72 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T26 |
21 |
|
T36 |
17 |
|
T72 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T26 |
18 |
|
T36 |
15 |
|
T72 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T26 |
17 |
|
T36 |
15 |
|
T72 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T26 |
17 |
|
T36 |
14 |
|
T72 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T26 |
17 |
|
T36 |
13 |
|
T72 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T26 |
18 |
|
T36 |
16 |
|
T72 |
38 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54769 |
1 |
|
|
T26 |
755 |
|
T36 |
482 |
|
T72 |
1659 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40667 |
1 |
|
|
T26 |
564 |
|
T36 |
1178 |
|
T72 |
1302 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55935 |
1 |
|
|
T26 |
2119 |
|
T36 |
835 |
|
T72 |
2296 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45142 |
1 |
|
|
T26 |
364 |
|
T36 |
411 |
|
T72 |
1738 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
68 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
75 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
64 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T26 |
19 |
|
T36 |
24 |
|
T72 |
73 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
62 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
72 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T26 |
21 |
|
T36 |
25 |
|
T72 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
71 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
69 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
69 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T26 |
18 |
|
T36 |
22 |
|
T72 |
66 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T26 |
18 |
|
T36 |
21 |
|
T72 |
66 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T26 |
19 |
|
T36 |
24 |
|
T72 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T26 |
18 |
|
T36 |
21 |
|
T72 |
65 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T26 |
18 |
|
T36 |
23 |
|
T72 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T26 |
18 |
|
T36 |
21 |
|
T72 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T26 |
17 |
|
T36 |
23 |
|
T72 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T26 |
16 |
|
T36 |
19 |
|
T72 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T26 |
16 |
|
T36 |
23 |
|
T72 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T26 |
16 |
|
T36 |
19 |
|
T72 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T26 |
15 |
|
T36 |
23 |
|
T72 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T26 |
16 |
|
T36 |
17 |
|
T72 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T26 |
15 |
|
T36 |
23 |
|
T72 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T26 |
16 |
|
T36 |
15 |
|
T72 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
16 |
|
T36 |
10 |
|
T72 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T26 |
15 |
|
T36 |
22 |
|
T72 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T26 |
19 |
|
T36 |
10 |
|
T72 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T26 |
16 |
|
T36 |
15 |
|
T72 |
56 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53019 |
1 |
|
|
T26 |
1797 |
|
T36 |
487 |
|
T72 |
2674 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38323 |
1 |
|
|
T26 |
695 |
|
T36 |
684 |
|
T72 |
1328 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57966 |
1 |
|
|
T26 |
870 |
|
T36 |
524 |
|
T72 |
1718 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47470 |
1 |
|
|
T26 |
485 |
|
T36 |
1120 |
|
T72 |
1213 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T26 |
23 |
|
T36 |
33 |
|
T72 |
71 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
66 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T26 |
22 |
|
T36 |
33 |
|
T72 |
70 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
65 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T26 |
21 |
|
T36 |
33 |
|
T72 |
68 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
63 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T26 |
21 |
|
T36 |
32 |
|
T72 |
67 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
62 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T26 |
21 |
|
T36 |
31 |
|
T72 |
65 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T26 |
22 |
|
T36 |
29 |
|
T72 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T26 |
21 |
|
T36 |
31 |
|
T72 |
65 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T26 |
21 |
|
T36 |
27 |
|
T72 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T26 |
21 |
|
T36 |
29 |
|
T72 |
64 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T26 |
21 |
|
T36 |
25 |
|
T72 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T26 |
21 |
|
T36 |
28 |
|
T72 |
64 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T26 |
20 |
|
T36 |
25 |
|
T72 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T26 |
21 |
|
T36 |
28 |
|
T72 |
63 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T26 |
20 |
|
T36 |
24 |
|
T72 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T26 |
20 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T26 |
20 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T26 |
20 |
|
T36 |
25 |
|
T72 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T26 |
19 |
|
T36 |
25 |
|
T72 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T26 |
18 |
|
T36 |
22 |
|
T72 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1089 |
1 |
|
|
T26 |
19 |
|
T36 |
24 |
|
T72 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
13 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1095 |
1 |
|
|
T26 |
18 |
|
T36 |
22 |
|
T72 |
43 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50656 |
1 |
|
|
T26 |
387 |
|
T36 |
971 |
|
T72 |
1989 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47288 |
1 |
|
|
T26 |
703 |
|
T36 |
502 |
|
T72 |
2260 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54722 |
1 |
|
|
T26 |
654 |
|
T36 |
1219 |
|
T72 |
1609 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43595 |
1 |
|
|
T26 |
1813 |
|
T36 |
360 |
|
T72 |
1297 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T26 |
41 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T26 |
39 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T26 |
40 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T26 |
39 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T26 |
39 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T26 |
39 |
|
T36 |
21 |
|
T72 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T26 |
39 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T26 |
38 |
|
T36 |
21 |
|
T72 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T26 |
38 |
|
T36 |
20 |
|
T72 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T26 |
37 |
|
T36 |
19 |
|
T72 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T26 |
37 |
|
T36 |
20 |
|
T72 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T26 |
37 |
|
T36 |
19 |
|
T72 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T26 |
36 |
|
T36 |
19 |
|
T72 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T26 |
37 |
|
T36 |
19 |
|
T72 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T26 |
34 |
|
T36 |
19 |
|
T72 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T26 |
36 |
|
T36 |
19 |
|
T72 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T26 |
34 |
|
T36 |
19 |
|
T72 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T26 |
36 |
|
T36 |
18 |
|
T72 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T26 |
33 |
|
T36 |
19 |
|
T72 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T26 |
35 |
|
T36 |
18 |
|
T72 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T26 |
32 |
|
T36 |
17 |
|
T72 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T26 |
33 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T26 |
32 |
|
T36 |
16 |
|
T72 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T26 |
32 |
|
T36 |
18 |
|
T72 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T26 |
7 |
|
T36 |
9 |
|
T72 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T26 |
28 |
|
T36 |
16 |
|
T72 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T26 |
30 |
|
T36 |
14 |
|
T72 |
45 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50867 |
1 |
|
|
T26 |
1108 |
|
T36 |
828 |
|
T72 |
2904 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45615 |
1 |
|
|
T26 |
472 |
|
T36 |
1124 |
|
T72 |
1391 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57044 |
1 |
|
|
T26 |
1860 |
|
T36 |
642 |
|
T72 |
1659 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43099 |
1 |
|
|
T26 |
522 |
|
T36 |
446 |
|
T72 |
1072 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T26 |
22 |
|
T36 |
21 |
|
T72 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T26 |
19 |
|
T36 |
23 |
|
T72 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T26 |
18 |
|
T36 |
22 |
|
T72 |
63 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T26 |
17 |
|
T36 |
22 |
|
T72 |
63 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T26 |
21 |
|
T36 |
20 |
|
T72 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T26 |
17 |
|
T36 |
22 |
|
T72 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T26 |
21 |
|
T36 |
19 |
|
T72 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T26 |
17 |
|
T36 |
19 |
|
T72 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T26 |
17 |
|
T36 |
19 |
|
T72 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T26 |
17 |
|
T36 |
19 |
|
T72 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T26 |
17 |
|
T36 |
18 |
|
T72 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T26 |
18 |
|
T36 |
18 |
|
T72 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T26 |
17 |
|
T36 |
18 |
|
T72 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T26 |
17 |
|
T36 |
18 |
|
T72 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T26 |
16 |
|
T36 |
18 |
|
T72 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T26 |
16 |
|
T36 |
18 |
|
T72 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T26 |
15 |
|
T36 |
18 |
|
T72 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T26 |
15 |
|
T36 |
17 |
|
T72 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T26 |
15 |
|
T36 |
18 |
|
T72 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T26 |
15 |
|
T36 |
15 |
|
T72 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
14 |
|
T36 |
8 |
|
T72 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T26 |
14 |
|
T36 |
18 |
|
T72 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T26 |
15 |
|
T36 |
15 |
|
T72 |
42 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57409 |
1 |
|
|
T26 |
1746 |
|
T36 |
1175 |
|
T72 |
1658 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44753 |
1 |
|
|
T26 |
475 |
|
T36 |
412 |
|
T72 |
1206 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55558 |
1 |
|
|
T26 |
1061 |
|
T36 |
612 |
|
T72 |
2842 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38629 |
1 |
|
|
T26 |
564 |
|
T36 |
664 |
|
T72 |
1234 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T26 |
22 |
|
T36 |
27 |
|
T72 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T26 |
23 |
|
T36 |
27 |
|
T72 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T26 |
22 |
|
T36 |
27 |
|
T72 |
62 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T26 |
23 |
|
T36 |
26 |
|
T72 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T26 |
22 |
|
T36 |
25 |
|
T72 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T26 |
22 |
|
T36 |
23 |
|
T72 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T26 |
15 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T26 |
20 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T26 |
22 |
|
T36 |
23 |
|
T72 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T26 |
22 |
|
T36 |
23 |
|
T72 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T26 |
17 |
|
T36 |
20 |
|
T72 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T26 |
16 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T26 |
16 |
|
T36 |
18 |
|
T72 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T26 |
16 |
|
T36 |
17 |
|
T72 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T26 |
16 |
|
T36 |
17 |
|
T72 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T26 |
15 |
|
T36 |
17 |
|
T72 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
13 |
|
T36 |
11 |
|
T72 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
46 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48894 |
1 |
|
|
T26 |
654 |
|
T36 |
703 |
|
T72 |
3039 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44559 |
1 |
|
|
T26 |
735 |
|
T36 |
1210 |
|
T72 |
1497 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54793 |
1 |
|
|
T26 |
1571 |
|
T36 |
824 |
|
T72 |
1063 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48408 |
1 |
|
|
T26 |
757 |
|
T36 |
322 |
|
T72 |
1262 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T26 |
34 |
|
T36 |
21 |
|
T72 |
72 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T26 |
34 |
|
T36 |
18 |
|
T72 |
74 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T26 |
33 |
|
T36 |
21 |
|
T72 |
71 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T26 |
34 |
|
T36 |
18 |
|
T72 |
71 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T26 |
31 |
|
T36 |
21 |
|
T72 |
70 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T26 |
34 |
|
T36 |
17 |
|
T72 |
69 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T26 |
30 |
|
T36 |
21 |
|
T72 |
67 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T26 |
34 |
|
T36 |
16 |
|
T72 |
66 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
65 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T26 |
34 |
|
T36 |
16 |
|
T72 |
65 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
64 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T26 |
34 |
|
T36 |
15 |
|
T72 |
62 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T26 |
34 |
|
T36 |
14 |
|
T72 |
61 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T26 |
29 |
|
T36 |
20 |
|
T72 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T26 |
33 |
|
T36 |
13 |
|
T72 |
59 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T26 |
28 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T26 |
33 |
|
T36 |
13 |
|
T72 |
58 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T26 |
27 |
|
T36 |
20 |
|
T72 |
59 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T26 |
33 |
|
T36 |
12 |
|
T72 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T26 |
33 |
|
T36 |
12 |
|
T72 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T26 |
24 |
|
T36 |
20 |
|
T72 |
58 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T26 |
33 |
|
T36 |
11 |
|
T72 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T26 |
32 |
|
T36 |
11 |
|
T72 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T26 |
23 |
|
T36 |
20 |
|
T72 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T26 |
31 |
|
T36 |
11 |
|
T72 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T26 |
8 |
|
T36 |
12 |
|
T72 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T26 |
31 |
|
T36 |
9 |
|
T72 |
44 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51215 |
1 |
|
|
T26 |
1995 |
|
T36 |
1180 |
|
T72 |
1686 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44684 |
1 |
|
|
T26 |
648 |
|
T36 |
986 |
|
T72 |
2696 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51554 |
1 |
|
|
T26 |
471 |
|
T36 |
633 |
|
T72 |
1463 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48985 |
1 |
|
|
T26 |
633 |
|
T36 |
377 |
|
T72 |
1099 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T26 |
31 |
|
T36 |
17 |
|
T72 |
63 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T26 |
31 |
|
T36 |
16 |
|
T72 |
61 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T26 |
30 |
|
T36 |
15 |
|
T72 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
61 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T26 |
30 |
|
T36 |
15 |
|
T72 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
59 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T26 |
29 |
|
T36 |
15 |
|
T72 |
61 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T26 |
28 |
|
T36 |
15 |
|
T72 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T26 |
28 |
|
T36 |
16 |
|
T72 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T26 |
28 |
|
T36 |
15 |
|
T72 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T26 |
26 |
|
T36 |
16 |
|
T72 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T26 |
28 |
|
T36 |
15 |
|
T72 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T26 |
10 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
25 |
|
T36 |
16 |
|
T72 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T26 |
27 |
|
T36 |
15 |
|
T72 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T26 |
25 |
|
T36 |
14 |
|
T72 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T26 |
25 |
|
T36 |
14 |
|
T72 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T26 |
25 |
|
T36 |
12 |
|
T72 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T26 |
25 |
|
T36 |
14 |
|
T72 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T26 |
25 |
|
T36 |
12 |
|
T72 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T26 |
24 |
|
T36 |
14 |
|
T72 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T26 |
25 |
|
T36 |
11 |
|
T72 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T26 |
23 |
|
T36 |
13 |
|
T72 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T26 |
25 |
|
T36 |
11 |
|
T72 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T26 |
23 |
|
T36 |
13 |
|
T72 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T26 |
11 |
|
T36 |
9 |
|
T72 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T26 |
23 |
|
T36 |
11 |
|
T72 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
10 |
|
T36 |
9 |
|
T72 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T26 |
23 |
|
T36 |
13 |
|
T72 |
44 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57662 |
1 |
|
|
T26 |
791 |
|
T36 |
479 |
|
T72 |
1598 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41166 |
1 |
|
|
T26 |
476 |
|
T36 |
706 |
|
T72 |
1540 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55996 |
1 |
|
|
T26 |
903 |
|
T36 |
622 |
|
T72 |
1479 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43042 |
1 |
|
|
T26 |
1608 |
|
T36 |
1122 |
|
T72 |
2437 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T26 |
27 |
|
T36 |
28 |
|
T72 |
72 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T26 |
24 |
|
T36 |
24 |
|
T72 |
70 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T26 |
26 |
|
T36 |
27 |
|
T72 |
71 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T26 |
24 |
|
T36 |
23 |
|
T72 |
67 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T26 |
26 |
|
T36 |
27 |
|
T72 |
69 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T26 |
22 |
|
T36 |
23 |
|
T72 |
66 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T26 |
26 |
|
T36 |
27 |
|
T72 |
68 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T26 |
22 |
|
T36 |
22 |
|
T72 |
65 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T26 |
25 |
|
T36 |
26 |
|
T72 |
63 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
64 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
14 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
62 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
63 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T26 |
22 |
|
T36 |
26 |
|
T72 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T26 |
20 |
|
T36 |
20 |
|
T72 |
61 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T26 |
21 |
|
T36 |
26 |
|
T72 |
58 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
61 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T26 |
20 |
|
T36 |
24 |
|
T72 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
59 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
55 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T26 |
19 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T26 |
18 |
|
T36 |
18 |
|
T72 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
7 |
|
T72 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T26 |
19 |
|
T36 |
21 |
|
T72 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T26 |
17 |
|
T36 |
12 |
|
T72 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1078 |
1 |
|
|
T26 |
17 |
|
T36 |
17 |
|
T72 |
48 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52196 |
1 |
|
|
T26 |
2179 |
|
T36 |
476 |
|
T72 |
1637 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48829 |
1 |
|
|
T26 |
394 |
|
T36 |
1389 |
|
T72 |
1603 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49654 |
1 |
|
|
T26 |
1224 |
|
T36 |
572 |
|
T72 |
1408 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44666 |
1 |
|
|
T26 |
290 |
|
T36 |
420 |
|
T72 |
2321 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T26 |
11 |
|
T36 |
31 |
|
T72 |
67 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T26 |
17 |
|
T36 |
27 |
|
T72 |
72 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T26 |
11 |
|
T36 |
30 |
|
T72 |
65 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T26 |
16 |
|
T36 |
26 |
|
T72 |
71 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T26 |
10 |
|
T36 |
30 |
|
T72 |
62 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T26 |
16 |
|
T36 |
24 |
|
T72 |
70 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T26 |
10 |
|
T36 |
30 |
|
T72 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T26 |
15 |
|
T36 |
23 |
|
T72 |
68 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T26 |
10 |
|
T36 |
29 |
|
T72 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T26 |
14 |
|
T36 |
22 |
|
T72 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T26 |
10 |
|
T36 |
29 |
|
T72 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T26 |
14 |
|
T36 |
22 |
|
T72 |
62 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T26 |
10 |
|
T36 |
29 |
|
T72 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T26 |
14 |
|
T36 |
21 |
|
T72 |
62 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T26 |
10 |
|
T36 |
29 |
|
T72 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T26 |
11 |
|
T36 |
12 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T26 |
13 |
|
T36 |
21 |
|
T72 |
60 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T26 |
9 |
|
T36 |
28 |
|
T72 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T26 |
13 |
|
T36 |
20 |
|
T72 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T26 |
9 |
|
T36 |
28 |
|
T72 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T26 |
12 |
|
T36 |
19 |
|
T72 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T26 |
9 |
|
T36 |
28 |
|
T72 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T26 |
12 |
|
T36 |
18 |
|
T72 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T26 |
9 |
|
T36 |
27 |
|
T72 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T26 |
12 |
|
T36 |
17 |
|
T72 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T26 |
9 |
|
T36 |
27 |
|
T72 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T26 |
12 |
|
T36 |
17 |
|
T72 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T26 |
9 |
|
T36 |
27 |
|
T72 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T26 |
12 |
|
T36 |
16 |
|
T72 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T26 |
18 |
|
T36 |
8 |
|
T72 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T26 |
9 |
|
T36 |
27 |
|
T72 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
11 |
|
T36 |
11 |
|
T72 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T26 |
12 |
|
T36 |
15 |
|
T72 |
52 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52683 |
1 |
|
|
T26 |
1060 |
|
T36 |
475 |
|
T72 |
1587 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47012 |
1 |
|
|
T26 |
515 |
|
T36 |
1258 |
|
T72 |
1394 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51811 |
1 |
|
|
T26 |
743 |
|
T36 |
480 |
|
T72 |
2732 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44581 |
1 |
|
|
T26 |
1470 |
|
T36 |
550 |
|
T72 |
1372 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T26 |
23 |
|
T36 |
32 |
|
T72 |
62 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T26 |
26 |
|
T36 |
27 |
|
T72 |
64 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
62 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T26 |
26 |
|
T36 |
26 |
|
T72 |
64 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T26 |
23 |
|
T36 |
31 |
|
T72 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
64 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T26 |
22 |
|
T36 |
31 |
|
T72 |
59 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
64 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T26 |
21 |
|
T36 |
29 |
|
T72 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T26 |
25 |
|
T36 |
25 |
|
T72 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T26 |
21 |
|
T36 |
28 |
|
T72 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T26 |
24 |
|
T36 |
24 |
|
T72 |
62 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T26 |
21 |
|
T36 |
27 |
|
T72 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T26 |
23 |
|
T36 |
24 |
|
T72 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
23 |
|
T36 |
24 |
|
T72 |
58 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T26 |
20 |
|
T36 |
27 |
|
T72 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T26 |
21 |
|
T36 |
24 |
|
T72 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T26 |
20 |
|
T36 |
26 |
|
T72 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T26 |
21 |
|
T36 |
23 |
|
T72 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T26 |
17 |
|
T36 |
25 |
|
T72 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T26 |
21 |
|
T36 |
23 |
|
T72 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T26 |
17 |
|
T36 |
25 |
|
T72 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T26 |
21 |
|
T36 |
23 |
|
T72 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T26 |
16 |
|
T36 |
24 |
|
T72 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50061 |
1 |
|
|
T26 |
741 |
|
T36 |
573 |
|
T72 |
1857 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46759 |
1 |
|
|
T26 |
497 |
|
T36 |
633 |
|
T72 |
1369 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55257 |
1 |
|
|
T26 |
1102 |
|
T36 |
1178 |
|
T72 |
2394 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45131 |
1 |
|
|
T26 |
1433 |
|
T36 |
547 |
|
T72 |
1528 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T26 |
25 |
|
T36 |
29 |
|
T72 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T26 |
27 |
|
T36 |
27 |
|
T72 |
60 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T26 |
25 |
|
T36 |
27 |
|
T72 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T26 |
27 |
|
T36 |
25 |
|
T72 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T26 |
23 |
|
T36 |
26 |
|
T72 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T26 |
26 |
|
T36 |
24 |
|
T72 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T26 |
22 |
|
T36 |
25 |
|
T72 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T26 |
25 |
|
T36 |
23 |
|
T72 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T26 |
25 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T26 |
16 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T26 |
21 |
|
T36 |
22 |
|
T72 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T26 |
25 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T26 |
23 |
|
T36 |
21 |
|
T72 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T26 |
21 |
|
T36 |
21 |
|
T72 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
14 |
|
T36 |
12 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T26 |
22 |
|
T36 |
20 |
|
T72 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T26 |
20 |
|
T36 |
21 |
|
T72 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T26 |
22 |
|
T36 |
19 |
|
T72 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T26 |
20 |
|
T36 |
20 |
|
T72 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T26 |
19 |
|
T36 |
19 |
|
T72 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T26 |
18 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
15 |
|
T36 |
9 |
|
T72 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1094 |
1 |
|
|
T26 |
18 |
|
T36 |
19 |
|
T72 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T26 |
14 |
|
T36 |
11 |
|
T72 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T26 |
20 |
|
T36 |
19 |
|
T72 |
44 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50823 |
1 |
|
|
T26 |
740 |
|
T36 |
639 |
|
T72 |
1749 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49590 |
1 |
|
|
T26 |
709 |
|
T36 |
1176 |
|
T72 |
1524 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56708 |
1 |
|
|
T26 |
445 |
|
T36 |
462 |
|
T72 |
2641 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40253 |
1 |
|
|
T26 |
1728 |
|
T36 |
613 |
|
T72 |
1220 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T26 |
36 |
|
T36 |
27 |
|
T72 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T26 |
34 |
|
T36 |
26 |
|
T72 |
63 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T26 |
36 |
|
T36 |
27 |
|
T72 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
63 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T26 |
35 |
|
T36 |
27 |
|
T72 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T26 |
34 |
|
T36 |
25 |
|
T72 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T26 |
35 |
|
T36 |
27 |
|
T72 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T26 |
33 |
|
T36 |
24 |
|
T72 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T26 |
35 |
|
T36 |
27 |
|
T72 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
33 |
|
T36 |
23 |
|
T72 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T26 |
9 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T26 |
34 |
|
T36 |
27 |
|
T72 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T26 |
33 |
|
T36 |
23 |
|
T72 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T26 |
34 |
|
T36 |
26 |
|
T72 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T26 |
31 |
|
T36 |
23 |
|
T72 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T26 |
33 |
|
T36 |
25 |
|
T72 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T26 |
31 |
|
T36 |
23 |
|
T72 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T26 |
33 |
|
T36 |
23 |
|
T72 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T26 |
31 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T26 |
33 |
|
T36 |
23 |
|
T72 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T26 |
31 |
|
T36 |
22 |
|
T72 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T26 |
30 |
|
T36 |
23 |
|
T72 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T26 |
29 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T26 |
30 |
|
T36 |
23 |
|
T72 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T26 |
29 |
|
T36 |
23 |
|
T72 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T26 |
29 |
|
T36 |
22 |
|
T72 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1107 |
1 |
|
|
T26 |
28 |
|
T36 |
21 |
|
T72 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T26 |
8 |
|
T36 |
9 |
|
T72 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T26 |
29 |
|
T36 |
21 |
|
T72 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
11 |
|
T36 |
10 |
|
T72 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T26 |
27 |
|
T36 |
20 |
|
T72 |
50 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56465 |
1 |
|
|
T26 |
793 |
|
T36 |
607 |
|
T72 |
1578 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43503 |
1 |
|
|
T26 |
1648 |
|
T36 |
640 |
|
T72 |
1390 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55853 |
1 |
|
|
T26 |
739 |
|
T36 |
582 |
|
T72 |
1512 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42997 |
1 |
|
|
T26 |
631 |
|
T36 |
1158 |
|
T72 |
2517 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T26 |
32 |
|
T36 |
28 |
|
T72 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T26 |
29 |
|
T36 |
29 |
|
T72 |
64 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T26 |
29 |
|
T36 |
28 |
|
T72 |
60 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T26 |
29 |
|
T36 |
29 |
|
T72 |
64 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T26 |
27 |
|
T36 |
28 |
|
T72 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T26 |
26 |
|
T36 |
28 |
|
T72 |
64 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T26 |
26 |
|
T36 |
28 |
|
T72 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T26 |
26 |
|
T36 |
26 |
|
T72 |
62 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T26 |
25 |
|
T36 |
28 |
|
T72 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T26 |
26 |
|
T36 |
25 |
|
T72 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T26 |
10 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T26 |
24 |
|
T36 |
28 |
|
T72 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T26 |
26 |
|
T36 |
24 |
|
T72 |
60 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T26 |
23 |
|
T36 |
27 |
|
T72 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T26 |
26 |
|
T36 |
24 |
|
T72 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T26 |
22 |
|
T36 |
25 |
|
T72 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T26 |
26 |
|
T36 |
23 |
|
T72 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T26 |
22 |
|
T36 |
24 |
|
T72 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T26 |
26 |
|
T36 |
22 |
|
T72 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T26 |
21 |
|
T36 |
23 |
|
T72 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T26 |
26 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T26 |
20 |
|
T36 |
23 |
|
T72 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T26 |
25 |
|
T36 |
21 |
|
T72 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T26 |
20 |
|
T36 |
20 |
|
T72 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T26 |
25 |
|
T36 |
21 |
|
T72 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T26 |
19 |
|
T36 |
20 |
|
T72 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T26 |
25 |
|
T36 |
20 |
|
T72 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T26 |
25 |
|
T36 |
20 |
|
T72 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T26 |
9 |
|
T36 |
6 |
|
T72 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1065 |
1 |
|
|
T26 |
19 |
|
T36 |
18 |
|
T72 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
12 |
|
T36 |
6 |
|
T72 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1079 |
1 |
|
|
T26 |
25 |
|
T36 |
20 |
|
T72 |
47 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58330 |
1 |
|
|
T26 |
1031 |
|
T36 |
769 |
|
T72 |
1643 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39487 |
1 |
|
|
T26 |
501 |
|
T36 |
897 |
|
T72 |
1424 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62040 |
1 |
|
|
T26 |
1602 |
|
T36 |
782 |
|
T72 |
3258 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37788 |
1 |
|
|
T26 |
536 |
|
T36 |
479 |
|
T72 |
996 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T26 |
29 |
|
T36 |
25 |
|
T72 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T26 |
32 |
|
T36 |
22 |
|
T72 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T26 |
29 |
|
T36 |
24 |
|
T72 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T26 |
32 |
|
T36 |
22 |
|
T72 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T26 |
29 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T26 |
32 |
|
T36 |
22 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T26 |
29 |
|
T36 |
22 |
|
T72 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T26 |
31 |
|
T36 |
21 |
|
T72 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T26 |
28 |
|
T36 |
20 |
|
T72 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T26 |
31 |
|
T36 |
21 |
|
T72 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
16 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T26 |
28 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T26 |
28 |
|
T36 |
21 |
|
T72 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T26 |
24 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T26 |
28 |
|
T36 |
20 |
|
T72 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T26 |
24 |
|
T36 |
19 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T26 |
23 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T26 |
26 |
|
T36 |
20 |
|
T72 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T26 |
23 |
|
T36 |
18 |
|
T72 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T26 |
25 |
|
T36 |
19 |
|
T72 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T26 |
22 |
|
T36 |
17 |
|
T72 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T26 |
24 |
|
T36 |
19 |
|
T72 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T26 |
20 |
|
T36 |
17 |
|
T72 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T26 |
24 |
|
T36 |
19 |
|
T72 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T26 |
19 |
|
T36 |
16 |
|
T72 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T26 |
24 |
|
T36 |
18 |
|
T72 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T26 |
19 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T26 |
24 |
|
T36 |
18 |
|
T72 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T26 |
15 |
|
T36 |
11 |
|
T72 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1094 |
1 |
|
|
T26 |
19 |
|
T36 |
14 |
|
T72 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T26 |
13 |
|
T36 |
14 |
|
T72 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T26 |
23 |
|
T36 |
18 |
|
T72 |
32 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51677 |
1 |
|
|
T26 |
797 |
|
T36 |
800 |
|
T72 |
1744 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42421 |
1 |
|
|
T26 |
461 |
|
T36 |
536 |
|
T72 |
1463 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61948 |
1 |
|
|
T26 |
1826 |
|
T36 |
1442 |
|
T72 |
1749 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41025 |
1 |
|
|
T26 |
641 |
|
T36 |
357 |
|
T72 |
2044 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T26 |
29 |
|
T36 |
15 |
|
T72 |
64 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T26 |
30 |
|
T36 |
18 |
|
T72 |
64 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T26 |
28 |
|
T36 |
14 |
|
T72 |
63 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T26 |
30 |
|
T36 |
17 |
|
T72 |
62 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T26 |
27 |
|
T36 |
13 |
|
T72 |
61 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T26 |
29 |
|
T36 |
17 |
|
T72 |
60 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T26 |
27 |
|
T36 |
13 |
|
T72 |
60 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T26 |
28 |
|
T36 |
17 |
|
T72 |
59 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
60 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T26 |
28 |
|
T36 |
17 |
|
T72 |
57 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T26 |
13 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
57 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T26 |
28 |
|
T36 |
17 |
|
T72 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T26 |
28 |
|
T36 |
17 |
|
T72 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T26 |
26 |
|
T36 |
15 |
|
T72 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T26 |
27 |
|
T36 |
12 |
|
T72 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T26 |
25 |
|
T36 |
12 |
|
T72 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T26 |
24 |
|
T36 |
12 |
|
T72 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T26 |
24 |
|
T36 |
11 |
|
T72 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T26 |
21 |
|
T36 |
11 |
|
T72 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T26 |
21 |
|
T36 |
11 |
|
T72 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T26 |
24 |
|
T36 |
15 |
|
T72 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
12 |
|
T36 |
12 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T26 |
19 |
|
T36 |
11 |
|
T72 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T26 |
12 |
|
T36 |
10 |
|
T72 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T26 |
24 |
|
T36 |
14 |
|
T72 |
39 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50441 |
1 |
|
|
T26 |
916 |
|
T36 |
1317 |
|
T72 |
1704 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45837 |
1 |
|
|
T26 |
1497 |
|
T36 |
517 |
|
T72 |
1550 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55331 |
1 |
|
|
T26 |
688 |
|
T36 |
868 |
|
T72 |
1351 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45525 |
1 |
|
|
T26 |
516 |
|
T36 |
409 |
|
T72 |
2411 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T26 |
30 |
|
T36 |
15 |
|
T72 |
69 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T26 |
31 |
|
T36 |
18 |
|
T72 |
74 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T26 |
30 |
|
T36 |
14 |
|
T72 |
67 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
72 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
66 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T26 |
30 |
|
T36 |
16 |
|
T72 |
70 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
65 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T26 |
28 |
|
T36 |
16 |
|
T72 |
68 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
64 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T26 |
28 |
|
T36 |
16 |
|
T72 |
67 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
63 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T26 |
28 |
|
T36 |
16 |
|
T72 |
67 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
62 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T26 |
27 |
|
T36 |
16 |
|
T72 |
65 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T26 |
29 |
|
T36 |
14 |
|
T72 |
62 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T26 |
27 |
|
T36 |
16 |
|
T72 |
63 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T26 |
29 |
|
T36 |
13 |
|
T72 |
61 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T26 |
27 |
|
T36 |
16 |
|
T72 |
63 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T26 |
28 |
|
T36 |
13 |
|
T72 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
62 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T26 |
27 |
|
T36 |
13 |
|
T72 |
58 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T26 |
25 |
|
T36 |
15 |
|
T72 |
60 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T26 |
25 |
|
T36 |
13 |
|
T72 |
58 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T26 |
23 |
|
T36 |
15 |
|
T72 |
58 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T26 |
23 |
|
T36 |
12 |
|
T72 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T26 |
23 |
|
T36 |
13 |
|
T72 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T26 |
23 |
|
T36 |
12 |
|
T72 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T26 |
21 |
|
T36 |
13 |
|
T72 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T26 |
16 |
|
T36 |
13 |
|
T72 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T26 |
23 |
|
T36 |
12 |
|
T72 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T26 |
14 |
|
T36 |
10 |
|
T72 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T26 |
19 |
|
T36 |
13 |
|
T72 |
50 |