Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6215812 |
1 |
|
|
T26 |
828 |
|
T27 |
283 |
|
T28 |
1 |
| auto[1] |
3965603 |
1 |
|
|
T31 |
1022 |
|
T32 |
52109 |
|
T33 |
374 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8479709 |
1 |
|
|
T26 |
828 |
|
T27 |
283 |
|
T28 |
1 |
| auto[1] |
1701706 |
1 |
|
|
T31 |
223 |
|
T32 |
31946 |
|
T33 |
418 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6196572 |
1 |
|
|
T26 |
828 |
|
T27 |
283 |
|
T28 |
1 |
| auto[1] |
3984843 |
1 |
|
|
T31 |
889 |
|
T32 |
52168 |
|
T33 |
516 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1147409 |
1 |
|
|
T31 |
327 |
|
T32 |
10093 |
|
T33 |
65 |
| auto[1] |
auto[0] |
auto[1] |
855053 |
1 |
|
|
T31 |
92 |
|
T32 |
15925 |
|
T33 |
269 |
| auto[1] |
auto[1] |
auto[0] |
1135728 |
1 |
|
|
T31 |
339 |
|
T32 |
10129 |
|
T33 |
33 |
| auto[1] |
auto[1] |
auto[1] |
846653 |
1 |
|
|
T31 |
131 |
|
T32 |
16021 |
|
T33 |
149 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |