Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	16606370	1			T20	105		T22	209		T23	391880
all_values[1]	16606370	1			T20	105		T22	209		T23	391880
all_values[2]	16606370	1			T20	105		T22	209		T23	391880
all_values[3]	16606370	1			T20	105		T22	209		T23	391880
all_values[4]	16606370	1			T20	105		T22	209		T23	391880
all_values[5]	16606370	1			T20	105		T22	209		T23	391880
all_values[6]	16606370	1			T20	105		T22	209		T23	391880
all_values[7]	16606370	1			T20	105		T22	209		T23	391880
all_values[8]	16606370	1			T20	105		T22	209		T23	391880
all_values[9]	16606370	1			T20	105		T22	209		T23	391880
all_values[10]	16606370	1			T20	105		T22	209		T23	391880
all_values[11]	16606370	1			T20	105		T22	209		T23	391880
all_values[12]	16606370	1			T20	105		T22	209		T23	391880
all_values[13]	16606370	1			T20	105		T22	209		T23	391880
all_values[14]	16606370	1			T20	105		T22	209		T23	391880
all_values[15]	16606370	1			T20	105		T22	209		T23	391880
all_values[16]	16606370	1			T20	105		T22	209		T23	391880
all_values[17]	16606370	1			T20	105		T22	209		T23	391880
all_values[18]	16606370	1			T20	105		T22	209		T23	391880
all_values[19]	16606370	1			T20	105		T22	209		T23	391880
all_values[20]	16606370	1			T20	105		T22	209		T23	391880
all_values[21]	16606370	1			T20	105		T22	209		T23	391880
all_values[22]	16606370	1			T20	105		T22	209		T23	391880
all_values[23]	16606370	1			T20	105		T22	209		T23	391880
all_values[24]	16606370	1			T20	105		T22	209		T23	391880
all_values[25]	16606370	1			T20	105		T22	209		T23	391880
all_values[26]	16606370	1			T20	105		T22	209		T23	391880
all_values[27]	16606370	1			T20	105		T22	209		T23	391880
all_values[28]	16606370	1			T20	105		T22	209		T23	391880
all_values[29]	16606370	1			T20	105		T22	209		T23	391880
all_values[30]	16606370	1			T20	105		T22	209		T23	391880
all_values[31]	16606370	1			T20	105		T22	209		T23	391880

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

300129986

1

T20

2056

T22

6688

T23

626556

auto[1]

231273854

1

T20

1304

T23

627459

T25

4804

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

112857250

1

T20

1640

T22

6688

T23

122887

auto[1]

418546590

1

T20

1720

T23

113112

T25

7794

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

525438581

1

T20

3147

T22

6688

T23

123898

auto[1]

5965259

1

T20

213

T23

150313

T30

37212

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2838560	1			T20	28		T22	209		T23	19840
all_values[0]	auto[0]	auto[0]	auto[1]	6486337	1			T20	36		T23	179140		T25	105
all_values[0]	auto[0]	auto[1]	auto[0]	700896	1			T20	9		T23	18871		T25	13
all_values[0]	auto[0]	auto[1]	auto[1]	6394401	1			T20	25		T23	169343		T25	133
all_values[0]	auto[1]	auto[0]	auto[1]	93370	1			T20	5		T23	2417		T30	558
all_values[0]	auto[1]	auto[1]	auto[1]	92806	1			T20	2		T23	2269		T30	620
all_values[1]	auto[0]	auto[0]	auto[0]	2845321	1			T20	53		T22	209		T23	19426
all_values[1]	auto[0]	auto[0]	auto[1]	6437932	1			T20	30		T23	174151		T25	116
all_values[1]	auto[0]	auto[1]	auto[0]	690959	1			T20	4		T23	20615		T25	51
all_values[1]	auto[0]	auto[1]	auto[1]	6445966	1			T20	8		T23	173061		T25	109
all_values[1]	auto[1]	auto[0]	auto[1]	93037	1			T20	8		T23	2310		T30	591
all_values[1]	auto[1]	auto[1]	auto[1]	93155	1			T20	2		T23	2317		T30	561
all_values[2]	auto[0]	auto[0]	auto[0]	2828643	1			T20	38		T22	209		T23	19492
all_values[2]	auto[0]	auto[0]	auto[1]	6454976	1			T20	25		T23	171878		T25	168
all_values[2]	auto[0]	auto[1]	auto[0]	703513	1			T20	15		T23	20252		T25	15
all_values[2]	auto[0]	auto[1]	auto[1]	6432425	1			T20	19		T23	175545		T25	77
all_values[2]	auto[1]	auto[0]	auto[1]	93808	1			T20	5		T23	2389		T30	581
all_values[2]	auto[1]	auto[1]	auto[1]	93005	1			T20	3		T23	2324		T30	607
all_values[3]	auto[0]	auto[0]	auto[0]	2837358	1			T20	45		T22	209		T23	19445
all_values[3]	auto[0]	auto[0]	auto[1]	6471476	1			T20	21		T23	175183		T25	94
all_values[3]	auto[0]	auto[1]	auto[0]	685573	1			T20	8		T23	17749		T25	51
all_values[3]	auto[0]	auto[1]	auto[1]	6425806	1			T20	23		T23	174792		T25	121
all_values[3]	auto[1]	auto[0]	auto[1]	93454	1			T20	5		T23	2426		T30	594
all_values[3]	auto[1]	auto[1]	auto[1]	92703	1			T20	3		T23	2285		T30	589
all_values[4]	auto[0]	auto[0]	auto[0]	2837666	1			T20	31		T22	209		T23	22686
all_values[4]	auto[0]	auto[0]	auto[1]	6487328	1			T20	45		T23	174698		T25	128
all_values[4]	auto[0]	auto[1]	auto[0]	692847	1			T20	7		T23	18941		T25	36
all_values[4]	auto[0]	auto[1]	auto[1]	6402084	1			T20	16		T23	170786		T25	106
all_values[4]	auto[1]	auto[0]	auto[1]	93069	1			T20	5		T23	2427		T30	571
all_values[4]	auto[1]	auto[1]	auto[1]	93376	1			T20	1		T23	2342		T30	603
all_values[5]	auto[0]	auto[0]	auto[0]	2834712	1			T20	26		T22	209		T23	18738
all_values[5]	auto[0]	auto[0]	auto[1]	6449478	1			T20	4		T23	175705		T25	133
all_values[5]	auto[0]	auto[1]	auto[0]	698614	1			T20	41		T23	18326		T25	6
all_values[5]	auto[0]	auto[1]	auto[1]	6436973	1			T20	27		T23	174432		T25	145
all_values[5]	auto[1]	auto[0]	auto[1]	93585	1			T20	2		T23	2355		T30	559
all_values[5]	auto[1]	auto[1]	auto[1]	93008	1			T20	5		T23	2324		T30	598
all_values[6]	auto[0]	auto[0]	auto[0]	2832215	1			T20	38		T22	209		T23	19681
all_values[6]	auto[0]	auto[0]	auto[1]	6439370	1			T20	24		T23	174050		T25	156
all_values[6]	auto[0]	auto[1]	auto[0]	705821	1			T20	15		T23	18052		T25	12
all_values[6]	auto[0]	auto[1]	auto[1]	6442556	1			T20	19		T23	175384		T25	95
all_values[6]	auto[1]	auto[0]	auto[1]	93603	1			T20	5		T23	2398		T30	560
all_values[6]	auto[1]	auto[1]	auto[1]	92805	1			T20	4		T23	2315		T30	559
all_values[7]	auto[0]	auto[0]	auto[0]	2832073	1			T20	36		T22	209		T23	18804
all_values[7]	auto[0]	auto[0]	auto[1]	6440587	1			T20	16		T23	177106		T25	153
all_values[7]	auto[0]	auto[1]	auto[0]	698436	1			T20	16		T23	17906		T25	28
all_values[7]	auto[0]	auto[1]	auto[1]	6448941	1			T20	32		T23	173354		T25	95
all_values[7]	auto[1]	auto[0]	auto[1]	93588	1			T20	4		T23	2419		T30	576
all_values[7]	auto[1]	auto[1]	auto[1]	92745	1			T20	1		T23	2291		T30	572
all_values[8]	auto[0]	auto[0]	auto[0]	2829279	1			T20	29		T22	209		T23	20775
all_values[8]	auto[0]	auto[0]	auto[1]	6468309	1			T20	23		T23	175096		T25	96
all_values[8]	auto[0]	auto[1]	auto[0]	697782	1			T20	19		T23	19264		T25	60
all_values[8]	auto[0]	auto[1]	auto[1]	6424704	1			T20	25		T23	172112		T25	114
all_values[8]	auto[1]	auto[0]	auto[1]	93484	1			T20	5		T23	2276		T30	605
all_values[8]	auto[1]	auto[1]	auto[1]	92812	1			T20	4		T23	2357		T30	599
all_values[9]	auto[0]	auto[0]	auto[0]	2829749	1			T20	30		T22	209		T23	20136
all_values[9]	auto[0]	auto[0]	auto[1]	6446291	1			T20	7		T23	172389		T25	129
all_values[9]	auto[0]	auto[1]	auto[0]	698547	1			T20	22		T23	18060		T25	18
all_values[9]	auto[0]	auto[1]	auto[1]	6445613	1			T20	40		T23	176543		T25	135
all_values[9]	auto[1]	auto[0]	auto[1]	92855	1			T20	3		T23	2405		T30	546
all_values[9]	auto[1]	auto[1]	auto[1]	93315	1			T20	3		T23	2347		T30	582
all_values[10]	auto[0]	auto[0]	auto[0]	2831052	1			T20	50		T22	209		T23	19229
all_values[10]	auto[0]	auto[0]	auto[1]	6448852	1			T20	11		T23	171885		T25	76
all_values[10]	auto[0]	auto[1]	auto[0]	692957	1			T20	26		T23	20309		T25	22
all_values[10]	auto[0]	auto[1]	auto[1]	6447271	1			T20	15		T23	175708		T25	177
all_values[10]	auto[1]	auto[0]	auto[1]	93272	1			T20	3		T23	2401		T30	579
all_values[10]	auto[1]	auto[1]	auto[1]	92966	1			T23	2348		T30	566		T31	1
all_values[11]	auto[0]	auto[0]	auto[0]	2827180	1			T20	27		T22	209		T23	18758
all_values[11]	auto[0]	auto[0]	auto[1]	6465941	1			T20	7		T23	171383		T25	99
all_values[11]	auto[0]	auto[1]	auto[0]	703269	1			T20	25		T23	19972		T25	29
all_values[11]	auto[0]	auto[1]	auto[1]	6423701	1			T20	40		T23	177052		T25	156
all_values[11]	auto[1]	auto[0]	auto[1]	93447	1			T20	3		T23	2300		T30	564
all_values[11]	auto[1]	auto[1]	auto[1]	92832	1			T20	3		T23	2415		T30	601
all_values[12]	auto[0]	auto[0]	auto[0]	2825524	1			T20	24		T22	209		T23	19272
all_values[12]	auto[0]	auto[0]	auto[1]	6469935	1			T20	22		T23	180539		T25	114
all_values[12]	auto[0]	auto[1]	auto[0]	690506	1			T20	20		T23	17729		T25	30
all_values[12]	auto[0]	auto[1]	auto[1]	6433843	1			T20	31		T23	169626		T25	129
all_values[12]	auto[1]	auto[0]	auto[1]	93534	1			T20	3		T23	2434		T30	564
all_values[12]	auto[1]	auto[1]	auto[1]	93028	1			T20	5		T23	2280		T30	579
all_values[13]	auto[0]	auto[0]	auto[0]	2827838	1			T20	44		T22	209		T23	18048
all_values[13]	auto[0]	auto[0]	auto[1]	6418150	1			T20	41		T23	168522		T25	106
all_values[13]	auto[0]	auto[1]	auto[0]	697380	1			T20	6		T23	18573		T25	22
all_values[13]	auto[0]	auto[1]	auto[1]	6476327	1			T20	10		T23	181965		T25	137
all_values[13]	auto[1]	auto[0]	auto[1]	92916	1			T20	3		T23	2357		T30	581
all_values[13]	auto[1]	auto[1]	auto[1]	93759	1			T20	1		T23	2415		T30	554
all_values[14]	auto[0]	auto[0]	auto[0]	2828577	1			T20	29		T22	209		T23	18371
all_values[14]	auto[0]	auto[0]	auto[1]	6466693	1			T20	26		T23	174110		T25	187
all_values[14]	auto[0]	auto[1]	auto[0]	698933	1			T20	24		T23	20451		T25	16
all_values[14]	auto[0]	auto[1]	auto[1]	6425740	1			T20	20		T23	174307		T25	66
all_values[14]	auto[1]	auto[0]	auto[1]	93413	1			T20	3		T23	2273		T30	568
all_values[14]	auto[1]	auto[1]	auto[1]	93014	1			T20	3		T23	2368		T30	585
all_values[15]	auto[0]	auto[0]	auto[0]	2834708	1			T20	18		T22	209		T23	18258
all_values[15]	auto[0]	auto[0]	auto[1]	6449289	1			T20	10		T23	175211		T25	92
all_values[15]	auto[0]	auto[1]	auto[0]	703984	1			T20	22		T23	19042		T25	23
all_values[15]	auto[0]	auto[1]	auto[1]	6432058	1			T20	49		T23	174623		T25	161
all_values[15]	auto[1]	auto[0]	auto[1]	93278	1			T20	1		T23	2383		T30	571
all_values[15]	auto[1]	auto[1]	auto[1]	93053	1			T20	5		T23	2363		T30	568
all_values[16]	auto[0]	auto[0]	auto[0]	2824876	1			T20	24		T22	209		T23	19378
all_values[16]	auto[0]	auto[0]	auto[1]	6474352	1			T20	7		T23	175666		T25	99
all_values[16]	auto[0]	auto[1]	auto[0]	686502	1			T20	14		T23	19143		T25	15
all_values[16]	auto[0]	auto[1]	auto[1]	6434666	1			T20	49		T23	173065		T25	153
all_values[16]	auto[1]	auto[0]	auto[1]	93099	1			T20	4		T23	2366		T30	545
all_values[16]	auto[1]	auto[1]	auto[1]	92875	1			T20	7		T23	2262		T30	573
all_values[17]	auto[0]	auto[0]	auto[0]	2831847	1			T20	42		T22	209		T23	20223
all_values[17]	auto[0]	auto[0]	auto[1]	6466436	1			T20	23		T23	171892		T25	107
all_values[17]	auto[0]	auto[1]	auto[0]	695753	1			T20	11		T23	19455		T25	10
all_values[17]	auto[0]	auto[1]	auto[1]	6426219	1			T20	20		T23	175664		T25	161
all_values[17]	auto[1]	auto[0]	auto[1]	93422	1			T20	6		T23	2230		T30	610
all_values[17]	auto[1]	auto[1]	auto[1]	92693	1			T20	3		T23	2416		T30	565
all_values[18]	auto[0]	auto[0]	auto[0]	2826068	1			T20	37		T22	209		T23	19165
all_values[18]	auto[0]	auto[0]	auto[1]	6453336	1			T20	39		T23	171788		T25	127
all_values[18]	auto[0]	auto[1]	auto[0]	691129	1			T20	8		T23	18425		T25	19
all_values[18]	auto[0]	auto[1]	auto[1]	6448863	1			T20	15		T23	177771		T25	126
all_values[18]	auto[1]	auto[0]	auto[1]	93537	1			T20	5		T23	2364		T30	592
all_values[18]	auto[1]	auto[1]	auto[1]	93437	1			T20	1		T23	2367		T30	614
all_values[19]	auto[0]	auto[0]	auto[0]	2832239	1			T20	34		T22	209		T23	19877
all_values[19]	auto[0]	auto[0]	auto[1]	6491265	1			T20	3		T23	185369		T25	97
all_values[19]	auto[0]	auto[1]	auto[0]	690154	1			T20	20		T23	18714		T25	27
all_values[19]	auto[0]	auto[1]	auto[1]	6406150	1			T20	44		T23	163260		T25	146
all_values[19]	auto[1]	auto[0]	auto[1]	93492	1			T20	2		T23	2370		T30	611
all_values[19]	auto[1]	auto[1]	auto[1]	93070	1			T20	2		T23	2290		T30	584
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all_values[27]	auto[0]	auto[1]	auto[1]	6450163	1			T20	20		T23	180107		T25	105
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all_values[28]	auto[0]	auto[1]	auto[0]	689028	1			T20	10		T23	19416		T25	28
all_values[28]	auto[0]	auto[1]	auto[1]	6443375	1			T20	9		T23	172866		T25	112
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all_values[30]	auto[0]	auto[1]	auto[1]	6454386	1			T20	14		T23	177332		T25	69
all_values[30]	auto[1]	auto[0]	auto[1]	93968	1			T20	6		T23	2311		T30	623
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all_values[31]	auto[0]	auto[0]	auto[0]	2829327	1			T20	42		T22	209		T23	19571
all_values[31]	auto[0]	auto[0]	auto[1]	6438772	1			T20	20		T23	171769		T25	80
all_values[31]	auto[0]	auto[1]	auto[0]	697970	1			T20	18		T23	19721		T25	43
all_values[31]	auto[0]	auto[1]	auto[1]	6454109	1			T20	19		T23	176074		T25	156
all_values[31]	auto[1]	auto[0]	auto[1]	93517	1			T20	2		T23	2439		T30	524
all_values[31]	auto[1]	auto[1]	auto[1]	92675	1			T20	4		T23	2306		T30	613

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal