Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9373176 |
1 |
|
|
T20 |
64 |
|
T22 |
209 |
|
T23 |
193515 |
auto[1] |
7233194 |
1 |
|
|
T20 |
41 |
|
T23 |
198365 |
|
T25 |
199 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13674153 |
1 |
|
|
T20 |
105 |
|
T22 |
209 |
|
T23 |
317563 |
auto[1] |
2932217 |
1 |
|
|
T23 |
74317 |
|
T25 |
74 |
|
T27 |
12 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9397530 |
1 |
|
|
T20 |
95 |
|
T22 |
209 |
|
T23 |
200163 |
auto[1] |
7208840 |
1 |
|
|
T20 |
10 |
|
T23 |
191717 |
|
T25 |
154 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2139885 |
1 |
|
|
T23 |
56706 |
|
T25 |
30 |
|
T27 |
3 |
auto[1] |
auto[0] |
auto[1] |
1471596 |
1 |
|
|
T23 |
36506 |
|
T25 |
24 |
|
T27 |
3 |
auto[1] |
auto[1] |
auto[0] |
2136738 |
1 |
|
|
T20 |
10 |
|
T23 |
60694 |
|
T25 |
50 |
auto[1] |
auto[1] |
auto[1] |
1460621 |
1 |
|
|
T23 |
37811 |
|
T25 |
50 |
|
T27 |
9 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |