Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9388993 |
1 |
|
|
T20 |
49 |
|
T22 |
209 |
|
T23 |
202245 |
| auto[1] |
7217377 |
1 |
|
|
T20 |
56 |
|
T23 |
189635 |
|
T25 |
159 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13669997 |
1 |
|
|
T20 |
98 |
|
T22 |
209 |
|
T23 |
316329 |
| auto[1] |
2936373 |
1 |
|
|
T20 |
7 |
|
T23 |
75551 |
|
T25 |
105 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9377771 |
1 |
|
|
T20 |
78 |
|
T22 |
209 |
|
T23 |
197540 |
| auto[1] |
7228599 |
1 |
|
|
T20 |
27 |
|
T23 |
194340 |
|
T25 |
187 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2140504 |
1 |
|
|
T20 |
11 |
|
T23 |
60182 |
|
T25 |
32 |
| auto[1] |
auto[0] |
auto[1] |
1463785 |
1 |
|
|
T20 |
3 |
|
T23 |
38408 |
|
T25 |
48 |
| auto[1] |
auto[1] |
auto[0] |
2151722 |
1 |
|
|
T20 |
9 |
|
T23 |
58607 |
|
T25 |
50 |
| auto[1] |
auto[1] |
auto[1] |
1472588 |
1 |
|
|
T20 |
4 |
|
T23 |
37143 |
|
T25 |
57 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |