Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9369870 |
1 |
|
|
T20 |
76 |
|
T22 |
209 |
|
T23 |
192246 |
| auto[1] |
7236500 |
1 |
|
|
T20 |
29 |
|
T23 |
199634 |
|
T25 |
85 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15683762 |
1 |
|
|
T20 |
104 |
|
T22 |
209 |
|
T23 |
366230 |
| auto[1] |
922608 |
1 |
|
|
T20 |
1 |
|
T23 |
25650 |
|
T25 |
13 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9406739 |
1 |
|
|
T20 |
65 |
|
T22 |
209 |
|
T23 |
197595 |
| auto[1] |
7199631 |
1 |
|
|
T20 |
40 |
|
T23 |
194285 |
|
T25 |
167 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3146127 |
1 |
|
|
T20 |
19 |
|
T23 |
82439 |
|
T25 |
115 |
| auto[1] |
auto[0] |
auto[1] |
462419 |
1 |
|
|
T23 |
12511 |
|
T25 |
11 |
|
T27 |
2 |
| auto[1] |
auto[1] |
auto[0] |
3130896 |
1 |
|
|
T20 |
20 |
|
T23 |
86196 |
|
T25 |
39 |
| auto[1] |
auto[1] |
auto[1] |
460189 |
1 |
|
|
T20 |
1 |
|
T23 |
13139 |
|
T25 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |