Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8473459 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
65142 |
| auto[1] |
6076105 |
1 |
|
|
T24 |
44808 |
|
T26 |
134 |
|
T27 |
9 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12043634 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
91312 |
| auto[1] |
2505930 |
1 |
|
|
T24 |
18638 |
|
T26 |
56 |
|
T29 |
150783 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8463684 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
61929 |
| auto[1] |
6085880 |
1 |
|
|
T24 |
48021 |
|
T26 |
128 |
|
T29 |
391218 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1794003 |
1 |
|
|
T24 |
15227 |
|
T26 |
37 |
|
T29 |
123473 |
| auto[1] |
auto[0] |
auto[1] |
1257804 |
1 |
|
|
T24 |
9779 |
|
T26 |
38 |
|
T29 |
77445 |
| auto[1] |
auto[1] |
auto[0] |
1785947 |
1 |
|
|
T24 |
14156 |
|
T26 |
35 |
|
T29 |
116962 |
| auto[1] |
auto[1] |
auto[1] |
1248126 |
1 |
|
|
T24 |
8859 |
|
T26 |
18 |
|
T29 |
73338 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |