Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8488783 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
61481 |
| auto[1] |
6060781 |
1 |
|
|
T24 |
48469 |
|
T26 |
103 |
|
T29 |
376826 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12052541 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
91598 |
| auto[1] |
2497023 |
1 |
|
|
T24 |
18352 |
|
T26 |
74 |
|
T27 |
3 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8480715 |
1 |
|
|
T22 |
1 |
|
T23 |
278 |
|
T24 |
62156 |
| auto[1] |
6068849 |
1 |
|
|
T24 |
47794 |
|
T26 |
119 |
|
T27 |
3 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1794689 |
1 |
|
|
T24 |
14045 |
|
T26 |
24 |
|
T29 |
125713 |
| auto[1] |
auto[0] |
auto[1] |
1255964 |
1 |
|
|
T24 |
9046 |
|
T26 |
44 |
|
T27 |
3 |
| auto[1] |
auto[1] |
auto[0] |
1777137 |
1 |
|
|
T24 |
15397 |
|
T26 |
21 |
|
T29 |
118220 |
| auto[1] |
auto[1] |
auto[1] |
1241059 |
1 |
|
|
T24 |
9306 |
|
T26 |
30 |
|
T29 |
73770 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |