Unified Coverage Report :: Group :: gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

Group : gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_gpio_env_0.1/gpio_env_cov.sv

---

Summary for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_pin	32	0	32	100.00	100	1	1	0
data_in	2	0	2	100.00	100	1	1	2
gpio_value	2	0	2	100.00	100	1	1	2

Crosses for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_cross_pins_data_in	128	0	128	100.00	100	1	1	0

Summary for Variable cp_pin

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_pin

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
bins_for_gpio_bits[0]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[1]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[2]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[3]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[4]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[5]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[6]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[7]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[8]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[9]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[10]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[11]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[12]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[13]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[14]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[15]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[16]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[17]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[18]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[19]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[20]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[21]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[22]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[23]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[24]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[25]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[26]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[27]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[28]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[29]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[30]	11103496	1			T31	39638		T32	45766		T33	102590
bins_for_gpio_bits[31]	11103496	1			T31	39638		T32	45766		T33	102590

---

Summary for Variable data_in

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for data_in

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

209587781

1

T31

633204

T32

736221

T33

112304

auto[1]

145724091

1

T31

635212

T32

728291

T33

215983

---

Summary for Variable gpio_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for gpio_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

209578396

1

T31

633204

T32

736221

T33

112328

auto[1]

145733476

1

T31

635212

T32

728291

T33

215959

---

Summary for Cross cp_cross_pins_data_in

Samples crossed: cp_pin gpio_value data_in

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cp_cross_pins_data_in

Bins

cp_pin	gpio_value	data_in	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
bins_for_gpio_bits[0]	auto[0]	auto[0]	6363489	1			T31	18892		T32	25493		T33	33456
bins_for_gpio_bits[0]	auto[0]	auto[1]	189846	1			T33	2159		T35	12		T11	6
bins_for_gpio_bits[0]	auto[1]	auto[0]	190139	1			T33	2152		T35	12		T11	6
bins_for_gpio_bits[0]	auto[1]	auto[1]	4360022	1			T31	20746		T32	20273		T33	64823
bins_for_gpio_bits[1]	auto[0]	auto[0]	6351285	1			T31	19547		T32	23155		T33	33248
bins_for_gpio_bits[1]	auto[0]	auto[1]	189934	1			T33	2104		T34	1		T35	11
bins_for_gpio_bits[1]	auto[1]	auto[0]	190209	1			T33	2096		T35	11		T11	5
bins_for_gpio_bits[1]	auto[1]	auto[1]	4372068	1			T31	20091		T32	22611		T33	65142
bins_for_gpio_bits[2]	auto[0]	auto[0]	6350688	1			T31	18833		T32	23393		T33	32361
bins_for_gpio_bits[2]	auto[0]	auto[1]	189531	1			T33	2039		T35	15		T11	5
bins_for_gpio_bits[2]	auto[1]	auto[0]	189837	1			T33	2032		T35	14		T11	5
bins_for_gpio_bits[2]	auto[1]	auto[1]	4373440	1			T31	20805		T32	22373		T33	66158
bins_for_gpio_bits[3]	auto[0]	auto[0]	6356178	1			T31	20009		T32	21700		T33	32848
bins_for_gpio_bits[3]	auto[0]	auto[1]	189710	1			T33	2074		T35	11		T11	5
bins_for_gpio_bits[3]	auto[1]	auto[0]	189994	1			T33	2067		T35	11		T11	5
bins_for_gpio_bits[3]	auto[1]	auto[1]	4367614	1			T31	19629		T32	24066		T33	65601
bins_for_gpio_bits[4]	auto[0]	auto[0]	6352322	1			T31	19771		T32	24021		T33	32769
bins_for_gpio_bits[4]	auto[0]	auto[1]	190014	1			T33	2089		T34	1		T35	14
bins_for_gpio_bits[4]	auto[1]	auto[0]	190277	1			T33	2078		T35	14		T11	5
bins_for_gpio_bits[4]	auto[1]	auto[1]	4370883	1			T31	19867		T32	21745		T33	65654
bins_for_gpio_bits[5]	auto[0]	auto[0]	6359858	1			T31	20492		T32	22741		T33	33471
bins_for_gpio_bits[5]	auto[0]	auto[1]	189828	1			T33	2111		T34	3		T35	15
bins_for_gpio_bits[5]	auto[1]	auto[0]	190124	1			T33	2104		T35	15		T11	4
bins_for_gpio_bits[5]	auto[1]	auto[1]	4363686	1			T31	19146		T32	23025		T33	64904
bins_for_gpio_bits[6]	auto[0]	auto[0]	6358308	1			T31	20179		T32	23894		T33	33380
bins_for_gpio_bits[6]	auto[0]	auto[1]	189312	1			T33	2104		T35	13		T11	1
bins_for_gpio_bits[6]	auto[1]	auto[0]	189605	1			T33	2097		T34	1		T35	12
bins_for_gpio_bits[6]	auto[1]	auto[1]	4366271	1			T31	19459		T32	21872		T33	65009
bins_for_gpio_bits[7]	auto[0]	auto[0]	6340655	1			T31	19854		T32	23655		T33	32927
bins_for_gpio_bits[7]	auto[0]	auto[1]	190020	1			T33	2082		T34	1		T35	13
bins_for_gpio_bits[7]	auto[1]	auto[0]	190308	1			T33	2075		T35	13		T11	5
bins_for_gpio_bits[7]	auto[1]	auto[1]	4382513	1			T31	19784		T32	22111		T33	65506
bins_for_gpio_bits[8]	auto[0]	auto[0]	6364033	1			T31	19010		T32	21776		T33	32772
bins_for_gpio_bits[8]	auto[0]	auto[1]	190098	1			T33	2033		T35	17		T11	3
bins_for_gpio_bits[8]	auto[1]	auto[0]	190385	1			T33	2027		T35	16		T11	3
bins_for_gpio_bits[8]	auto[1]	auto[1]	4358980	1			T31	20628		T32	23990		T33	65758
bins_for_gpio_bits[9]	auto[0]	auto[0]	6360872	1			T31	19320		T32	23562		T33	32886
bins_for_gpio_bits[9]	auto[0]	auto[1]	190425	1			T33	2126		T34	1		T35	15
bins_for_gpio_bits[9]	auto[1]	auto[0]	190713	1			T33	2117		T35	15		T11	3
bins_for_gpio_bits[9]	auto[1]	auto[1]	4361486	1			T31	20318		T32	22204		T33	65461
bins_for_gpio_bits[10]	auto[0]	auto[0]	6355693	1			T31	20036		T32	23397		T33	32713
bins_for_gpio_bits[10]	auto[0]	auto[1]	189636	1			T33	2077		T34	1		T35	14
bins_for_gpio_bits[10]	auto[1]	auto[0]	189958	1			T33	2067		T34	1		T35	14
bins_for_gpio_bits[10]	auto[1]	auto[1]	4368209	1			T31	19602		T32	22369		T33	65733
bins_for_gpio_bits[11]	auto[0]	auto[0]	6352439	1			T31	20426		T32	22471		T33	32836
bins_for_gpio_bits[11]	auto[0]	auto[1]	190160	1			T33	2051		T35	17		T11	2
bins_for_gpio_bits[11]	auto[1]	auto[0]	190449	1			T33	2047		T35	17		T11	2
bins_for_gpio_bits[11]	auto[1]	auto[1]	4370448	1			T31	19212		T32	23295		T33	65656
bins_for_gpio_bits[12]	auto[0]	auto[0]	6362439	1			T31	18269		T32	23571		T33	32719
bins_for_gpio_bits[12]	auto[0]	auto[1]	189868	1			T33	2101		T34	2		T35	14
bins_for_gpio_bits[12]	auto[1]	auto[0]	190158	1			T33	2094		T34	1		T35	13
bins_for_gpio_bits[12]	auto[1]	auto[1]	4361031	1			T31	21369		T32	22195		T33	65676
bins_for_gpio_bits[13]	auto[0]	auto[0]	6360953	1			T31	19546		T32	22076		T33	33430
bins_for_gpio_bits[13]	auto[0]	auto[1]	189916	1			T33	2136		T35	15		T11	1
bins_for_gpio_bits[13]	auto[1]	auto[0]	190183	1			T33	2130		T35	15		T11	1
bins_for_gpio_bits[13]	auto[1]	auto[1]	4362444	1			T31	20092		T32	23690		T33	64894
bins_for_gpio_bits[14]	auto[0]	auto[0]	6362234	1			T31	20913		T32	23455		T33	33536
bins_for_gpio_bits[14]	auto[0]	auto[1]	190063	1			T33	2147		T34	1		T35	16
bins_for_gpio_bits[14]	auto[1]	auto[0]	190316	1			T33	2141		T35	16		T11	5
bins_for_gpio_bits[14]	auto[1]	auto[1]	4360883	1			T31	18725		T32	22311		T33	64766
bins_for_gpio_bits[15]	auto[0]	auto[0]	6356526	1			T31	18667		T32	23175		T33	33038
bins_for_gpio_bits[15]	auto[0]	auto[1]	190144	1			T33	2051		T34	2		T35	14
bins_for_gpio_bits[15]	auto[1]	auto[0]	190438	1			T33	2043		T35	14		T11	8
bins_for_gpio_bits[15]	auto[1]	auto[1]	4366388	1			T31	20971		T32	22591		T33	65458
bins_for_gpio_bits[16]	auto[0]	auto[0]	6375663	1			T31	20354		T32	23422		T33	33073
bins_for_gpio_bits[16]	auto[0]	auto[1]	190029	1			T33	2088		T35	13		T11	5
bins_for_gpio_bits[16]	auto[1]	auto[0]	190312	1			T33	2078		T35	13		T11	5
bins_for_gpio_bits[16]	auto[1]	auto[1]	4347492	1			T31	19284		T32	22344		T33	65351
bins_for_gpio_bits[17]	auto[0]	auto[0]	6370531	1			T31	20199		T32	22614		T33	33103
bins_for_gpio_bits[17]	auto[0]	auto[1]	190251	1			T33	2122		T35	16		T11	3
bins_for_gpio_bits[17]	auto[1]	auto[0]	190564	1			T33	2118		T35	16		T11	3
bins_for_gpio_bits[17]	auto[1]	auto[1]	4352150	1			T31	19439		T32	23152		T33	65247
bins_for_gpio_bits[18]	auto[0]	auto[0]	6368180	1			T31	20009		T32	23551		T33	32803
bins_for_gpio_bits[18]	auto[0]	auto[1]	189492	1			T33	2085		T35	16		T11	2
bins_for_gpio_bits[18]	auto[1]	auto[0]	189827	1			T33	2074		T35	16		T11	2
bins_for_gpio_bits[18]	auto[1]	auto[1]	4355997	1			T31	19629		T32	22215		T33	65628
bins_for_gpio_bits[19]	auto[0]	auto[0]	6348542	1			T31	19761		T32	22152		T33	32559
bins_for_gpio_bits[19]	auto[0]	auto[1]	189646	1			T33	2053		T34	1		T35	21
bins_for_gpio_bits[19]	auto[1]	auto[0]	189954	1			T33	2043		T35	21		T11	4
bins_for_gpio_bits[19]	auto[1]	auto[1]	4375354	1			T31	19877		T32	23614		T33	65935
bins_for_gpio_bits[20]	auto[0]	auto[0]	6360708	1			T31	18612		T32	23110		T33	32850
bins_for_gpio_bits[20]	auto[0]	auto[1]	189653	1			T33	2021		T35	16		T11	3
bins_for_gpio_bits[20]	auto[1]	auto[0]	189923	1			T33	2014		T35	15		T11	3
bins_for_gpio_bits[20]	auto[1]	auto[1]	4363212	1			T31	21026		T32	22656		T33	65705
bins_for_gpio_bits[21]	auto[0]	auto[0]	6357654	1			T31	18726		T32	24129		T33	33363
bins_for_gpio_bits[21]	auto[0]	auto[1]	190207	1			T33	2130		T35	14		T11	3
bins_for_gpio_bits[21]	auto[1]	auto[0]	190498	1			T33	2122		T35	14		T11	3
bins_for_gpio_bits[21]	auto[1]	auto[1]	4365137	1			T31	20912		T32	21637		T33	64975
bins_for_gpio_bits[22]	auto[0]	auto[0]	6362120	1			T31	21571		T32	22859		T33	32609
bins_for_gpio_bits[22]	auto[0]	auto[1]	189274	1			T33	2044		T35	14		T11	1
bins_for_gpio_bits[22]	auto[1]	auto[0]	189582	1			T33	2035		T35	14		T11	1
bins_for_gpio_bits[22]	auto[1]	auto[1]	4362520	1			T31	18067		T32	22907		T33	65902
bins_for_gpio_bits[23]	auto[0]	auto[0]	6365823	1			T31	20201		T32	22689		T33	33588
bins_for_gpio_bits[23]	auto[0]	auto[1]	190227	1			T33	2160		T35	15		T13	2
bins_for_gpio_bits[23]	auto[1]	auto[0]	190552	1			T33	2149		T35	15		T13	2
bins_for_gpio_bits[23]	auto[1]	auto[1]	4356894	1			T31	19437		T32	23077		T33	64693
bins_for_gpio_bits[24]	auto[0]	auto[0]	6360603	1			T31	19866		T32	22489		T33	33096
bins_for_gpio_bits[24]	auto[0]	auto[1]	189902	1			T33	2098		T34	1		T35	14
bins_for_gpio_bits[24]	auto[1]	auto[0]	190197	1			T33	2094		T34	1		T35	14
bins_for_gpio_bits[24]	auto[1]	auto[1]	4362794	1			T31	19772		T32	23277		T33	65302
bins_for_gpio_bits[25]	auto[0]	auto[0]	6351538	1			T31	19629		T32	22909		T33	32864
bins_for_gpio_bits[25]	auto[0]	auto[1]	189435	1			T33	2051		T34	1		T35	12
bins_for_gpio_bits[25]	auto[1]	auto[0]	189752	1			T33	2042		T35	12		T11	3
bins_for_gpio_bits[25]	auto[1]	auto[1]	4372771	1			T31	20009		T32	22857		T33	65633
bins_for_gpio_bits[26]	auto[0]	auto[0]	6364159	1			T31	19650		T32	21538		T33	33290
bins_for_gpio_bits[26]	auto[0]	auto[1]	189949	1			T33	2135		T35	14		T11	3
bins_for_gpio_bits[26]	auto[1]	auto[0]	190258	1			T33	2131		T35	14		T11	3
bins_for_gpio_bits[26]	auto[1]	auto[1]	4359130	1			T31	19988		T32	24228		T33	65034
bins_for_gpio_bits[27]	auto[0]	auto[0]	6364998	1			T31	20165		T32	22620		T33	33444
bins_for_gpio_bits[27]	auto[0]	auto[1]	189703	1			T33	2110		T35	12		T11	7
bins_for_gpio_bits[27]	auto[1]	auto[0]	190008	1			T33	2099		T35	12		T11	7
bins_for_gpio_bits[27]	auto[1]	auto[1]	4358787	1			T31	19473		T32	23146		T33	64937
bins_for_gpio_bits[28]	auto[0]	auto[0]	6364697	1			T31	21424		T32	22529		T33	32782
bins_for_gpio_bits[28]	auto[0]	auto[1]	189929	1			T33	2088		T35	17		T11	2
bins_for_gpio_bits[28]	auto[1]	auto[0]	190195	1			T33	2083		T35	17		T11	2
bins_for_gpio_bits[28]	auto[1]	auto[1]	4358675	1			T31	18214		T32	23237		T33	65637
bins_for_gpio_bits[29]	auto[0]	auto[0]	6349241	1			T31	19339		T32	22376		T33	32771
bins_for_gpio_bits[29]	auto[0]	auto[1]	189942	1			T33	2080		T35	11		T11	3
bins_for_gpio_bits[29]	auto[1]	auto[0]	190220	1			T33	2070		T35	11		T11	3
bins_for_gpio_bits[29]	auto[1]	auto[1]	4374093	1			T31	20299		T32	23390		T33	65669
bins_for_gpio_bits[30]	auto[0]	auto[0]	6369283	1			T31	20587		T32	23686		T33	32837
bins_for_gpio_bits[30]	auto[0]	auto[1]	189912	1			T33	2023		T34	1		T35	17
bins_for_gpio_bits[30]	auto[1]	auto[0]	190186	1			T33	2016		T35	16		T11	3
bins_for_gpio_bits[30]	auto[1]	auto[1]	4354115	1			T31	19051		T32	22080		T33	65714
bins_for_gpio_bits[31]	auto[0]	auto[0]	6360952	1			T31	19347		T32	22013		T33	32973
bins_for_gpio_bits[31]	auto[0]	auto[1]	189676	1			T33	2118		T35	15		T11	2
bins_for_gpio_bits[31]	auto[1]	auto[0]	189996	1			T33	2112		T35	15		T11	2
bins_for_gpio_bits[31]	auto[1]	auto[1]	4362872	1			T31	20291		T32	23753		T33	65387